DESIGN AND ANALYSIS OF DIFFERENT ORDERS

OF ACTIVE-RC BUTTERWORTH FILTER

Thesis report submitted towards the partial fulfillment of
requirements for the award of the degree of


Master of Technology (VLSI Design & CAD)

Submitted by

Nimisha Saini
Roll No 6040411



Under the Guidance of


Mrs. Alpana Agarwal Mr.Rajesh Khanna
Astt. Professor, ECED Astt. Professor, ECED








Department Of Electronics and Communication Engineering
THAPAR INSTITUTE OF ENGINEERING & TECHNOLOGY,
(Deemed University),
PATIALA 147004, INDIA.

JUNE, 2006


Declaration


I hereby certify that the work which is being presented in the thesis entitled,
Design and Analysis of Different Orders of Active-RC Butterworth Filter in
partial fulfillment of the requirements for the award of degree of M.Tech. (VLSI Design
And CAD) at Electronics and Communication Department of Thapar Institute of
Engineering and Technology (Deemed University), Patiala, is an authentic record of my
own work carried out under the supervision of Mrs. Alpana Agarwal, Assistant Professor,
ECED (Guide) and Mr. Rajesh Khanna, Assistant Professor, ECED (Co-guide).

The matter presented in this thesis has not been submitted in any other University/
Institute for the award of any degree.

Nimisha Saini
Date: -------------------- Roll. No. 6040411


It is certified that the above statement made by the student is correct to the best of my
knowledge and belief.


Alpana Agarwal Rajesh
Khanna
Guide Co-guide

Counter Signed By:




Head Dean of Academic Affairs,
Electronics and Communication T.I.E.T.,Patiala.
Engineering Department,
T.I.E.T., Patiala.
ACKNOWLEDGEMENT
To discover, analyze and to present something new is to venture on an untrodden
path towards an unexplored destination is an arduous adventure unless one gets a true
torchbearer to show the way. I would have never succeeded in completing my task
without the cooperation, encouragement and help provided to me by various people. This
enlightening guidance, I found in my revered guide Mrs. Alpana Agarwal, Assistant
Professor, Electronics & Communication Engineering Department, Thapar Institute of
Engineering & Technology (Deemed University), Patiala, without whose patronization it
was never possible to give final shape to this thesis. I wish to express my deep gratitude
towards her for providing individual guidance and support throughout the thesis work.
I express my heartfelt gratitude towards my co-guide Mr. Rajesh Khanna,
Assistant Professor, Electronics and Communication Department, TIET (Deemed
University) for his valuable guidance, encouragement, constant involvement, inspiration
and the enthusiasm with which he solved my difficulties.
I shall be failing in my duties if I do not express my deep sense of gratitude
towards Dr. R. S. Kaler, Professor & Head of the Department, Electronics &
Communication Engineering Department and Dr. A.K.Chatterjee , P.G. Coordinator,
Electronics and Communication Engineering Department.
I am also thankful to Mr. Sanjay Batish and Mrs. Sushma Jain for extending their help in
the VLSI Laboratory.
I would also like to thank all the staff members and my co-students who were
always there at the need of the hour and provided with all the help and facilities, which I
required for the completion of my thesis. I am also thankful to the authors whose works I
have consulted and quoted in this work.
My greatest thanks are to all who wished me success especially my parents.
Above all I render my gratitude to the Almighty who bestowed self-confidence, ability
and strength in me to complete this work for not letting me down at the time of crisis and
showing me the silver lining in the dark clouds.
Nimisha Saini


ABSTRACT

Recently, developments in wireless communication have motivated many design
challenges. As a critical block of wireless devices, baseband filters operating with
kilohertz to a few megahertz cut-off frequencies significantly contribute to the overall
power consumption of receivers. One basic circuit used in these systems is a filter.
All the filters are designed in a different way depending upon the application for which
they are being designed. Filters can be classified on the basis of response characteristics,
components used, mathematical approximations or digital and analog filters. On the basis
of mathematical approximation one type i.e. Butterworth filter is the most popular and
widely used filter. Active-RC Butterworth filter is a basic filter that is widely used for
anti-aliasing and for channel filtering. For lower order of filters this filter is very
commonly used.
In Active-RC filter, an active device has to be chosen for a desirable response of the
filter. There is a range of devices like Operational Amplifier, Difference Differential
Amplifier, Operational Transconductor Amplifier etc. can be used to design an Active-
RC filter. After extensive study, of all the choices Operational Transconductor Amplifier
is chosen to design an active-RC Butterworth filter. Amongst all the topologies of OTA
(Operational Transconductor Amplifier), on the basis of literature survey, Telescopic
OTA, is chosen. The design procedure for a Single stage Telescopic OTA is developed
using design equations. The circuit designed is then simulated on Tanner EDA tool. The
simulated results are validating the theoretical values.
The Active-RC Butterworth filter design steps are developed, beginning right from the
selection of active device to the final filter response. The result of the 6
th
order active-RC
Butterworth filter schematic is then compared with the layout drawn on Tanner EDA
tool. The passband frequency response achieved after simulation well- justifies that the
filter may be used for video frequency applications.
With the increase in filter order many parameters change. Few of them are calculated
and observed by designing different orders of filters and analyzing them. Analysis is done
in terms of change in roll-off rates, passband frequency achieved and the power
dissipation. The results of the analysis are in accordance with the literature.
Table Of Contents

Declaration....i
Acknowledgements......ii
Abstract...iii
List Of Figures..viii
List Of Tablesxii

Chapter 1
INTRODUCTION.1-4
1.1 Objective of the thesis work1
1.2 Abbreviations and Colour schemes.....1
1.3 Contribution and Organization of thesis..3
1.4 Software and Tool used...4

Chapter 2 DIFFERENT METHODS FOR DESIGNING ANALOG CMOS
FILTERS..... .5-14
2.1 Introduction..5
2.2 Filter design using OTA...5
2.2.1 CMOS Implementation of Transconductor...7
2.3 DDA Based Fully Differential Sallen Key filter.9
2.4 Active-RC Filters...11
2.4.1 Channel Filtering: using Butterworth Filter.12
2.5 Comparison14

Chapter 3 FILTER THEORY AND BUTTERWORTH FILTER..15-
37
3.1 Introduction15
3.2 Response Categories of Filters...15
3.2.1 The Bode and Phase plots17
3.2.2 Representation of Poles and Zeros on graph19
3.3 Filter Types and Approximations..20
3.4 Analog Vs Digital Filters...24
3.5 Different Approaches of Implementing Filters..25
3.6 Butterworth Filter...27
3.6.1 Butterworth Filter Properties...28
3.6.2 First Order Low Pass Butterworth Filter.....31
3.6.3 First Order High Pass Butterworth Filter.....32
3.6.4 Second Order Filters....34
3.6.5 Second Order Low Pass Butterworth Filter.....35
3.6.6 Second Order High Pass Butterworth Filter....36

Chapter 4 INTRODUCTION TO TANNER EDA TOOL..38-
48
4.1 Introduction...38
4.2 S-EDIT (Schematic Edit)..38
4.3 T-EDIT (Simulation Edit).39
4.3.1 DC Operating point Analysis.40
4.3.2 DC Transfer Analysis.41
4.3.3 Transient Analysis..42
4.3.4 AC Analysis....42
4.3.5 Noise Analysis....43
4.4 W-EDIT (Waveform Edit).....44
4.5 L-EDIT (Layout Edit)....45
4.5.1 L-Edit: An Integrated Circuit Layout Tool....45

Chapter 5 TELESCOPIC OTA: DESIGN, SIMULATION AND SYNTHESIS.
........49-76
5.1 Introduction....49
5.2 Operational Amplifier....49
5.2.1 Performance Parameters....50
5.2.2 Opamp Topologies.....51
5.3 OTA (Operational Transconductance Amplifier)..53
5.4 Telescopic OTA.55
5.4.1 Frequency Compensation....58
5.4.2 Differential Stage59
5.4.3 Biasing circuit for
OTA..60
5.5 Design of Telescopic OTA62
5.5.1 Steps to design Telescopic OTA.62
5.5.2 Design of Telescopic OTA with defined specifications.64
5.5.3 Simulation results of OTA..67
5.5.4 Analysis of the Simulation Results.74
5.5.5 Physical Design of Telescopic OTA...74

Chapter 6 ACTIVE-RC BUTTERWORTH FILTERS: DESIGN AND
ANALYSIS....77-103
6.1 Introduction77
6.2 Active-RC Butterworth Filter77
6.3 Design steps to design Active-RC Butterworth filter79
6.4 Design of 6
th
order Active- RC Butterworth filter.82
6.5 Simulation results of the 6
th
order Butterworth filter.87
6.5.1 Analysis of the simulation results...90
6.5.2 Physical design of the 6
th
order Active-RC Butterworth filter...90
6.6 Analysis of different orders of Active-RC Butterworth Filter.......93

Chapter 7 CONCLUSION AND FUTURE
SCOPE.....104-105
7.1 Conclusion...104
7.2 Future Scope105

REFERENCES.106-108
APPENDIX...109-113


List Of Figures

Figure No. Title of Figure Page No.

2.1 4
th
order Butterworth LPF using OTA integrators 7
2.2 The CMOS implementation of the transconductor 8
2.3 Block diagram of DDA 9
2.4 DDA based fully Differential Sallen-Key Filter 10
2.5 5
th
order low pass filter 11
2.6 Frequency response of the 5
th
order filter 11
2.7 3
rd
order Butterworth filter 13
3.1 Filter responses 16
3.2 Filter responses on Bode plots 17
3.3 Showing the center frequency in a band pass response 19
3.4 Showing pole-zero diagram for the example 20
3.5 Response of a 4
th
order Butterworth lowpass (upper 21
curve) to a square wave input (lower curve)
3.6 Response of a 4
th
order Bessel low-pass (upper 22
curve) to a square wave input (lower curve)
3.7 Amplitude response curves for Bessel filters of 22
various orders
3.8 Step responses for Bessel low-pass filters 23
3.9 Example of a elliptic low-pass amplitude response 24
3.10 First Order Low Pass Butterworth Filter 31
3.11 First Order High Pass Butterworth Filter 33
3.12 Second Order Low Pass Responses 34
3.13 Second Order Low Pass Butterworth Filter 35
3.14 Second Order High Pass Butterworth Filter 36
3.15 Frequency Response of Second Order High Pass Filter 37
5.1(a) Telescopic opamp 52
Figure No. Title of Figure Page No.

5.1(b) Folded cascode opamp 52
5.1(c) Two stage opamp 53
5.2 Ideal OTA 54
5.3 A conventional telescopic opamp 56
5.4 Telescopic opamp single ended output with 58
constant current tail
5.5 Differential input pair telescopic OTA 59
5.6(a) Biasing circuit with diode connected load 61
5.6(b) Biasing circuit with gate grounded load 61
5.7 Schematic of the Telescopic OTA with 68
constant current source at the tail
5.8 Frequency response of the Telescopic OTA 69
with constant current source at its tail
5.9 Phase response of the Telescopic OTA with 70
constant current source at its tail
5.10 Schematic of the Telescopic OTA with bias 71
circuit at the tail
5.11 Frequency response of the Telescopic OTA 72
with bias circuit at its tail
5.12 Phase response of the Telescopic OTA with bias 73
circuit at its tail
5.13 Layout of Telescopic OTA 75
5.14 Frequency response of layout of Telescopic OTA 76
6.1 1
st
order opamp based Active-RC filter 78
6.2 Low pass filter response 79
6.3 Graphical construction for determining the poles 81
of a Butterworth filter of order N

Figure No. Title of Figure Page No.

6.4(a) OTA symbol 83
6.4(b) Equivalent circuit of ideal OTA 83
6.5 Schematic of the 6
th
order Active-RC Butterworth filter 88
6.6 Frequency response of the 6
th
order low-pass 89
Active-RC Butterworth filter
6.7 Layout of the 6
th
order Active-RC Butterworth filter 91
6.8 Frequency response of the 6
th
order Active-RC 92
Butterworth Filter
6.9(a) Schematic of the 1
st
order Active-RC Butterworth filter 94
6.9(b) Frequency response of the 1
st
order Active-RC 94
Butterworth Filter
6.10(a) Schematic of the 2
nd
order Active-RC Butterworth filter 95
6.10(b) Frequency response of the 2
nd
order Active-RC 95
Butterworth Filter
6.11(a) Schematic of the 2
nd
order Active-RC Butterworth filter 96
6.11(b) Frequency response of the 2
nd
order Active-RC 96
Butterworth Filter
6.12(a) Schematic of the 3
rd
order Active-RC Butterworth filter 97
6.12(b) Frequency response of the 2
nd
order Active-RC 97
Butterworth Filter
6.13(a) Schematic of the 3
rd
order Active-RC Butterworth filter 98
6.13(b) Frequency response of the 3
rd
order Active-RC 98
Butterworth Filter
6.14 Comparison of roll-off rates of simulated and theoretical 100
values



Figure No. Title of Figure Page No.

6.15 Comparison of roll-off rates of simulated and theoretical 101
values
6.16 Increase in power dissipation with increase in filter order 102
6.17 Variation in simulated values from calculated values 103































List Of Tables

Table No. Title of table Page No.

1.1 Colour scheme used for layout design 3
5.1 Comparison of performance of various opamp 53
topologies
5.2 Calculated Aspect ratios for the telescopic OTA 67
5.3 Node name correspondence of fig 5.3 with fig 5.7 68
6.1 Ratios of R
F
/R
1
for different stages in different 93
orders of filters
6.2 Change in filter parameters with increase in filter order 99


Chapter 1
INTRODUCTION

1.1 Objective of the thesis work

In recent years, the broadband communication systems, such as digital video, wireless
telephony and computer networking has been a strong driving force for the IC
Technology. Filters constitute a small part of a complete communication system. So, they
need to be low in power, small in size and they must not limit the performance of the
overall system.
Active RC filters are used for anti-aliasing and for channel filtering in many
communication systems. This thesis is a step forward to this rapidly growing
communication systems field.
The objective of the work was to develop the design steps for an active-RC Butterworth
filter, for this to choose and design an active device and then to analyze that how increase
in filter order affects different parameters like roll-off rate, power dissipation and
passband frequency.

1.2 Abbreviations and colour schemes

The abbreviations used in this report are listed below followed by the colour scheme used
while drawing layout in Table 1.1:
AC Alternating Current
CAD Computer Aided Design
CMOS Complementary Metal Oxide Semiconductor
dB Decibel
DC Direct Current
DDA Difference Differential Amplifier
Dec Decade
EDA Electronic Design Automation
Hz Hertz
IC Integrated Circuit
LPF Low Pass Filter
MHz Mega Hertz
NMOS N-channel Metal Oxide Semiconductor
Op-Amp Operational Amplifier
OTA Operational Transconductance Amplifier
PMOS P-channel Metal Oxide Semiconductor
SPICE Simulation Program with Integrated Circuit Emphasis
UGB Unity Gain Bandwidth
W Width of transistor
L Length of transistor

















Table 1.1 Colour scheme used for layout design

Colour scheme Layer Colour scheme Layer



Poly

N Well



Active

N Select



Metal1

P Select



Metal2

Via



Poly Contact

Overglass



Active
Contact

Pad Comment

1.3 Contribution and Organization of Thesis

Main contributions of this thesis are:
Study of different methods to design an analog CMOS filter.
Design, simulation and synthesis of Telescopic OTA.
Design of 6
th
order Active-RC Butterworth filter.
Analysis of Active-RC Butterworth filters in terms of roll-off rates, passband
frequency and power dissipation with increase of filter order.


The thesis report is organized into eight chapters. The chapterwise detail is given below:
Chapter 1: In this chapter, the objective of the thesis work is presented along with the
abbreviations used in the report and the colour scheme followed during the layout.

Chapter 2: This chapter is based on the literature survey done for this thesis.

Chapter 3: In this chapter, basic theory of filters and its types are discussed.

Chapter 4: In this chapter, brief introduction to the Tanner EDA tool is presented.

Chapter 5: This chapter discusses the design steps for the design of Telescopic OTA with
results of the simulations.

Chapter 6: This chapter discusses the design steps for the design of Active-RC
Butterworth filter with results of simulations for 6
th
order Active-RC Butterworth filter
and analysis of different orders of Active-RC Butterworth filter.

Chapter 7: This chapter presents the conclusion of the work done and future scope.


1.4 Operating System and EDA Tools used

The operating system and EDA Tools used in thesis are as follows:
Operating System : Windows XP
Tool : Tanner EDA Tool
S-Edit
T-Spice Pro
W-Edit
L-Edit Pro
Chapter 2
DIFFERENT METHODS FOR DESIGNING ANALOG
CMOS FILTERS

2.1 Introduction

Recently, developments in wireless communication and biomedical equipments have
motivated many design challenges specifically in low voltage and low power integrated
circuits. As a critical block of portable wireless devices, baseband filters operating with
kilohertz to a few megahertz cutoff frequencies significantly contribute the overall power
consumption of receivers. One basic circuit used in these equipments is filters. Filters can
be classified on the basis of mathematical approximations, frequency response, elements
used in circuit (active and passive) etc.
All the filters are designed differently depending on application for which they are
designed. Since, filters generally constitute only a small fraction of a complete
communication system, they need to be low in power and small in size to accommodate
the integration of extensive signal-processing functions on the same integrated circuit
(IC). To achieve the desired characteristics, filter can be designed by various methods.
On the basis of mathematical approximations, the filters are of four types- Butterworth,
Bessel, Chebyshev and Elliptic filter. The first and probably best-known filter
approximation is the Butterworth or maximally flat response because of its smooth band
pass with no ripple. Due to this feature these filters are highly used in communication
filters [19].

2.2 Filter Design using OTA

Filter design using OTA (Operational Transconductance Amplifier) is the most common
method. Butterworth, Chebyshev, Bessel and Elliptic filters can be designed easily and
efficiently using OTAs. An OTA is a voltage controlled current source (VCCS), more
specifically the term operational comes from the fact that it takes the difference of two
voltages as the input for the current conversion. In addition to the voltage control
characteristics, the OTA based circuits show promise for high-frequency applications
where conventional opamp based circuits become bandwidth limited.
High-speed filters are increasingly based on an Operational Transconductance
Amplifiers (OTAs) Capacitor (G
m
-C) approach, because of their simple circuitry
and improved frequency response. However, the nonidealities of the
transconductor limit overall filter performance. Several linearization techniques
[16, 29] (one of the techniques utilizes triode-biased transconductors exploiting
an active-cascode scheme which is similar to conventional cascode circuits
except that the current of the triode transistor is sensed through another path
rather than the cascode transistor, allowing for regulation of the drain voltage by
negative feedback.) have been developed to enhance the linearity of the
transconductor, but precise cancellation of nonlinearities is limited by matching
accuracy.
The performance of OTA-C filters depends on: (i) the OTA circuit, which is the main
noise and distortion contributor in the filter, and (ii) the OTA-C filter structure. The later
is a fourth-order Butterworth, realized by cascading two biquadratic sections. Each
biquad is implemented with 4 OTAs and 2 capacitors. The fully differential
transconductor- capacitor filter is shown in fig. 2.1. All transconductors are identical. The
designed stop- band attenuation is 60 dB at 80 MHz for a 10 MHz cutoff frequency [7].








Figure 2.1. 4th-order Butterworth LPF using OTA integrators: C1 = 6.40pF, C2 = 3.84pF, C3=2.40pF and
C4 = 9.60pF.

2.2.1 CMOS Implementation of Transconductor

The differential transconductance circuit is shown in fig. 2.2. It comprises a source-
coupled pair with poly-silicon degeneration resistors and a cross-coupled high-impedance
load. The linearity is enhanced by the degenerated resistors at the cost of a smaller
effective transconductance, G
m
, and a smaller tunable G
m
range. Transistors M4, M5, M6
and M7 are matched. M8 and M9 operate in the triode region, acting as degeneration
resistors to provide different operating points at nodes v
pg
and v
ng
. M4 and M7 act like a
pair of positive resistors R
+
, while M5 and M6 function as negative resistors R
_
. The
output impedance of the transconductor depends on the parallel combination of R
+
and
R
_
, the values of which are controlled by voltages v
cp
and v
cn
respectively. As a result, the
output impedance, and therefore, the Q of the integrator, can be maximized with proper
combinations of v
cp
and v
cn
. With this transconductor, a tunable integrator for very-high-
frequency integrated filters can be realized by adjusting the voltage v
ba
, which controls
the tail current, and thus G
m
. Good high-speed properties stem from the absence of
internal high impedance nodes, which pushes non-dominant poles to the gigahertz ranges
[6].

Figure 2.2. The CMOS implementation of
the transconductor

Low-Frequency filters are important building blocks for biomedical systems where
bioelectric signals (of range 1 V 100 mV, frequencies below 100 Hz) are employed
and these circuits should not introduce any form of distortion that can destroy the
information contained.
One such design for implementing low frequency filters, a 2.4 Hz low-pass filter
achieving a 60 dB dynamic range is presented. Capacitors ranging from 18 to 200 pF are
implemented by using 5 pF capacitors and impedance scalers. This approach allows a
considerable saving of silicon area. As a result of the large capacitors emulated in the
implementation a huge reduction in the filter noise is obtained. For electrocardiograph
(ECG) applications where the magnitude of the signal is around 1 mV 25 mV, and
considering a preamplifier gain of ten, the magnitude of the signal to be processed by the
low-pass filter (LPF) is around 10 250 mV. To sense the T wave signal, a cutoff
frequency as low as 2.4 Hz is required. The requirements for such a filter leads to a
design of 6
th
order Bessel filter with dynamic range of 60 dB, minimum power
consumption of 50W and THD < 50dB. For easier analysis and better understanding,
the OTA based integrator is first considered [21].
Increasing demand for high-speed data services in recent years has led to the evolution of
Digital Subscriber Line (DSL) technology. It is necessary for DSL networks to design
spectral shaping filters, that shape the transmit signal such that it complies with the time
and frequency templates allowed in the network. For this application, Butterworth filter is
designed using OTAs so as to decrease the power consumption [8].

2.3 DDA Based Fully-Differential Sallen-Key filter

In recent years the portable communication market has been a strong driving force for the
IC technology. With the emergence of the third-generation (3G) mobile systems, high-
bit-rate multimedia services are turning into reality. One concern with wideband CDMA
receiver is the power consumption. With up to 20 MHz bandwidth, the power of
baseband filter will be huge if proper power optimization techniques are not taken. The
portable applications and the desire to extend the battery lifetime had made the low
power design a must. Another concern is to reduce noise figure.
After it was presented by Edward Sackinger and Walter Guggenbuhl in 1987 [8], the
CMOS Differential Difference Amplifier (DDA) has gained wide applications in analog
signal processing. As shown in fig. 2.3, the DDA is actually an extension to the concept
of the opamp. The main difference is that DDA has four inputs (V
pp
, V
pn
, V
nn
and V
np
)
and the output of DDA can be written as:
V
o
= V
op
V
on
= A
o
[(V
pp
V
pn
(V
np
V
nn
)] .(2.1)


Figure 2.3. Block diagram of DDA

When a negative feedback is introduced, i.e., to V
pn
and/or V
np
, which appear in (2.1)
with a negative sign, the following expression is obtained:
V
pp
V
pn
= V
np
V
nn
with A
o
.(2.2)
In practice, A
o
is always finite, so there is a difference between the two differential
voltages. Therefore, the open-loop gain should be as large as possible in order to achieve
high-performance operation.


Figure 2.4. DDA based fully Differential Sallen-Key Filter

The DDA can be used to implement fully-differential Sallen- Key filter as shown in fig.
2.4 (where R
1
= R
2
, R
3
= R
4
, C
1
= C
2
, C
3
= C
4
). Assume A
O
is large enough, then from
(2.2) we have V
pn
V
nn
= V
pp
V
np
= V
on
V
op
, and after some math manipulation, the
transfer function of the filter can be derived as:
H(s) = (V
on
V
op
)/( V
inp
V
inn
) =
o
2
/(s
2
+s
o
/Q +
o
2
) (2.3)
where 3 1 3 1 0 1 C C R R = is the undamped natural frequency,
] ) [( ( 1 3 1 3 1 2 1 C R R C C R R Q + = is the quality factor, which defines the sharpness at which
the peak of the magnitude response occurs. When R
1
= R
3
, this unity-gain filter has the
advantage of low sensitivity to component value when compared to other Sallen-Key
filter structures.

The fifth-order Butterworth low-pass filter is implemented by cascading a first-order RC
network and two second-order sections, as shown in fig. 2.5. The DDA based Sallen-Key
filter is used in 5
th
order Butterworth filter as a block, and the two second-order sections
are cascaded in an order set by their Q-factors.



Figure 2.5. 5
th
order low pass filter



Figure 2.6 Frequency response of the 5
th
order filter

The filter is designed at 0.5 m with 19 MHz cut-off frequency with a power
consumption of 4.5 mW [5].

2.4 Active-RC filters

A configurable W-CDMA Baseband Down-Link (BDL) channel suitable to be used with
both direct conversion (DIR) and superheterodyne (SHT) architectures has been
integrated in a double-poly 0.6 m CMOS technology. The BDL is an analog signal
processor consisting of calibrated active-RC filters and over sampled 6-bit analog-to-
digital pipeline converters, which sufficiently suppresses the adjacent channel and other
interferers before digital signal processing on an external DSP. The designed BDL
channel achieves 38.4 dB SNDR, 43 dB SFDR in DIR mode and 38.3 dB SNDR, 42.8 dB
SFDR in SHT mode with an overall power consumption of only 49 mW/58 mW
(DIR/SHT) from a single 2.8 V power supply. A low power consumption mode allows to
further reduce these values down to 41 mW/50 mW (DIR/SHT) without significant
detrimental effects to BDL performance [17].

A Baseband Down-Link (BDL) channel, integrated in an analog baseband codec suitable
for W-CDMA applications, is presented. The BDL architecture can be configured to
work with both superheterodyne architectures (SHT) with no baseband filtering in the RF
IC and direct conversion architectures (DIR) having all the baseband filtering already in
the RF IC. The BDL channel is fully-differential (to increase the immunity to interference
and suppress even order distortion) and consists of analog signal-processing circuitry,
including internally calibrated active-RC filters and over sampled pipeline Analog-to-
Digital Converters (ADCs). The programmable active-RC Butterworth filters perform the
channel selection filtering and fit the input dynamic range of the ADCs, which are 6-bit
1.5 bit/stage pipeline structures with digital error correction and interstate gain [11].

2.4.1 Channel Filtering: using Butterworth Filter

The channel selection filtering is performed in the analog domain in order to use high-
speed but only medium resolution ADCs. If channel selection is performed in the digital
domain, high-resolution ADCs are required, which leads to large power consumption and
large die size. The former approach is thus preferable since power consumption is a key
concern in battery-operated products (in particular for W- CDMA applications).
The channel filter, which is composed of cascaded 3
rd
order and 1st

order active-RC
Butterworth structures, can be configured for the two operation modes: SHT and DIR.

In the SHT mode, the filtering requirements are fulfilled by a 3
rd
order Butterworth filter
with cut-off frequency at 1.92 MHz (fig. 2.7). An 18 dB DC gain is distributed in the
filter to suppress the ADC quantization noise and to fit its input dynamic range (2.05
V
pp
). The measured integrated input-referred noise in SHT mode is 180 V RMS. The in-
band group-delay is 121ns with a group-delay deviation of 50 ns.
In the DIR mode, the 3
rd
order Butterworth filter is bypassed and sent off in order to save
power, and only a simple 1
st
order smoothing filter with a cut-off frequency of 7.68 MHz
(F
S
/2, where F
S
is the channel master clock) is present in front of the ADC. The
programmable DC-gain of this filter can be set to 0dB or 5.8 dB depending on the full-
scale (F
S
) of the input signal (2.05 V
pp
/1.05 V
pp
). Thus, a calibration system becomes
necessary to restore the nominal frequency response. This has been achieved by replacing
the filters capacitors by binary weighted capacitors arrays, which can be programmed by
a 5 - bit digital code generated on-chip by a FSM implementing a novel algorithm, which
allows to restore the nominal frequency to 3% accuracy in less than 5s covering the
whole RC-product variation range (patent pending). The opamp used in both the filters is
a two-stage Miller compensated structure with NMOS input stage and NMOS output
stage and has a nominal GBW of 80 MHz and a DC gain of 73 dB. Its current
consumption is close to 530 mA [17].


Figure 2.7 3rd order Butterworth filter

The advantages of the active-RC technique in filters design are the insensitivity to
parasitics, the excellent linearity and the large dynamic range. The main drawback of this
approach are the large variations in the absolute value of the filter time constants, which
can typically vary over a range of 50% from nominal values in CMOS technologies
[11].

2.5 Comparison

Filter design using DDA, OTA and active-RC have been discussed in previous sections.
Conventional OTAs do not achieve high dynamic range. Also, OTA-C filters are
expected to lose more dynamic range as well as tuning range when power-supply voltage
levels are further reduced. If two OTA-C filters are designed, one for low powers while
the other was designed for low noise. The low-power filter exhibits a low dynamic range
while the low-noise filter exhibits improved dynamic range but consumes excessive
power.
If a 2
nd
order fully differential Sallen Key filter is designed using OTAs then it uses two
OTAs and an RC network. Whereas, one DDA along with RC network completes the
same design of 2
nd
order Sallen-Key filter. This structure results in 50% power saving
with the reduction in number of components and area as well.
In comparison to DDA and OTA based filter, opamp based Active-RC Butterworth filters
given reasonably flat passband. It exhibits insensitivity to parasitics, excellent linearity
and large dynamic range.










Chapter 3
FILTER THEORY AND BUTTERWORTH FILTER

3.1 Introduction

Filters of some sort are essential to the operation of most electronic circuits. In circuit
theory, a filter is an electrical network that alters the amplitude and/or phase
characteristics of a signal with respect to frequency. Ideally, a filter will not add new
frequencies to the input signal, nor will it change the component frequencies of that
signal, but it will change the relative amplitudes of the various frequency components
and/or their phase relationships [27]. Filters are often used in electronic systems to
emphasize signals in certain frequency ranges and reject signals in other frequency
ranges. Such a filter has a gain that is dependent on signal frequency. A filters pass band
is the range of frequencies over which it will pass an incoming signal. Signal frequencies
lying outside the pass band are attenuated. So, a filter is defined as the electric networks
that pass or allow unattenuated transmission of electric signal within certain frequency
range and stops or disallows transmission of electric signal outside this range.
Depending on various measures the filters can be classified in different categories (e.g.
response, mathematical approximations, implementation and design approaches) [25].

3.2 Response categories of filters

Filters fall into one of the following response categories, based on the overall shape of
their pass band.
Low-pass filters pass low-frequency signals while blocking high-frequency signals. The
pass band ranges from DC (0 Hz) to a corner frequency F
C
.
High-pass filters pass high-frequency signals while blocking DC and low-frequency
signals. The pass band ranges from a corner frequency (F
C
) to infinity.
Band-pass filters pass only signals between two given frequencies, blocking lower and
higher signals. The pass band lies between two frequencies, F
L
and F
H
. Signals between
DC and F
L
are blocked, as are signals from F
H
to infinity. The pass band of these filters is
often characterized as having a bandwidth that is symmetric around a center frequency.
Band-stop filters or notch filters block signals occurring between two given frequencies,
F
L
and F
H
. The pass band is split into a low side (DC to F
L
) and a high side (F
H
to
infinity) [26].
All pass or phase-shift filters have no effect on the amplitude of the signal at different
frequencies. Instead, its function is to change the phase of the signal without affecting its
amplitude [26].

Figure 3.1. Filter responses.
3.2.1 The bode and phase plots
Bode plots describe the behavior of a filter by relating the magnitude of the filters
response (gain) to its frequency. An example of this type of plot is shown in fig. 3.2.

Figure 3.2. Filter responses on Bode plots.
The key feature of this graph is that both axes have logarithmic scales. The horizontal
axis represents frequency, measured in hertz, and the vertical axis is measured in
decibels.
Decibels are a logarithmic measure of power, where an increase of 10 dB represents a 10-
fold increase in power. Because power in an electrical signal is related to the square of
voltage, a factor of 10 increases in the voltage of a signal is represented by an increment
of 20 dB. The advantage of drawing a filters response curve on a Bode plot is that it
provides an easy way to describe the filters response over several decades of frequency
and several orders of magnitude [26]. The decibels of gain of a filter relate to the ratio
between input and output voltages:
.(3.1)
In addition to affecting the amplitude of a signal, a filter can also cause changes in the
phase of signal components as follows:
If you run sinusoidal signals of different frequencies through this filter, not only does the
filter attenuate the higher frequency signals, but it also shifts their phase [25].
The phase-shift plot describes the shift of sinusoidal signals. A filters phase response is
also important in the case of nonsinusoidal signals because phase shifts distort the
waveforms. This is because nonsinusoidal signals can be viewed as combinations of
sinusoidal signals of varying frequencies. Shifting the phase of these components relative
to one another will change the shape of the overall waveform [26].
The precise shape of a band-pass filter's amplitude response curve will depend on the
particular network, but any 2
nd
order band-pass response will have a peak value at the
filter's center frequency. The center frequency is equal to the geometric mean of the -3 dB
frequencies:
Fc = F F H L ...(3.2)
where Fc is the center frequency FL is the lower -3 dB frequency FH is the higher 3dB
frequency Another quantity used to describe the performance of a filter is the filter's ``Q''.
This is a measure of the ``sharpness'' of the amplitude response. The Q of a band-pass
filter is the ratio of the center frequency to the difference between the 3dB frequencies
(also known as the 3dB bandwidth) [26]. Therefore:
Q =
L H F F
Fc

..(3.3)
See Figure 3.3.

Figure 3.3 Showing the center frequency in a band pass response.
3.2.2 Representation of Poles and Zeros on Graph

The way of writing a filter's transfer function is to factor the polynomials in the
numerator and denominator so that they take the form:
H(s) =
) p s )....( p s )( p s )( p s (
) z s ).....( z s )( z s )( z s (
H
n 2 1 0
n 2 1 0
0


(3.4)
The roots of the numerator, z
0
, z
1
, z
2
, . . . z
n
are known as zeros, and the roots of the
denominator, p
0
, p
1
, . . . p
n
are called poles. z
i
and p
i
are in general complex numbers, i.e.,
R + jI, where R is the real part and I is the imaginary part. All of the poles and zeros will
be either real roots (with no imaginary part) or complex conjugate pairs [27].
For example, the 2nd-order band pass network function can be factored to give:
)
2
3
5 . 0 )(
2
3
5 . 0 (
) (
j s j s
s
s H
+ + +
= ..(3.5)
The factored form of a network function can be depicted graphically in a pole-zero
diagrams. Fig. 3.4 is the pole zero diagram for equation. The diagram shows the zero at
the origin and the two poles, one at
, 2 3 5 . 0 j s = and one at 2 3 5 . 0 j s + =

Figure 3.4. Showing pole-zero diagram for the example

3.3 Filter types and approximations

Filters with acceptable amplitude response curves may differ in terms of such
characteristics as transient response, pass band and stop band flatness, and complexity.
Fortunately for the circuit designer, a great deal of work has already been done in this
area, and a number of standard filter characteristics have already been defined. These
usually provide sufficient flexibility to solve the majority of filtering problems [27]. The
``classic'' filter functions were developed by mathematicians (most bear their inventors'
names), and each was designed to optimize some filter property. The most widely used of
these are discussed below.

1. Butterworth: The first and probably best-known filter approximation is the
Butterworth or maximally-flat response. It exhibits a nearly flat pass band with no ripple.
The roll off is smooth and monotonic, with a low-pass or high-pass roll off rate of 20
dB/decade (6 dB/octave) for every pole. Thus, a 5th-order Butterworth low-pass filter
would have an attenuation rate of 100 dB for every factor of ten increases in frequency
beyond the cutoff frequency [19].

2 Chebyshev: Another approximation to the ideal filter is the Chebyshev or equal ripple
response. As the latter name implies, this sort of filter will have ripple in the pass band
amplitude response. The amount of pass band ripple is one of the parameters used in
specifying a Chebyshev filter. The Chebyshev characteristic has a steeper roll off near the
cutoff frequency when compared to the Butterworth, but at the expense of monotonicity
in the pass band and poorer transient response [12,27].

3 Bessel: All filters exhibit phase shift that varies with frequency. This is an expected
and normal characteristic of filters, but in certain instances it can present problems. If the
phase increases linearly with frequency, its effect is simply to delay the output signal by a
constant time period. However, if the phase shift is not directly proportional to frequency,
components of the input signal at one frequency will appear at the output shifted in phase
(or time) with respect to other frequencies. The overall effect is to distort non-sinusoidal
wave shapes, as illustrated in fig. 3.5 for a square wave passed through a Butterworth
low-pass filter. The resulting waveform exhibits ringing and overshoot because the
square wave's component frequencies are shifted in time with respect to each other so
that the resulting waveform is very different from the input square wave.


Figure 3.5 Response of a 4
th
order Butterworth lowpass
(upper curve) to a square wave input (lower
curve).

When the avoidance of this phenomenon is important, a Bessel or Thompson filter may
be useful. The Bessel characteristic exhibits approximately linear phase shift with
frequency, so its action within the pass band simulates a delay line with a low-pass
characteristic. The higher the filter order, the more linear the Bessel's phase response.
Fig. 3.6 shows the square-wave response of a Bessel low-pass filter. Note he lack of
ringing and overshoot. Except for the ``rounding off'' of the square wave due to the
attenuation of high-frequency harmonics, the wave shape is preserved.

Figure 3.6 Response of a 4
th
order Bessel low-pass
(upper curve) to a square wave input (lower curve).

The amplitude response of the Bessel filter is monotonic and smooth, but the Bessel
filter's cutoff characteristic is quite gradual compared to either the Butterworth or
Chebyshev as can be seen from the Bessel low-pass amplitude response curves in fig. 3.7.
Bessel step responses are plotted in fig.1.8 for orders ranging from 2 to 10 [27].

Figure 3.7. Amplitude response curves for Bessel
filters of various orders.

Figure 3.8 Step responses for Bessel low-pass filters.


4 Elliptic: The cutoff slope of an elliptic filter is steeper than that of a Butterworth,
Chebyshev, or Bessel, but the amplitude response has ripple in both the pass band and the
stop band, and the phase response is very non-linear. However, if the primary concern is
to pass frequencies falling within a certain frequency band and reject frequencies outside
that band, regardless of phase shifts or ringing, the elliptic response will perform that
function with the lowest-order filter. The elliptic function gives a sharp cutoff by adding
notches in the stop band. These cause the transfer function to drop to zero at one or more
frequencies in the stop band. Ripple is also introduced in the pass band. An elliptic filter
function can be specified by three parameters (again excluding gain and cutoff
frequency): pass band ripple, stop band attenuation, and filter order n. Because of the
greater complexity of the elliptic filter, determination of coefficients is normally done
with the aid of a computer [27, 28]. See fig. 3.9.

Figure 3.9
Example of a elliptic low-pass amplitude
response.

3.4 Analog Vs Digital Filters

1. Analog Filters

Analog filters are usually implemented with electronic circuits, making use of three
fundamental components: resistors, capacitors and inductors. By arranging these
components in a variety of configurations, it is possible to customize filter performance
to very specific needs as follows:
a) Operational amplifiers are commonly used to increase the performance of these filters
[27].
b) It is important to note that these filters are commonly used in signal conditioning
stages before any digitization takes place. This may involve the removal of unwanted
noise or the reduction of bandwidth to simplify further signal analysis or processing. The
most notable application of this kind is low-pass filtering for anti-aliasing purposes [25].
c) The performance of analog filters is directly related to the quality of the components used
and the circuit design. Things such as component tolerances, power consumption, design
techniques and often the physical size components all play important roles in establishing
the practical limits of analog filters [27].

2. Digital Filters

The digitization of electric signals into sequences of numbers permits the complete
manipulation of these signals to occur mathematically. Voltage signals that are expressed
as numbers can easily be scaled through scalar multiplication or offset by adding
constants; they can be rectified by using the absolute value operator or modulated with
other signals through multiplication. The digital realm provides unbounded opportunities
for condition and processing of the signal. This branch of science is known as digital
signal processing [12].

3.5 Different Approaches of Implementing Filters

1. Passive Filters: The filters used for the earlier examples were all made up of passive
components: resistors, capacitors, and inductors, so they are referred to as passive filters.
A passive filter is simply a filter that uses no amplifying elements (transistors, operational
amplifiers, etc.). In this respect, it is the simplest (in terms of the number of necessary
components) implementation of a given transfer function. Passive filters have other
advantages as well:

a) Because they have no active components, passive filters require no power supplies.
b) Since they are not restricted by the bandwidth limitations of op amps, they can work well
at very high frequencies.
c) They can be used in applications involving larger current or voltage levels than can be
handled by active devices.
d) Passive filters also generate little noise when compared with circuits using active gain
elements. The noise that they produce is simply the thermal noise from the resistive
components, and, with careful design, the amplitude of this noise can be very low [19,
27].

Passive filters have some important disadvantages in certain applications, however.
a) Since they use no active elements, they cannot provide signal gain.
b) Input impedances can be lower than desirable, and output impedances can be higher the
optimum for some applications, so buffer amplifiers may be needed. Inductors are
necessary for the synthesis of most useful passive filter characteristics.
c) These can be prohibitively expensive if high accuracy (1% or 2%, for example), small
physical size, or large values are required.
d) Standard values of inductors are not very closely spaced, and it is difficult to find an off-
the-shelf unit within 10% of any arbitrary value, so adjustable inductors are often used.
Tuning these to the required values is time-consuming and expensive when producing
large quantities of filters.
e) Furthermore, complex passive filters (higher than 2
nd
order) can be difficult and time-
consuming to design [19, 27].

2. Active Filters: Active filters use amplifying elements, especially op amps, with resistors
and capacitors in their feedback loops, to synthesize the desired filter characteristics.
These filters have advantages as follows:

a) Active filters can have high input impedance, low output impedance, and virtually any
arbitrary gain.
b) They are also usually easier to design than passive filters.
c) Possibly their most important attribute is that they lack inductors, thereby reducing the
problems associated with those components.
d) Still, the problems of accuracy and value spacing also affect capacitors, although to a
lesser degree.
e) Performance at high frequencies is limited by the gain-bandwidth product of the
amplifying elements, but within the amplifier's operating frequency range, the op amp-
based active filter can achieve very good accuracy, provided that low-tolerance resistors
and capacitors are used [19].

Some of the disadvantages of the filters are as follows:
a) Active filters will generate noise due to the amplifying circuitry, but this can be
minimized by the use of low-noise amplifiers and careful circuit design [27].

3. Switched-capacitor filters: These are clocked, sampled-data systems; the input signal
is sampled at a high rate and is processed on a discrete-time, rather than continuous,
basis. This is a fundamental difference between switched-capacitor filters and
conventional active and passive filters, which are also referred to as ``continuous time''
filters. The operation of switched-capacitor filters is based on the ability of on-chip
capacitors and MOS switches to simulate resistors. The values of these on-chip capacitors
can be closely matched to other capacitors on the IC, resulting in integrated filters whose
cutoff frequencies are proportional to, and determined only by, the external clock
frequency. Now, these integrated filters are nearly always based on state-variable active
filter topologies, so they are also active filters, but normal terminology reserves the name
``active filter'' for filters built using non-switched, or continuous, active filter techniques.
The primary weakness of switched-capacitor filters is that they have more noise at their
outputs both random noise and clock feed through - than standard active filter circuits
[27].

3.6 Butterworth Filter

Active filters are mainly used in communication and signal processing circuits. They are
also employed in a wide range of applications such as entertainment, medical electronics,
etc. Most commonly used active filters:
1. Low pass filters
2. High pass filters
3. Band pass filters
4. Band reject filters.
Each of these filters can be built using op-amp as the active element and resistors and
capacitors as the passive elements (frequency selective part). Better filter performance is
obtained by employing op-amps with higher slew rates and higher gain-bandwidths. The
filtering behavior of the circuit is best represented by the frequency response
characteristics of the circuit, which shows the variation of the filter circuit gain with
respect to operating frequency [24].
There are many filter approximations that have been developed for the filter design. One
of the better used is the Butterworth approximation. Butterworth filter is a type of electronic filter
characterized by having a
maximally flat magnitude response, i.e., no amplitude ripple in the
passband. [Contrast with Chebyshev] This circuit is based upon Butterworth
functions (or Butterworth polynomials). [For the mathematically inclined,
these polynomials represent a specialized solution to a general Mac Laurin
series based upon Taylor series expansion. The filter was named after S. Butterworth, a British engineer who first
described this response in his paper "On the
Theory of Filter Amplifiers," Wireless Engineer, vol. 7, 1930, pp. 536-541.
Eleven years later, V.D. Landon coined the phrase maximally flat in his
paper "Cascade Amplifiers with Maximal Flatness," RCA Review, vol. 5, 1941,
pp. 347-362 [10].

3.6.1 Butterworth filter properties
Important properties of Butterworth filter (these properties are applicable for all other
filters with different responses):
1. Filter Order: The order of a filter is important for several reasons. It is directly
related to the number of components in the filter, and therefore to its cost, its
physical size, and the complexity of the design task. Therefore, higher-order
filters are more expensive, take up more space, and are more difficult to design.
The primary advantage of a higher order filter is that it will have a steeper roll off
slope than a similar lower-order filter [27].

2. Ultimate Roll off Rate: The roll off of Butterworth filter is smooth and
monotonic. Usually expressed as the amount of attenuation in dB for a given ratio
of frequencies. The most common units are ``dB/octave'' and ``dB/decade''. While
the ultimate roll off rate will be 20 dB/decade for every filter pole in the case of a
low-pass or high-pass filter and 20 dB/decade for every pair of poles for a band
pass filter, some filters will have steeper attenuation slopes near the cutoff
frequency than others of the same order [19].

3. Attenuation Rate near the Cutoff Frequency: If filter is intended to reject a
signal very close in frequency to a signal that must be passed, a sharp cutoff
characteristic is desirable between those two frequencies [27].

4. Transient Response: Curves of amplitude response show how a filter reacts to
steady-state sinusoidal input signals. Since a real filter will have far more
complex signals applied to its input terminals, it is often of interest to know how it
will behave under transient conditions. An input signal consisting of a step
function provides a good indication of this [27].

5. Monotonicity: A filter has a monotonic amplitude response if its gain slope never
changes sign. In other words, if the gain always increases with increasing
frequency or always decreases with increasing frequency. Obviously, this can
happen only in the case of a low-pass or high-pass filter. A band pass or notch
filter can be monotonic on either side of the center frequency, however [27].

6. Passband Ripple: Butterworth filters have a very flat pass band with no ripples.
If a filter is not monotonic within its passband, the transfer function within the
passband will exhibit one or more ``bumps''. These bumps are known as ``ripple''.
Some systems don't necessarily require monotonicity, but do require that the
passband ripple be limited to some maximum value (usually 1 dB or less).
Although bandpass and notch filters do not have monotonic transfer functions,
they can be free of ripple within their passbands [19, 27].

7. Stopband Ripple: Some filter responses also have ripple in the stopbands. We
are normally unconcerned about the amount of ripple in the stopband, as long as
the signal to be rejected is sufficiently attenuated. Given that the ``ideal'' filter
amplitude response curves are not physically realizable, we must choose an
acceptable approximation to the ideal response. The word ``acceptable'' may have
different meanings in different situations. The acceptability of a filter design will
depend on many interrelated factors, including the amplitude response
characteristics, transient response, the physical size of the circuit and the cost of
implementing the design [19, 27].

8. Pass Band Gain: With active filters, it is possible to achieve a pass band gain
higher than 1. Most active filters employ an amplifier, which determines the pass
band gain of the filter. Filters with a flat pass-band gain are commonly used, and
such a response is provided by Butterworth filters. Another class of filters called
Chebyshev filters, provide a ripple (or overshoots in) pass-band gain [19].




3.6.2 First Order Low Pass Butterworth Filter

Fig. 3.10 shows a first-order low-pass filter that uses an RC network for filtering.

Figure 3.10. First Order Low Pass Butterworth Filter


Derivation of Transfer Function

The RC network behaves as a voltage divider supplied by vi, and hence the voltage at the
non-inverting terminal of the op-amp is given as [24]:
i v
jXc R
jXc
v

=
+
..(3.6)
The above equation reduces to:
fRC j
v
v
i
2 1+
= + ...(3.7)
We know that the output of an op-amp non-inverting amplifier is given by:
+ + = v )
R
R
1 ( v
1
F
0 ....(3.8)
Substituting for v+ from the previous equation,
i
1
F
0 v )
fRC 2 j 1
1
)(
R
R
1 ( v
+
+ = .(3.9)

)
f
f
( j 1
A
v
v
H
F
i
0
+
= ...(3.10)
Where
RC
fH
2
1
=

fH = high cut off frequency of the filter
AF = = +
1
1
R
RF
pass-band gain of the filter
f is the frequency of the input signal
The gain magnitude and phase angle equations for the filter can be obtained as
2
H
F
i
0
) f f ( 1
A
v
v
+
= (3.11)

and
= tan
-1 ) (
H f
f

..................................................(3.12)

The operation of the low-pass filter can be verified from the gain magnitude equation
[19]:
1. At very low frequencies that is f < fH , F
i
0
A
v
v
.
2. At cut-off frequency, that is f = fH,
2
A
v
v F
i
0
= .
3. At higher frequencies that is f > fH, F
i
0
A
v
v
< .

3.6.3 First Order High Pass Butterworth Filter

Fig. 3.11 shows a first-order high-pass filter that uses an RC network for filtering. The
circuit is formed by interchanging the positions of R and C from the low pass filter
circuit.

Figure 3.11. First Order High Pass Butterworth Filter

Derivation of transfer function
Assuming that RC network behaves as a voltage divider
i
C
v
jX R
R
v

=
+
....(3.13)
The equation 3.13 reduces to
i v
fRC 2 j 1
fRC 2 j
v
+

=
+
...(3.14)
The output of the non-inverting amplifier is
+
+ = v )
R
R
1 ( v
1
F
0 ...(3.15)
Substituting v+ from the previous equation 2.10
i
1
F
0 v )
fRC 2 j 1
fRC 2 j
)(
R
R
1 ( v
+

+ = (3.16)
)
)
f
f
( j 1
) f
f
( j
( A
v
v
L
L
F
i
0
+
= ....(3.17)
Where fL =
RC 2
1

fL= low cut-off frequency of the filter
AF=pass band gain of the filter
f is the frequency of the input signal

The gain magnitude of the high pass filter is given by the equation [10], [19]
2
L
L F
i
0
) f f ( 1
) f f ( A
v
v
+
= (3.18)

3.6.4 Second Order Filters

Second order filters provide -40 dB/decade roll-off in the stop-band, and hence perform
better frequency selection than the first order type. With second order, and higher-order
filters, we can obtain interesting frequency responses. Consider the two frequency
responses shown in fig 3.12.


Figure 3.12. Second Order Low Pass Responses

Butterworth filters give us a reasonably flat gain in the pass-band, whereas the
Chebyshev filters show a ripple or overshoot in the frequency response. The trade-off is
that at the cut-off frequency, Chebyshev filter shows a higher roll-off rate. These
frequency response types are determined the damping factor of the filter circuits.

Damping Factor: The damping factor (DF) of an active filter circuit determines which
response characteristics the filter exhibits whether, Butterworth or Chebyshev or others
[24]. The damping factor is determined by the negative feedback circuit and is defined by
the following equation:
1
2
R
R
DF
F
= ..(1.19)
To achieve a second-order Butterworth response, for example, the damping factor must
be 1.414. Therefore, to implement this damping factor, the feedback resistor ratio must be
1
1
586 . 0
586 . 0 414 . 1 2 2
R R
DF
R
R
F
F
=
= = = =
..(1.20)
Hence, for a second-order Butterworth response, RF = 0.586 R1.

3.6.5 Second Order Low Pass Butterworth Filter

A second order low-pass filter provides a 40 dB/decade roll-off rate in the stop-band
[24]. The first order low-pass filter can be converted into a second-order type simply by
using an additional RC network (as seen in fig. 3.13).

Figure 3.13. Second Order Low Pass Butterworth Filter
The gain of the filter is set by R1 and RF, while the high cut-off frequency (fH) is set by
RA, CA, RB and CB as follows:
B A B A
H
C C R R
f
2
1
= ...(3.21)
The voltage gain magnitude equation is given as:
4
H
F
i
0
) f f ( 1
A
v
v
+
= ....(3.22)

3.6.6 Second Order High Pass Butterworth Filter

The second order high pass filter can be formed from the low-pass filter simply by
interchanging the frequency determining resistors and capacitors, as shown in fig. 3.14.

Figure 3.14. Second Order High Pass Butterworth Filter




The low cut-off frequency is given as:
B A B A
L
C C R R
f
2
1
= ..(3.23)
The voltage gain magnitude equation is given as:
4
L
F
i
) f f ( 1
A
v
0 v
+
= ....(3.24)

As in the case of low pass type, AF should be 1.586 to ensure Butterworth response. In
other words, RF = 0.586R1. As second order low pass and high pass filters are the same
circuits except that the positions of resistors and capacitors are interchanged, the design
procedure for the high-pass filter is same as that for the low-pass filter [24]. The
frequency response of the second order high pass Butterworth filter is as shown in fig.
3.15.


Figure 3.15. Frequency Response of Second Order High Pass Filter


Chapter 4
INTRODUCTION TO TANNER EDA TOOL

4.1 Introduction

Tanner Tool is a SPICE Computer Analysis Programmed for Analog Integrated circuits.
Tanner Tool consists of the following Engine Machines:

1. S-EDIT (Schematic Edit)
2. T-EDIT (Simulation Edit)
3. W-EDIT (Waveforms Edit)
4. L-EDIT (Layout Edit)

Using these Engine tools, SPICE Programmes provides facility to the user to design and
simulate new ideas in analog integrated circuits before going to the time consuming and
costly process of chip fabrication.

4.2 S-EDIT (Schematic Edit)

S-Edit is hierarchy of files, modules and pages. It introduces symbol and schematic
modes. S-Edit provides the facility of:

1. Beginning a design
2. Viewing, drawing and editing of objects
3. Design connectivity
4. Properties, net lists and simulations
5. Instance and browser schematic and symbol mode

In S-Edit, the available components from the library can be selected to make the
schematic of the desired circuit. It explains the design process in detail in terms of file
module operation and module [23]. Effective schematic design requires a working
knowledge of the S-Edit design files consist of modules. A module is a functional unit of
design such as a transistor, a gate and an amplifier. Modules contain two components:
a) Primitives Geometrical objects created with drawing tools.
b) Instances References to other modules in file. The instanced module is the
original.
Two viewing modes of the S-Edit are:
a) Schematic mode This mode helps in creating or viewing a schematic.
b) Symbol mode It represents symbol of a larger functional unit such as
operational amplifier.

4.3 T-EDIT (Simulation Edit)

The heart of T-Spice operation is the output file (also known as the circuit description,
the net list and the input deck). This is a plain text file that contains the device statement
and simulation commands, drawn from the SPICE circuit description language with
which T-Spice constructs a model of the circuit to be simulated. Input files can be created
and modified with any text editor.
T-Spice is a tool used for simulation of the circuit. It provides the facility of
a) Design Simulation
b) Simulation commands
c) Device Statements
d) User-defined External Models
e) Small Signal and noise models
T-spice uses Kirchoffs Current Law (KCL) to solve circuit problems. To T-Spice, a
circuit is a set of devices attached to the nodes. The voltage at all nodes represents the
circuit state. T-Spice solves for a set of node voltage that satisfied KCL (implying that
sum of currents flowing into each node is zero).
In order to evaluate whether a set of node voltages is a solution, T-Spice computers and
sums all the current flowing out of each device into nodes connected to it (its terminals).
The relationship between the voltages at device terminals and the currents through the
terminal is determined by the device model for a resistor of resistance R is
I = V/R
Where V represents the voltage difference across the device.

4.3.1 DC Operating point Analysis

DC operating point analysis finds a circuits steady-state condition, obtained (in
principle) after the input voltages have been applied for an infinite amount of time. The
.include command causes T-Spice to read in the contents of the model file ml2_125.md
for the evaluation of transistors m1n and m1p. This file (which must be in the same
directory as invert1.sp) consists of two .model commands, describing two MOSFET
models called nmos and pmos:
.model nmos nmos
+ Level=2 Ld=0.0u Tox=225.00E-10
+ Nsub=1.066E+16 Vto=0.622490 Kp=6.326640E-05
+ Gamma=0.639243 Phi=0.31 Uo=1215.74
+ Uexp=4.612355E-2 Ucrit=174667 Delta=0.0
+ Vmax=177269 Xj=0.9u Lambda=0.0
+ Nfs=4.55168E+12 Neff=4.68830 Nss=3.00E+10
+ Tpg=1.000 Rsh=60 Cgso=2.89E-10
+ Cgdo=2.89E-10 Cj=3.27E-04 Mj=1.067
+ Cjsw=1.74E-10 Mjsw=0.195

. model pmos pmos
+ Level=2 Ld=0.03000u Tox=225.000E-10
+ Nsub=6.575441E+16 Vto=-0.63025 Kp=2.635440E-05
+ Gamma=0.618101 Phi=0.541111 Uo=361.941
+ Uexp=8.886957E-02 Ucrit=637449 Delta=0.0
+ Vmax=63253.3 Xj=0.112799u Lambda=0.0
+ Nfs=1.668437E+11 Neff=0.64354 Nss=3.00E+10
+ Tpg=-1.000 Rsh=150 Cgso=3.35E-10
+ Cgdo=3.35E-10 Cj=4.75E-04 Mj=0.341
+ Cjsw=2.23E-10 Mjsw=0.307
ml2_125.md assigns values to various Level 2 MOSFET model parameters for both n-
and p-type devices. When read by the input file, these parameters are used to evaluate
Level 2 MOSFET model equations, and the results are used to construct internal tables of
current and charge values. Values read or interpolated from these tables are used in the
computations called for by the simulation. Two transistors, m1n and m1p, are defined in
invert1.sp. These are MOSFETs, as indicated by the key letter m, which begins their
names. Following each transistor name are the names of its terminals. The required order
of terminal names is: draingatesourcebulk. Then the model name (nmos or pmos in
this example), and physical characteristics such as length and width, is specified. The .op
command performs a DC operating point calculation and writes the results to the file
specified in the Simulate > Start Simulation dialog. The output file lists the DC operating
point information for the circuit described by the input file.

4.3.2 DC Transfer Analysis

DC transfer analysis is used to study the voltage or current at one set of points in a circuit
as a function of the voltage or current at another set of points. This is done by sweeping
the source variables over specified ranges, and recording the output. The .dc command,
indicating transfer analysis, is followed by a list of sources to be swept, and the voltage
ranges across which the sweeps are to take place.
For example, for inverter with dc input V
in
and output out, V
in
will be swept from 0 to 3
volts in 0.02 volt increments, and V
dd
will be swept from 2 to 4 volts in 0.5 volt
increments. The transfer analysis will be performed as follows: V
dd
will be set at 2 volts
and vin will be swept over its specified range; V
dd
will then be incremented to 2.5 volts
and V
in
will be reswept over its range; and so on, until V
dd
reaches the upper limit of its
range. The .dc command ignores the values assigned to the voltage sources V
dd
and V
in
in
the voltage source statements, but they must still be declared in those statements. The
results for nodes in and out are reported by the .print dc command to the specified
destination.

4.3.3 Transient Analysis

Transient analysis provides information on how circuit elements vary with time. The
basic T-Spice command for transient analysis has three modes. In the default mode, the
DC operating point is computed, and T-Spice uses this as the starting point for the
transient simulation.
.tran 2n 600n
.print tran in out
For the commands shown above, The .tran command specifies the characteristics of the
transient analysis to be performed: it will last for 600 nanoseconds, with time steps no
larger than 2 nanoseconds.

4.3.4 AC Analysis

AC analysis characterizes the circuits behavior dependence on small-signal input
frequency. It involves three steps: (1) calculating the DC operating point; (2) linearizing
the circuit; and (3) solving the linearized circuit for each frequency.
Vin1 in1 GND 2
Vdd Vdd GND 5.0
vbias vbias GND 0.8
vdiff in2 in1 -0.0007 AC 1 90
.ac DEC 5 1 100MEG
.print ac vdb(out)
.print ac vp(out)
.acmodel opamp1m.out {*}
For the commands shown above, three voltage sources (besides V
dd
) are defined. vdiff
sets the DC voltage difference between nodes in2 and in1 to 0.0007 volts; its AC
magnitude is 1 volt and its AC phase is 90 degrees.
Vin1 sets node in1 to 2 volts, relative to GND.
vbias sets node vbias to 0.8 volts, relative to GND.
The .ac command performs an AC analysis. Following the .ac keyword is information
concerning the frequencies to be swept during the analysis. In this case, the frequency is
swept logarithmically, by decades (DEC); 5 data points are to be included per decade; the
starting frequency is 1 Hz and the ending frequency is 100 MHz.
The two .print commands write the voltage magnitude (in decibels) and phase (in
degrees), respectively, for the node out to the specified file. The .acmodel command
writes the small-signal model parameters and operating point voltages and currents for all
circuit devices (indicated by the wildcard symbol *) to the file opamp1m.out.
This example will generate two output files: opamp1.out, specified by the Simulate >
Start Simulation command, and opamp1m.out, specified by the .acmodel command.

4.3.5 Noise Analysis

Real circuits, of course, are never immune from small, random fluctuations in voltage
and current levels. In T-Spice, the influence of noise in a circuit can be simulated and
reported in conjunction with AC analysis. The purpose of noise analysis is to compute the
effect of the noise associated with various circuit devices on an output voltage or voltages
as a function of frequency. Noise analysis is performed in conjunction with AC analysis;
if the .ac command is missing, then the
.noise command is ignored. With the .ac command present, the .noise command causes
noise analysis to be performed at the same frequencies: starting at 1 Hz, ending at 100
MHz, 5 data points per decade. The .noise command takes two arguments: the output at
which the effects of noise are to be computed, and the input at which the noise can be
considered to be concentrated for the purposes of estimating the equivalent noise spectral
density [22].

4.4 W- EDIT (Waveform Edit)

The ability to visualize the complex numerical data resulting from VLSI circuit
simulation is critical to testing, understanding and improving these circuits. W-Edit is a
waveform viewer that provides ease of use, power and speed in flexible environment
designed for graphical data representation. The advantages of W-Edit include;
a) Tight integration with T-Spice, Tanner EDAs circuit level simulator. W-Edit can
chart data generated by T-Spice directly, without modification of the output text
data files. The data can also be charted dynamically as it is produced during the
simulation.
b) Chart can automatically configure for the type of data being presented.
c) A data is treated by W-Edit as a unit called a trace. Multiple traces from different
output files can be viewed simultaneously in single or several windows; traces can
be copied and moved between charts and windows. Trace arithmetic can be
performed on existed tracing to create new ones.
d) Chart views can be panned back and forth and zoomed in and out, including
specifying the exact X-Y co-ordinate range.
e) Properties of axes, traces, rides, charts, text and colors can be customized.
Numerical data is input to W-Edit in the form of plain or binary text files. Header and
comment information supplied by T-Spice is used for automatic chart configuration. Run
time update of results is made possible by linking W-Edit to a running simulation in T-
Spice. W-Edit saves data with chart, trace, axis and environment settings in files with the
WDB (W-Edit Database) [22].



4.5 L-EDIT (Layout Edit)

It is a tool that represents the masks that are used to fabricate an integrated circuit. It
describes the layout design in terms of files, cells and mask primitives. On the layout
level the component parameters are totally different from schematic level. So, it provides
the facility to the user to analyze the response of circuit before forwarding it to the time
consuming and costly process of fabrication. There are rules for designing layout diagram
of a schematic circuit using which user can compare the output response with the
expected one [22].

4.5.1 L-Edit: An Integrated Circuit Layout Tool

In L-Edit layers are associated with masks used in fabrication process. Different layers
can be conveniently represented by different colors and patterns. L-Edit describes a
layout design in terms of files, cells, instances and mask primitives. One may load as
many files as desired into memory. A file may be composed of any number of sets. These
cells may be hierarchically related, as in a typical design, or they may be independent, as
in a library file. Cells may contain any number or combination of mask primitives and
instances of other cells.

Cells: The Basic Building Blocks

The basic building block of the integrated circuit design in L-edit is a cell.
Design layout occurs within cells. A cell can:
Contain part or all of entire design.
Be referenced in other cells as a sub-cell, or instance.
Be made up entirely of instances of other cells.
Contain original drawn objects, or primitives.
Be made up entirely of primitives or a combination of primitives and instances of other
cells.
Hierarchy

L-Edit supports fully hierarchical mask design. Cells may contain instances of other cells.
An instance is a reference to a cell; should you edit the instanced cell, the change is
reflected in all the instances of that cell. Instances simplify the process of updating a
design, and also reduce data within the instanced cell instead, only a reference to the
instanced cell is stored, along with the information on the position of instance and on how
the instance may be rotated or mirrored. There is no preset limit to the size or complexity
of hierarchy. Cells may contain instances of other cells that in turn contain instances of
other cells, to an arbitrary number of levels (subject only to hardware constraints).
L-Edit does not use a separated hierarchy: instances and primitives may coexist in the
same cell at any level in the hierarchy. Design files are self-contained. The pointer to a
cell contained in an instance always points to a cell within the same design file. When
cells are copied from one file to another, L-Edit automatically copies across any cells that
are instanced by the copied cell, to maintain the self-contained nature of the destination
file.

Design Rules

Manufacturing constraints can be defined in L-Edit as design rules. Layout can be
checked against these design rules.

Design Features

L-Edit is a full-custom mask editor. Manual layout can be accomplished more quickly
because of L-Edits intuitive user interface. In addition, one can construct special
structures to utilize a technology without, worrying about problems caused by automatic
transformations. Phototransistors, guard bars, vertical and horizontal bipolar transistors,
static structures and Schottky diodes, for example, are as easy to design in CMOS-bulk
technology as are conventional MOS transistors.
Floor plans

L-Edit is a manual floor-planning tool. One has the choice of displaying in outline,
identified only by name, or as fully fleshed-out mask geometry. When he displays his
design in outline, he can manipulate the arrangement of the cells in the design quickly
and easily to achieve the desired floor plan.
One can manipulate instances at any level in the hierarchy, with insides hidden or
displayed, using the same graphical move/select operations or rotation/mirror commands
that he use on primitive mask geometry.

Memory Limits

In L-Edit, one can make your design files as large as one like, given available RAM and
disk space.

Hard Copy

L-Edit provides the capability to print hard copy of the design. A multistage option
allows very large plots to be printed to a specific scale on multiple 8 x 11 inch page.
An L-Edit macro is available to support large-format, high-resolution, color plotting on
inkjet plotters.

Variable Grid

L-Edits grid options support lambda-based design as well as micron based and mil-based
design.

Error Recovery

L-Edits error-trapping mechanism catches system errors and in most cases provides a
mean to recover without losing or damaging data.
L-Edit Module

L-Edit
TM
: a layout editor
L-Edit Extract
TM
: a layout extractor
L-Edit DRC
TM
: a design rule checker
L-Edit is a full featured, high performance, interactive, graphical mask layout editor. L-
Edit generates layouts quickly and easily, supports fully hierarchical design, and allows
an unlimited number of layers, cells, and level of hierarchy. It includes all major drawing
primitives and supports 90
o
,

45
o,
and all-angle drawing modes.

L-Edit Extract creates SPICE- compatible circuit netlists from

L-Edit layouts. It can
recognize active and passive devices, sub circuits and the most common device
parameters, including resistance, capacitance, device length, width, and area, and device
source and drain area.

L-Edit DRC features user- programmable rules and handles minimum width, exact
width, minimum space, minimum surround, non-exist, overlap, and extension rules. It
can handle full chip and region-only DRC. DRC offers Error Browser and Object
browser functions for quickly and easily cycling through rule-checking errors [22].



Chapter 5
TELESCOPIC OTA:
DESIGN, SIMULATION AND SYNTHESIS

5.1 Introduction

This chapter starts with the general theory of operational amplifiers
and OTA (operational transconductance amplifier). Thereafter, a
detailed study of Telescopic OTA is done. The chapter presents the
design steps for Telescopic OTA along with the design. Simulation
results of the schematic and layout of Telescopic OTA are shown in
the end.

5.2 Operational Amplifier

Operational amplifiers are an integral part of many analog and mixed and mixed-signal
systems. Opamps with vastly different levels of complexity are used to realize functions
ranging from dc bias generation to high-speed amplification or filtering. The design of
opamp continues to pose a challenge as the supply voltage and transistor channel lengths
scale down with each generation of CMOS technologies.
Operational Amplifier is defined as high gain differential amplifier. By high, we
mean a value that is adequate for the application, typically in the range of 10
1
to 10
5.
since
opamps are usually employed to implement a feedback system, there open loop gain is
chosen according to the precision required of the closed-loop circuit [18]. An ideal
opamp has infinite differential voltage gain, infinite input resistance, and zero output
resistance. In reality opamp only approaches these values. The term buffered and
unbuffered is used to distinguish between high output resistance (Operational
Transconductance Amplifier) and low output resistance amplifiers (voltage operational
amplifiers) [9].


5.2.1 Performance Parameters

The optimal selection of opamp to be used in a particular application is often the key
factor, which determines the success or failure of the circuit. There is a wide variety of
op-amps available, from those requiring only 1 volt supply with bias currents of the 10 -
15 amp range, to those that will output hundreds of volts at tens of amps. There are many
more parameters of opamp, which would be taken into consideration.

1. Gain the open loop gain of an opamp determines the precision of the feedback
system employing the opamp. Trading with speed and output voltage swings, the
minimum required gain must be known. A high open loop gain may also be
necessary to suppress linearity.
2. Bandwidth The speed performance of the opamp is described by small and
large signal parameters. The small signal analysis determines the frequency
response sketched by a set of poles and zeroes. Since we have to ensure stability,
one of the poles must be dominant. The amplitude bode diagram will display a 20
dB/decade roll-off until the gain reaches 0dB. The frequency at which the gain
becomes 0dB is called gain bandwidth. With a constant roll-off 20 dB/decade of
the achieved unity gain frequency equal to the product of gain and bandwidth.
The 3dB frequency may also be specified to allow easier prediction of the closed-
loop frequency response.
3. Common mode rejection ratio The common mode rejection ratio (CMRR) of
an operational amplifier is the ratio between the differential gain and the common
mode gain.
CMRR = 20log
10
(A
D
/A
C
) in decibel,
Typical CMRR values for CMOS amplifiers are in the range 60dB to 80 dB.
The CMRR is an important requirement.
4. Power supply rejection ratio The PSRR is defined as the product of the ratio
of the change in supply voltage to the change in output voltage of the opamp
caused by the change in the power supply and the open-loop gain of the opamp.
An ideal opamp would have an infinite PSRR.
5. Output swing this the maximum swing of the output node without producing a
significant degradation of opamp performance. Since we have to leave some room
for the operation of the devices connected between the output nodes and the
supply nodes, the output swing is only a fraction of (V
dd
V
ss
). Typically it
ranges between 60% and 80% of (V
dd
V
ss
). Within the output swing range the
response of the opamp should confirm to given specifications and in particular the
harmonic distortion should remain below the required level.
6. Slew rate Opamps used in feedback circuits exhibit a large signal behavior
called slewing. This is the maximum achievable time derivative of the output
voltage. It is measured using the opamp in the open loop or the unity gain
configuration. A large input step voltage fully imbalances the input differential
stage and brings the opamp output response into the slewing conditions. The
positive slew rate can be different from the negative slew rate depending on the
specific design. Typical values ranges between 40 and 80 V/s, but micro-power
circuits can show much lower figures [18].
7. Power consumption This is the power consumed under stand by conditions. the
power used in the presence of a large signal can significantly exceed the one
required in the quiescent conditions. Moreover, the consumed power depends on
the speed specifications. Typically, higher bandwidth leads to higher power
consumption. Low power operation is a very important quality factor. A key
design task is to achieve the minimum power consumption for a given required
speed [3].

5.2.2 Opamp Topologies

A telescopic OTA can be used in many applications like filter design because of its
simplicity over other designs, allowing for higher-speed operation. In a folded-cascode
design, there is an input differential pair and two separate current branches for the
differential output. The input currents are mirrored with a cascoded configuration to
produce the output currents. The telescopic architecture puts both the input differential
pair and the output on the same two current branches. This approach eliminates the noise
problems caused by the current mirrors and also leads to a more direct signal path, which
allows for higher speed. Another advantage of the telescopic architecture is that it uses
half the bias current of a folded-cascode design because it has two fewer branches for
current. Fig 5.1 (a), (b) and (c) shows the three conventional topologies. Third topology is
two-stage opamp in which an additional stage is used. First stage is for high gain and
second stage is for high swing. To obtain higher gain, first stage can incorporate cascode
devices. An opamp used in a hearing aid must operate with supply voltages as low as
0.9V while delivering single-ended output swings as large as 0.5 V. In such cases, two-
stage opamp is used [13].

Figure 5.1. (a) Telescopic opamp

Figure 5.1. (b) Folded cascode opamp


Figure 5.1. (c) Two stage opamp

The above three topologies have been compared in the table shown below. The clear
comparison between the three makes it easy to evince why Telescopic has been used
for the application of filter [3].

Table 5.1. Comparison of performance of various opamp topologies.

Gain Speed
Power
Dissipation
Output
swing
Noise
Telescopic Medium Highest Low Medium Low
Folded
cascode
Medium High Medium Medium Medium
Two stage High Low Medium Highest Low


5.3 OTA (Operational Transconductance Amplifier)

An OTA is a voltage controlled current source, more specifically the term operational
comes from the fact that it takes the difference of two voltages as the input for the current
conversion. The ideal transfer characteristic is therefore
I
Out
= g
m
(V
In+
V
In
) (5.1)
or, by taking the pre-computed difference as the input,
I
Out
= g
m
V
In
...(5.2)
with the ideally constant transconductance g
m
as the proportionality factor between the
two. In reality the transconductance is also a function of the input differential voltage and
dependent on temperature.
The term transconductance comes about because the ratio of the output current over the
input voltage, g
m
, has the unit of a conductance if looked at across the amplifier. The
proportional factor of output vs. input for an amplifier with current input and voltage
output has the unit of a resistance and such an amplifier is called a transresistance
amplifier.
An ideal OTA has two voltage inputs with infinite impedance (i.e. there is no input
current), as shown in fig. 5.2. The common mode input range is also infinite, while the
differential signal between these two inputs is used to control an ideal current source (i.e.
the output current does not depend on the output voltage) that functions as an output. The
proportionality factor between output current and input differential voltage is called
transconductance.


Figure 5.2. Ideal OTA

Any real OTA will thus have circuitry to process the input voltages with low input
current over a wide common mode input range, to produce an internal representation of
the input differential voltage and to provide a current to the output that is relatively
independent of the output voltage. Since an OTA can be used without feedback, the
maximum output current and with it the transconductance can often be adjusted [1].
The simplest version of the single stage OTA is the telescopic architecture. The term
buffered and unbuffered is used to distinguish between high output resistance
(Operational Transconductance Amplifier) and low output resistance amplifiers (voltage
operational amplifiers).

5.4 Telescopic OTA

The gain that can be achieved by a single stage is around 40 dB. Thus, in order to achieve
80dB or so it is necessary to use a cascade of two stages. However, two stages bring
about two poles one close to the other and this requires compensation network, besides
increasing the global complexity, reduces the design flexibility.
A cascade with cascode load permits us to achieve high gain without the disadvantage of
having two poles one close to each other. Therefore the use of cascode based OTA is an
interesting solution alternative to the two stages OTA [3, 9,18].
The simplest version of the single stage OTA is the telescopic architecture, shown in fig.
3.3, the input differential pair injects the signal currents into common gate stages. Then,
the circuit achieves the differential to single ended conversion with a cascode current
mirror. The transistors are placed one on the top of the other to create a sort of Telescopic
composition (this led to the circuit name as telescopic opamp). The small signal
resistance at the output node is quite high, it is the parallel connection of two cascode
configurations. Such a high resistance benefits the small signal gain without limiting the
circuit functionality when we require an OTA function. By inspection of the circuit one
finds the low frequency small signal differential gain is proportional to the square of the
product of a transistor transconductance and the output resistance.


Figure 5.3. A conventional telescopic opamp

Thus, as expected the telescopic cascode achieves a gain similar to the one of the two
stages architecture. Moreover, by inspection of the circuit, all the nodes, excluding the
output, shows a pretty low small signal resistance. Node 1 is an equivalent ground for
differential signals: node 2, 3 and 4 are source terminals of transistors M3, M4 and M6,
respectively.
Assuming the capacitance is affecting the given nodes due to parasitic contributions, the
resulting time constants are much smaller than the one associated to the output node can
easily become the dominant pole of the circuit. Since the circuit shows one high
impedance node only, it is not possible to exploit the Miller effect to procure pole
splitting. A possible capacitance loading the output node permits to make dominant the
related pole and ensure stability [9, 18].
The telescopic configuration uses only one bias current. It flows through the differential
input stage, the common baser stage and differential to single ended converter.
The triode limit of M6 establishes the maximum allowed output voltage. By inspection of
the circuit it is given by
V
out,max
= V
DD
V
GS7
V
GS5
V
GS6
V
SAT,P
= V
DD
V
Th,P
2V
SAT,P
(5.3)
For typical situations it is 1V or more below the positive supply voltage.
The lower boundary of the output voltage depends the triode limit of M4 that, in turn
depends on V
b1
.
V
out,min
= V
b1
V
GS4
+ V
SAT,4
= V
b1
V
Th,n
(5.4)
Normally, the designer broadens the output swing by keeping low V
b1
.
However, the value of V
b1
affects the minimum level of the input common mode voltage.
V
in,cm
V
b1
- V
GS4
V
sat,2
+ V
GS2
= V
b1
2V
SAT,n
(5.5)
In turn the input common mode voltage should allow M9 to be in saturation region.
V
in,cm
> V
SAT,9 +
V
GS2
....(5.6)
Therefore, we can achieve an optimum negative swing (3Vsat,n above ground) keeping
the input common mode voltage as low as V
SAT,9
+V
GS2
approximately equal to V
Th,n
+
2V
SAT
. Assuming a symmetrical output swing around V
out,max
and V
out,min
the output
common mode voltage becomes
V
out,cm
= V
DD
+ V
b1
V
Th,n
V
Th,p
2V
SAT,p
..(5.7)
This for a typical design is a bit higher than V
b1
. Thus, the output common mode voltage
is different (higher) than the input common mode voltage. This in some applications is a
limit.
A telescopic cascode opamp typically has a higher frequency capability and consumes
less power than other topologies. The disadvantage of a telescopic opamp is severely
limited output swing. In a conventional telescopic opamp shown in fig. 5.3, all transistors
are biased in the saturation region. Transistors M1-M2, M7-M8 and the tail current
source M9 must have at least V
DS,SAT
to offer a good common-mode rejection (CMRR).
To allow for process and temperature variations, a small safety margin V
margin
is often
added to their V
DS
to ensure saturation. The maximum differential output swing of a
telescopic opamp is shown to be 2Vsup 10V
DS,SAT
6V
margin
, where V
sup
is the supply
voltage. With typical V
DS,SAT
of 200 mV and V
margin
of 100mV , the output swing is
limited to 2V
sup
2.6V . In a 3 V supply system; this represents a 45% reduction of
available output swing [13]. Although a telescopic opamp without the tail current source
improves the differential swing by 2V
DS,SAT
+2V
margin
(600 mV), the CMRR is
compromised. Moreover, performance parameters (such as unity-gain frequency) of an
opamp with no tail or with a tail transistor in the linear region are sensitive to input
common-mode and supply voltage variation which is undesirable in most analog systems
[15].

5.4.1 Frequency Compensation

The need for compensation arises because |H| does not drop to unity well before H
reaches 180. Stability can be achieved by:
1. Minimizing the overall phase shift, thus pushing the phase crossover out.
2. Dropping the gain, thereby pushing the gain crossover in.
The first approach requires that we attempt to minimize the number of poles in the signal
path by proper design. Since, each additional stage contributes atleast one pole, this
means the number of stages must be minimized, a remedy that yields low voltage gain
and/or limited output swing. The second approach, on the other hand, retains the low
frequency gain and the output swings but it reduces the bandwidth by forcing the gain to
fall at lower frequencies.

Figure 5.4 Telescopic opamp single ended output with constant current tail

In a signal path number of poles can be identified: path 1 contains a high frequency pole
at 2, mirror pole at 5, mirror pole at 6 and high frequency pole at 4; path 2 contains high
frequency pole at 3.the output resistance of the opamp is much higher than the small-
signal resistances seen at the other nodes in the circuit, it is expected even with a
moderate load capacitance, the output pole,
p,out,
is closest to the origin. Called the
dominant pole,
p,out
usually sets the open loop 3dB bandwidth. After the dominant
pole the first non dominant pole will be at node 6. This is because the total capacitance
is higher than at the other nodes. Nodes 4 and (2 or 3) have equal small-signal resistances
to ground but node 4 suffer from much more capacitance. Thus, node 4 contributes the
next nondominant pole. The poles at nodes 2 and 3 are nearly equal and their
corresponding terms in the transfer functions of path 1 and path 2 can be factored out.
Thus, they count as one pole rather than two. Active current mirror exhibits zeroes so two
zeroes will also be contributed located at twice the mirror pole frequency.
The loop gain is dropped such that the gain crossover point moves towards the origin. To
accomplish this, lower the frequency of the dominant pole by increasing the load
capacitance. The key point is that the phase contribution of the dominant pole in the
vicinity of the gain or the phase crossover points is close to 90 and relatively
independent of the location of the pole [3].

5.4.2 Differential Stage

Figure 5.5. Differential input pair telescopic OTA


A differential stage is widely used as the input stage of the opamp. Fig. 5.5 shows its
CMOS configuration. It is made of two transistors with their source common, fed by
current source. The transistors may either be n-channel or p-channel and they are
matched to each other. If the two transistors are in saturation region, we can write
2
1
1
) (
2
Th GS
OX
V V
L
W C
I |

\
|
=

..(5.8)
2
2
2
) (
2
Th GS
OX
V V
L
W C
I |

\
|
=

.(5.9)
where (W/L)
1
and (W/L)
2
are exactly equal, the transistors being matched. Moreover, in
the above equations the output conductance has been neglected. The input signals can be
expressed as
V
GS1
= V
GS0
+ V
in
/2...(5.10)
V
GS1
= V
GS0
V
in
/2.(5.11)
where V
GS0
is the common mode component and V
in
is a differential signal. Since the
bias current can be expressed as
2
1
1
2 1 ) (
2
Th GS
OX
ss V V
L
W C
I I I |

\
|
= + =

..(5.12)
Therefore, in the differential stage, like in the case of the inverter with active load,
the transconductance gain increases with the square root of the bias current [9].

5.4.3 Biasing circuit for OTA

The amplifier stage needs various dc bias voltages and currents for their proper operation.
An essential step in the design of an amplifier using MOS transistor is the establishment
of an appropriate DC operating point for the circuit. This is step known as biasing or bias
design. An appropriate DC operating point or bias point is characterized by a stable and
predictable DC drain current I
d
and a DC drain source voltage, V
DS
that ensures operation
in the saturation mode for all expected signal levels [2].
It is important to place the DC operating point of an amplifier well within the saturation
region of the MOSFET in order to maximize the output voltage swing of the amplifier
while maintaining linear operation.
There are various biasing circuits available each having some positive and negative
points associated with them. Current mirror circuits are found suitable for providing
constant biasing few of them are listed below:
a) Cascode current mirror
b) Wilson current mirror
c) Widlar current source

Some simplified biasing circuits are shown here. One of these will be used in the
Telescopic OTA circuit later in this chapter. As shown in fig. 5.3 there is a requirement
of a constant voltage, V
bias
to be applied at the gate of M9 this bias can be generated by
various configurations. The configurations used in this thesis are shown in fig. 5.6 (a) and
(b). The configurations are chosen because of its simplicity, fewer transistors used and
less voltage headroom.


Figure 5.6. (a) Biasing circuit with diode connected load (b) Biasing circuit with gate grounded load

Choosing a current I
b
, the aspect ratios of M9 and M10 for fig. 5.6(b) can be calculated as
follows
V
GS10
= V
dd
V
bias
(5.13)

V
GS11
= V
bias
V
ss
(5.14)

Aspect ratios of the transistors can be calculated as follows:

) (
2
, 10
10
n Th GS
b
V V Cox
I
L
W

= |

\
|

.(5.15)

) (
2
, 11
11
n Th GS
b
V V Cox
I
L
W

= |

\
|

..(5.16)
Similarly, choosing a current of the bias chain I
b
, the aspect ratios of M9 and M10 can be
calculated for fig. 5.6(b)
As , V
GS10
= 0 V
bias
(5.17)
V
GS11
= V
bias
V
ss
(5.18)
Therefore, aspect ratios of the transistors can be calculated as follows:

) V V ( Cox
I 2
L
W
n , Th 10 GS
b
10

=
|

\
|
.(5.19)
) V V ( Cox
I 2
L
W
n , Th 11 GS
b
11

=
|

\
|
..(5.20)


5.5 Design of Telescopic OTA

The design of Telescopic OTA has been shown in steps so
as to understand the procedure better. The steps has been
defined first and then explained with the help of the example.
The transistor names are same as shown in fig. 5.3.

5.5.1 Steps to design Telescopic OTA

1. First step is to define the specifications of the Telescopic OTA. The design
specification includes Slew rate, Load capacitance, Power dissipation, Supply
voltages, DC gain and unity gain bandwidth.

2. To get an estimate of the bias current assume GBW by the dominant pole.

L Th GS
SS
T
C V V
I
f
1
) (
2
2

= (5.21)
where I
SS
is the tail current.

3. Distribute the overdrive voltages among the transistors in one leg (of cascaded
transistors). Same is done for the other leg.

4. Design tail transistor M9 and calculate W/L of this transistor by using the current
equation for the condition of saturation. The equation is

2
9
) (
2
Th GS
OX
SS V V
L
W C
I |

\
|
=

.(5.22)

5. Calculate the bias V
b2
of transistor M9 using this equation
V
b2
= V
GS9
- V
Th
(5.23)

6. The differential pair of the circuit, by assuming both of them to be working in
saturation mode. W/L of the transistors can be calculated using current equation
for the condition of saturation.

2
1
) ( Th GS OX SS V V
L
W
C I |

\
|
= ..(5.24)
7. Design the bias circuit for the tail transistor. Determine V
b2
and then compute the
W/L of the two transistors using the current equation for the condition of
saturation. The current is mirrored from the cascode arrangement to the tail
transistors.
Th b V V V = 2 1 ...(5.25)

8. Design the cascode current mirror stage where there are four PMOS transistors
which are identical and the current passing through them is same as the drain and
gate current passing through them is same as the drain and gate are tied to each
other. W/L can be calculated by the current equation as follows

2
8 , 7 , 6 , 5
) ( Th GS OX SS V V
L
W
C I |

\
|
= (5.26)
where V
GS
= V
DD
3V
Th,p
.


5.5.2 Design of Telescopic OTA with defined specifications

1. Slew rate = 1000 V/ s
Load capacitance, C
L
= 0.5 pF
Power dissipation < 3 mW
Supply voltages = V 5 . 2
DC gain = 70 dB
UGB = 500 MHz

2. After calculating and taking some margin tail current we get I
ss
= 500 A

3. Now, distributing the overdrive voltages as 1 V for the tail transistor, 200 mV for
the differential pair (four NMOS transistors) and 250 mV for the cascode current
mirror stage where there are four PMOS transistors.

4. Design tail transistor M9 and calculate W/L of this transistor by using the current
equation for the condition of saturation. The equation is

2
9
5
6
) 1 (
2
10 33 . 6
10 500 |

\
|
=

L
W
(5.27)

9
|

\
|
L
W
= 15
W= 30
L = 2
L is taken as 2. Accordingly, W is calculated. L can be taken 5 , 10 or
any nominal value.

5. Calculate the bias V
b2
of transistor M9 using this equation
V
GS9
V
Th
= 1.(5.28)
V
b2
= 0.9V

6. The differential pair of the circuit, by assuming both of them to be working in
saturation mode. W/L of the transistors can be calculated using current
equation for the condition of saturation.

2
2 , 1
5 6
) 2 . 0 ( 10 33 . 6 10 500 |

\
|
=

L
W
(5.29)

2 , 1
|

\
|
L
W
= 197.5
W= 395
L = 2
Considering the same conditions for the pair M3 and M4.

4 , 3
|

\
|
L
W
= 197.5
W= 395
L = 2

7. Design the bias circuit for the tail transistor. Compute the W/L of the two
transistors using the current equation for the condition of saturation. The current
is mirrored from the cascode arrangement to the tail transistors. The calculations
are

2
11
5
6
) 6 . 0 5 . 2 9 . 0 (
2
10 33 . 6
10 500 + |

\
|
=

L
W
(5.30)

11
|

\
|
L
W
= 15.79
W= 32
L= 2
Considering the body effect for M10, V
Th
is calculated using the equation

( ) F F SB T Th V V V 2 2 0 + = (5.31)
( ) 31 . 0 31 . 0 5 . 2 9 . 0 6392 . 0 622 . 0 + + = Th V .(5.32)
Th V = 0.99 V
) 99 . 0 9 . 0 5 . 2 (
2
10 33 . 6
10 500
10
5
6
+ |

\
|
=

L
W
2
(5.33)

10
|

\
|
L
W
= 2.72
W = 6
L = 2

8. Design the cascode current mirror stage where there are four PMOS transistors
which are identical and the current passing through them is same as the drain and
gate current passing through them is same as the drain and gate are tied to each
other. W/L can be calculated by the current equation as follows

2
8 , 7 , 6 , 5
5 6
) 25 . 0 ( 10 64 . 2 10 500 |

\
|
=

L
W
(5.34)

8 , 7 , 6 , 5
|

\
|
L
W
= 303
W = 606
L = 2











Table 5.2 Calculated Aspect ratios for the telescopic OTA

Transistor
name
W/L
(in m)
M1 395/2
M2 395/2
M3 395/2
M4 395/2
M5 606/2
M6 606/2
M7 606/2
M8 606/2
M9 30/2
M10 6/2
M11 32/2


5.5.3 Simulation results of OTA

This section discusses the results obtained by the schematic level simulations. The
schematic drawn in S-Edit module of Tanner EDA Tool and the simulations are done
in T-Spice module of Tanner EDA Tool.
The DC gain of the Telescopic OTA has been simulated in T-Spice, Level 2 by
applying differential input. The schematic of the Telescopic OTA is shown in fig. 5.7,
a constant current source is used and the frequency response curve and phase
response is shown in fig 5.8 and fig. 5.9. This simulation with constant current source
at the tail is done to verify the response when simulated with transistors at the tail
later on.
The node names correspondence of the schematic to fig 5.3 is shown in Table 5.3:


Table 5.3 Node name correspondence of fig 5.3 with fig 5.7
Fig. 3.3 1 2 3 4 5 6 7
Fig. 3.7 N3 N1 N2 P2 P3 P1 V
out





Figure 5.7. Schematic of the Telescopic OTA with constant current source at the tail.











Figure 5.8. Frequency response of the Telescopic OTA with constant current source at its tail
















Figure 5.9 Phase response of the Telescopic OTA with constant current source at its tail

The simulation results are as follows:
DC Gain : 72.5 dB
UGB : 395.34 MHz
Phase Margin : 52





The Telescopic OTA is again simulated with schematic, fig. 5.10, with bias circuit as
shown in fig 5.6(a). The results are well justified as the response matches the
response of the OTA with constant current source. This means the circuit is
generating same current as the constant current source. The frequency response and
phase response is shown in fig. 5.11 and fig. 5.12 respectively.


Figure 5.10. Schematic of the Telescopic OTA with bias circuit at the tail.










Figure 5.11. Frequency response of the Telescopic OTA with bias circuit at its tail













Figure 5.12 Phase response of the Telescopic OTA with bias circuit at its tail

The simulation results of the Telescopic OTA with bias circuit at the tail are as
follows:
DC Gain : 72.5 dB
UGB : 395.34 MHz
Phase Margin : 52
Thus, the results are in compliance with the previous results.


5.5.4 Analysis of the Simulation Results

During simulations, fine-tuning of the transistor dimensions has been done to meet
the desired specifications.
1. It is observed that by reducing the C
L
further leads to increase in UGB. But it
leads to system instability as shown by phase margin.
2. The input offset voltage has been adjusted to keep transistors in saturation region.
3. The response curves of the Telescopic OTA with constant current source at the
tail in place of transistor M9 and with transistor M9 with its gate fed in by bias
circuit, are giving same results. This proves that the bias applied at the gate of the
tail transistor M9 leads to I
SS
= 500 A.
4. As slew rate decreases with increase in C
L
, the UGB also decreases.

5.5.5 Physical Design of Telescopic OTA

The physical design of OTA is shown in fig. 5.13. The layout is drawn using L-Edit
(Tanner Tool). While designing layout special analog layout methods like fingering,
centroid geometry etc have been used to take care of matching issues and other
related problems. Interdigitization and common centroid techniques are used for
matched transistors and fingered structures are used for large sized transistors. The
UGB of the frequency response of the layout of Telescopic OTA shows a fall because
of the high capacitance appearing at the load.











Figure 5.13. Layout of Telescopic OTA








Figure 5.14. Frequency response of layout of Telescopic OTA



Chapter 6
ACTIVE-RC BUTTERWORTH FILTERS: DESIGN AND
ANALYSIS

6.1 Introduction

This chapter throws light on the reason behind study on Active RC Butterworth
filter. The design steps for the design of Active-RC Butterworth filter are discussed
later in this chapter. Further, design of 6
th
order active-RC Butterworth filter is
explained with simulations and results. The layout of the filter is also made and
simulated. The different order of filters are designed, simulated and analyzed in
terms of roll-off rates, passband frequency and power dissipation.

6.2 Active-RC Butterworth Filter

The oldest technology of realizing filters makes use of inductors and capacitors, and
the resulting circuits are called passive LC filters. Such filters work well at high
frequencies; however, in low frequency applications (DC to 100 kHz) the required
inductors are large and physically bulky, and their characteristics are quite non-ideal.
Furthermore, such inductors are impossible to fabricate in monolithic form and are
compatible with any of the modern techniques for assembling electronic systems.
Therefore, there has been considerable interest in finding filter realizations that do not
require inductors. Of the various possible types of inductorless filters, Active-RC
filters and switched capacitor filters are most common. Later in this chapter Active-
RC filter design has been discussed. Active-RC filters utilize opamps together with
resistors and capacitors and are fabricated using discrete, hybrid thick-film, or hybrid
thin-film technology. However for large volume production, such technologies do not
yield the economies achieved by monolithic IC fabrication [2].
The active-RC filters can be used in channel selection filtering in W-CDMA
applications [17]. Active-RC filter is often selected as anti-aliasing filter due to its
high linearity and low power, among which Sallen-key filter is popular because it is
easy to analyze and design [14]. So, an active-RC filter may contain an OTA plus RC
components. The simplest Active-RC Butterworth filter (1
st
order) is shown in fig.
6.1. The Active-RC Butterworth filter has range of advantages when used for lower
order of the filter:
1. Active filters have excellent linearity
2. These filters have low power dissipation
3. These filters are easy to design and analyze.
4. The response of theses filters is insensitive to parasitics.
5. Active-RC Butterworth filters have large Dynamic range.



Figure 6.1. 1
st
order opamp based Active-RC filter




6.3 Design steps to design Active-RC Butterworth filter

The steps have been made to design an active-RC Butterworth filter. These are as
follows:
1. An active device is chosen for the filter. It may be an opamp, OTA or DDA
(Differential Difference Amplifier).
2. The specifications for the design of active device are laid down keeping an
emphasis on the UGB, power dissipation and the supply voltages used. The
design steps for OTA have been mentioned in Chapter 5.
3. Design the active device in accordance with the specifications. Simulate the
schematic on the simulation tool and check its performance.
4. Lay down specifications for filter. The filter design process begins with the filter
user specifying the transmission characteristics required for the filter. The
transmission of a low pass filter is specified by four parameters:
a) The passband edge
s
.
b) The maximum allowed variation in passband transmission A
max
.
c) The stopband edge
p
.
d) The minimum required stopband attenuation, A
min
.

Figure 6.2. Low pass filter response
5. Calculate for which order of filter does the design specifications suit. For the
Butterworth filter the order can be calculated if the four parameters mentioned
above are given. Transfer function of the Butterworth filter can be calculated
subsequently.
The Butterworth low-pass filter exhibits a monotonically decreasing transmission
zeros at = , making it an all pole filter. The magnitude function for an Nth
order Butterworth filter with a passband edge
p
is given by
N
p
j T
2
2
1
1
) (
|

\
|
+
=

..(6.1)
At =
p

2
1
1
(

+
= p j T (6.2)
Thus, the parameter determines the maximum variation in passband
transmission, A
max
, according to
2
max 1 log 20 + = A (6.3)
The determination of order as per the specifications and the transfer function can
be in following steps:
a) Determination of .
1 10
10
max
=
A
.(6.4)
It can be seen that the first 2N1 derivatives of T relative to are zero at
=0. This property makes the Butterworth response very flat near =0 and gives
the response the name maximally flat response. The degree of passband flatness
increases as the order N is increased.
b) Determine the filter order, N.
At the edge of the stopband =
p
, the attenuation of the Butterworth filter is
given by
] ) / ( 1 log[ 10 ] ) p / s ( 1 / 1 log[ 20 ) s ( A
N 2
p s
2 N 2 2
+ = + = ..(6.5)
This equation can be used to determine the filter order required, which is the
lowest integer value of N that yields A(
s
) A
min.
d) Determine the N natural modes.
The natural modes of Nth order Butterworth filter can be determined from the graphical construction. The graphical modes lie on
a circle of radius p(1/)
1/N

and are spaced by equal angles of /N, with the first mode at an angle /2N from the +j axis, as shown in fig. 6.3. Since the
natural modes all have equal radial distance from the origin they all have the same frequency 0 = p(1/)
1/N
.

Figure 6.3. Graphical construction for determining the poles of a Butterworth filter of order N. All the
poles lie in the left half of the s plane on a circle of radius
0
=
p
(1/)
1/N


d) Determine transfer function, T(s).
Once the N natural modes p1, p2, p3,.pN have been found, the transfer function can be written as

) ....( )......... )( (
) (
) (
2 1
0
N
N
p s p s p s
K
s T

=

(6.6)
where K is constant equal to the required DC gain of the filter [2].
6. Calculate the values of feedback resistors in order to get the specified passband
gain. R
F
/R
1
ratio is set for the desired gain. For example, for the 1
st
order
Butterworth filter shown in fig. 6.1 R
F
/R
1
is kept as 1.
AF = = +
1
1
R
RF
pass-band gain of the filter
7. Calculate the values of RC components to get the desired frequency response.
Fix value of capacitor. Take the least feasible value of capacitors as high
capacitances take more area in the layout. For the defined passband frequency
the value of resistance can then be calculated as R = 1/2
p
C.

6.4 Design of 6
th
order Active- RC Butterworth filter

Active-RC Butterworth filter is the most commonly used filter. Butterworth filter is
known for its maximally flat band pass and good transient response. Following are the
steps for the design of 6
th
order Active-RC Butterworth filter.

1. Selection of the active device. For the Active-RC filter design first step is to
select the active component. For the filter. DDA, OTA and opamps are the few
options. OTA has been chosen as the active device for this design.
The conventional operational amplifier (op amp) is used as the active device in the vast
majority of the active filter literature. For design purposes, the assumption that the op
amp is ideal A
V
= , Rin = , R
0
= 0

is generally made, and large amounts of feedback
are used to make the filter gain essentially independent of the gain of the op amp. A host
of practical filter designs have evolved following this approach. It has also become
apparent, however, that operational amplifier limitations preclude the use of these filters
at high frequencies, attempts to integrate these filters have been unsuccessful (with the
exception of a few non-demanding applications), and convenient voltage or current
control schemes for externally adjusting the filter characteristics do not exist [20].
But OTAs offer improvements in design simplicity and programmability when compared
to op amp based structures as well as reduced component count. Many of the basic OTA
based structures use only OTAs and capacitors and, hence, are attractive for integration.
Component count of these structures is often very low (e.g., second-order biquadratic
filters can be constructed with two OTAs and two capacitors) when compared to VCVS
designs. Convenient internal or external voltage or current control of filter characteristics
is attainable with these designs.


Figure 6.4 (a) OTA Symbol. (b) Equivalent circuit of ideal OTA.

The symbol used for the OTA is shown in fig. 6.4(a), along with the ideal small signal
equivalent circuit. The transconductance gain, g
m
, is assumed proportional to I
ABC
. The
proportionality constant h is dependent upon temperature, device geometry, and the
process [5].
g
m
= hI
ABC
.(6.7)
The output current is given by
I
o
= g
m
(V
+
- V
-
) ..(6.8)
As shown in the model, the input and output impedances in the model assume ideal
values of infinity. Current control of the transconductance gain can be directly obtained
with control of I
ABC.
Since techniques abound for creating a current proportional to a
given voltage, voltage control of the OTA gain can also be attained through the I
ABC
input
[20].
So, OTAs are better candidates for the design of Active-RC filter as compared to opamps.
DDA is also formed of two single ended OTAs.
Next, matter to be thought is which OTA should be used amongst all the topologies of the
OTAs. As discussed in Chapter 5 with a comparison table (Table 5.1), telescopic OTA is
a good candidate for the application of filter design because of following reasons:
a) Noise is low in Telescopic OTA.
b) Power dissipation is least.
c) Speed is highest
d) Gain is medium.
From the above points, it can be seen as a filter should have low noise, low power
dissipation and high speed. Medium gain is enough for the filter design as emphasis on
getting better passband is made [3].

2. Specifications of the OTA. The specifications for the design of active device are
laid down keeping an emphasis on the UGB, power dissipation and the supply
voltages used. The OTA design has been discussed in full in Chapter 5. same
steps are to be followed with same specifications.

3. Simulations of the schematic. The design was simulated using Tanner EDA tool.
The results are, DC gain = 72.5dB, UGB = 395.34 MHz and Phase margin =
52deg, as shown in Chapter 5.

4. Specifications of filter. The specifications have been laid down as follows:
a) The passband edge
s
=

600MHz.
b) The maximum allowed variation in passband transmission A
max
=

1dB.
c) The stopband edge
p
=

15MHz.
d) The minimum required stopband attenuation, A
min
= 180dB.
e) DC Gain = 7.724

5. Calculations to know the order of the filter.
a) Determination of .

5088 . 0
1 10
10
1
=
=

..(6.9)

b) Determine the filter order, N.
At the edge of the stopband =
p
, the attenuation of the Butterworth filter is
given by
] ) 15 / 600 ( 5088 . 0 1 log[ 10 180
2 2 N
+ = ..(6.10)
18 2
10 965 . 1 ) 40 ( =
N

For N=5,
16 2
10 048 . 1 ) 40 ( =
N

This gives, A(
s
) = 157.27dB
For N=6
19 2
10 677 . 1 ) 40 ( =
N

This gives, A(
s
) = 189dB
N=6 is the lowest integer value of N that yields A(
s
) A
min.
So, filter order
should be 6.

c) Determine the 6 natural modes.
The natural modes of 6
th
order Butterworth filter can be determined from the graphical construction. The graphical modes lie on
a circle of radius p(1/)
1/N

and are spaced by equal angles of /N = 30, with the first mode at an angle /2N = 15 from the +j axis. Since the natural
modes all have equal radial distance from the origin they all have the same frequency,
0 = p(1/)
1/N
= 16.78 10
6
rad/sec.(6.11)
Now, the poles are calculated as
p1 = (cos105 + jsin105) 16.78 10
6
= ( 4.34 + j16.2) 10
6

p2 = (cos 135 + jsin135) 16.78 10
6
= (11.86 + j11.86) 10
6
p3 = (cos165 + jsin165) 16.7810
6
= (16.2 + j4.34) 10
6
p4 = (cos195 + jsin195) 16.7810
6
= (16.2 j4.34) 10
6
p5 = (cos225 + jsin225) 16.7810
6
= (11.86 j11.86) 10
6

p6 = (cos255 + jsin255) 16.7810
6
= (4.34 j16.2) 10
6

So, the transfer function can now be found. The transfer function of the filter is as
follows

\
|
|
|

|

=
)
12
10 27 . 281
6
10 4 . 32 js
2
s (
1
44
10 72 . 1 ) s ( T
.

|
|

\
|
)
12
10 31 . 281
6
10 72 . 23 js
2
s (
1
.
(
(

(
|
|

\
|

12
10 27 . 281
6
10 68 . 8 js
2
s
1

..(6.12)
6. Calculate the values of feedback resistors. As per calculations the 6
th
order
Butterworth filter suits the specifications defined.
For this, three 2nd order filters should be used. So, there are three gain stages to
be defined. On the basis of these gain stages R
F
/R
1
have been calculated.
The passband gain for the three stages is 1.152, 2.235 and 3 for the subsequent
stages. Thus, R
F
/R
1
for the three stages are calculated as follows:
AF = = +
1
1
R
RF
pass-band gain of the filter
R
F1
/R
11
= 0.152
For R
11
= 2k, R
F1
= 304
R
F2
/R
12
= 1.235
For R
12
= 4k, R
F2
= 4.940K
R
F3
/R
13
= 2
For R
13
= 3k, R
F3
= 6k

7. Calculate the RC components. Taking the value of capacitor as C = 0.005 pF.
The value for resistor is 10 k. There is a marginal difference taken between the
desired passband frequency and calculated. This is because of the active
component reduces the passband frequency.

6.5 Simulation results of the 6
th
order Butterworth filter

This section discusses the results obtained by the schematic level simulations. The
schematic drawn in S-Edit module of Tanner EDA Tool and the simulations are done
in T-Spice module of Tanner EDA Tool.
The schematic of the 6
th
order Butterworth filter is shown in fig. 6.5. The schematic
shows three stages of 2
nd
order filters. The frequency response of the 6
th
order
Butterworth filter is shown in fig. 6.6.

























Figure 6.5. Schematic of the 6
th
order Active-RC Butterworth filter




















Figure 6.6. Frequency response of the 6
th
order low-pass Active-RC Butterworth filter


The simulation results are as follows:
DC Gain = 13.94 dB
Passband frequency,
p
= 12.63 MHz
Roll-off rate = 140 dB/dec





6.5.1 Analysis of the simulation results

During simulations some components were varied to see the effects on the frequency
response.
1. There is a difference between the calculated values and the simulated
results.
2. No zero has been observed in the frequency response. Zero is at infinite
frequency in case of Butterworth filter. So, the response has been justified.
3. When the R
F
/R
1
has been defined as a ratio. If the values of R
F
and R
1

were varied in same ratio but with different values it affects the gain with
little variation.
4. Decreasing the value of RC shows an increase in the passband frequency.
5. Change in values of RC does not affect the DC gain. RC governs the
passband frequency and R
F
/R
1
decides the passband gain.

6.5.2 Physical design of the 6
th
order Active-RC Butterworth filter

The physical design of the 6
th
order Active-RC Butterworth filter is shown in fig. 6.7.
The layout is drawn in L-Edit (Tanner Tool). While designing layout special analog
layout methods like fingering, centroid geometry etc have been used to take care of
matching issues and other related problems. Interdigitization and common centroid
techniques are used for matched transistors. There is a little difference in the results
as compared to the schematic results. This is because of the capacitive effects
consideration. The frequency response of the layout is shown in fig. 6.8.



The results are as follows:
DC Gain = 13.94 dB
Passband frequency,
p
= 15 MHz
Roll-off rate = 131 db/dec



Figure 6.7. Layout of the 6
th
order Active-RC Butterworth filter













Figure 6.8. Frequency response of the 6
th
order Active-RC Butterworth Filter






6.6 Analysis of different orders of Active-RC Butterworth Filter

With the increase in filter order various parameters of the filter changes. As filter
order of the Active-RC filter increases, the roll-off rate of the filter response
approaches to the brick-wall response i.e. it approaches to the response of ideal filter
[2]. The number of components also increases with the increase in the order of the
Active-RC filter [19]. As active device used in the filter decreases the filter passband
frequency, the increase in active components, with increase in filter order decreases
the passband frequency [2].
To analyze the above said changes in the filter parameters with increase in filter order
an analysis is done starting from the 1
st
order Active-RC Butterworth filter to 6
th

order Active-RC Butterworth filter. This also shows that with the help of the design
procedure laid down in previous sections, designing for other filter orders can be done
easily and quickly.
Different filter specifications have been taken to analyze different order of Active-RC
Butterworth filter. The OTA used is of same specification as for the 6
th
order Active-
RC Butterworth filter. The schematic and corresponding frequency response curves
of the 1
st
order to 5
th
order filters are shown in fig. 6.9 to fig. 6.13. The ratios of R
F
/R
1

for different orders are tabulated in Table 6.2. The response of the 6
th
order filter is
shown in fig. 6.6. The simulation results have been compiled and shown as below in
Table 6.2.


Table 6.1 Ratios of R
F
/R
1
for different stages in different orders of filters

Filter
Order
R
F1
/R
11
R
F2
/R
12

R
F3
/
R
13

1 1
2 0.586
3 0.152 1.235
4 0.152 1.25
5 1 0.152 1.25
6 1.152 1.235 2




(a)
(b)
Figure 6.9 (a) Schematic of the 1
st
order Active-RC Butterworth filter. (b) Frequency response of the
1
st
order Active-RC Butterworth Filter

(a)
(b
) Figure 6.10 (a) Schematic of 2
nd
order Active-RC Butterworth filter. (b) Frequency response of the
2
nd
order Active-RC Butterworth Filter


(a)
(b)
Figure 6.11 (a) Schematic of 3
rd
order Active-RC Butterworth filter. (b) Frequency response of the 3
rd

order Active-RC Butterworth Filter.
(a)
(b)
Figure 6.12 (a) Schematic of 4
th
order Active-RC Butterworth filter. (b) Frequency response of the 4
th

order Active-RC Butterworth Filter


(a)
(b
)
Figure 6.13 (a) Schematic of 5
th
order Active-RC Butterworth filter. (b) Frequency response of the 5
th

order Active-RC Butterworth Filter



Table 6.2 Change in filter parameters with increase in filter order
Filter
Order
Roll-off
rate
(db/dec)

p

MHz)

s

(MHz)
A
min

simulated
(dB)
A
min

calculated
(dB)
Power
Dissipation
(mW)
Passband
gain
(dB)
1 -25.08 29.26 1000 50 29 2.50076 20.94
2 -48.94 26.28 536.09 55 49.5 2.5013 3.27
3 -75 17.29 709.58 100 93.85 5.00155 3.34
4 -92.33 15.06 600 110 125.09 5.00165 6.28
5 -130 13.34 593.37 150 161 7.50132 6.00
6 -140 12.63 533.22 180 192 7.50152 13.94



The response curves of the filter frequency response have been analyzed and few
parameters have been computed like A
min
, to justify the design of the filters of
different orders. The error in the calculated and simulated values of A
min
is shown
with the help of a graph (fig. 6.17). The fashion in which roll-off rate, passband
frequency and power dissipation changes, is shown with the help of the graph by
taking the simulated values shown in Table 6.2.














In fig. 6.14 the comparison of the theoretical values of roll-off rates with the
simulated values is shown in Table 6.2. As filter order is increasing, roll-off rate is
also increasing with a minor deviation from the theoretical values.


Comparison of roll-off rates
-160
-140
-120
-100
-80
-60
-40
-20
0
0 1 2 3 4 5 6 7
Filter order
R
o
l
l
-
o
f
f

r
a
t
e
s

i
n

d
B
/
d
e
c
Standard roll-off rates
simulated rol-off rates
Figure 6.14 Comparison of roll-off rates of simulated and theoretical values



With the increase in the filter order the passband frequency reduces as shown in the
fig. 6.15. The graph is drawn for the values shown in Table 6.2.


Pass band
0
5
10
15
20
25
30
35
0 1 2 3 4 5 6 7
Filter order
P
a
s
s

b
a
n
d

f
r
e
q
u
e
n
c
y

i
n

M
H
z
Figure 6.15 Comparison of roll-off rates of simulated and theoretical values










The number of components increases with increase of the filter order. The values
have been taken from Table 6.2. The increase in power dissipation with the increase
in filter order is shown in fig. 6.16.
power dissipation
0
1
2
3
4
5
6
7
8
0 1 2 3 4 5 6 7
Fi lt er order

Figure. 6.16 Increase in power dissipation with increase in filter order.











In Table 6.2, calculated and simulated results of A
min
have been listed down. There is
a little difference observed in simulated and calculated values. To view the difference
between the two values a graph has been plot as shown in fig. 6.17.

Figure 6.17. Variation in simulated values from calculated values.

From the observations integrated in Table 6.1, following conclusions are drawn that
are in agreement with the literature.
1. With increase in filter order the roll-off rate is increasing.
2. The passband frequency decreases as filter order increases because of the increase
in number of active components.
3. Power dissipation is increasing as the filter order increases. This is because of
increase in number of components. But power dissipation is significantly due to
the active component.

Attenuation gain error
0
50
100
150
200
250
0 1 2 3 4 5 6 7
Filter Order
Attenuation gain
Assumed values
Simulated values
Chapter 7
CONCLUSION AND FUTURE SCOPE

7.1 Conclusion

Filter is a small component used in communication systems. There are various methods
to design a filter depending upon the specifications and the application in which the filter
has to be employed. Butterworth filter, known for its good transient response and
maximally flat pass band is used widely in communication systems. The design
procedure is developed for Active-RC Butterworth filter. For this first a selection is made
for the active device used. Telescopic OTA is selected and a design procedure to design
the Telescopic OTA is defined. The frequency response is simulated using the T-Spice
environment of Tanner EDA tool. The simulated results of the Telescopic OTA are in
compliance with the theoretical values.
The development of a design procedure provides a quick, well-integrated and effective
mechanism for estimating the filter parameters. The steps highlighted make it easy to
redesign the circuit for different sets of specifications. The design procedure is developed
keeping in view few approximations that are made on the basis of basic know-how of the
filter responses and the effect of the active device on the frequency response estimated by
RC network. The results of SPICE simulation for the 6
th
order Active-RC Butterworth
filter are shown in agreement with the results calculated by use of design equations and
methodology.
6
th
order Active-RC Butterworth filter designed, has passband frequency of 12.63MHz,
DC Gain of 13.94dB and roll-off rate of 140 dB/dec. So, this filter specifications are
quite favourable with that of the video-frequency CMOS IC-filters reported to date.
The physical mask layout of any circuit to be manufactured using a particular process
must confirm to a set of geometric constraints or rules, which are generally called layout
design rules. Using the analog layout techniques of matching transistors, fingered
structures and centroid geometry, the layouts are drawn. The results of the simulation of
layout are nearly same as that shown by the schematic of the filter.
Further, Active-RC filters of different orders are designed. The analysis is done to show
the change in filter parameters like roll-off rates, passband frequency, power dissipation
etc. with increase in order. The analysis shows that with increase in filter order, the
parameters change in accordance with the changes stated in literature. This analysis
validates the results of the filter design.

7.2 Future Scope

This is one method to design an Active-RC Butterworth filter using OTA. Other
active devices like DDA can also be used.
The design can be developed keeping in view low power and low voltages
constraints as the filters are now being used in many portable applications that
have requirement of low power and low voltages.
Methods can be developed to reduce the steep increase in power dissipation and
component count with increase in the filter order.
Active devices can be designed in such a away that they may not restrict the
passband frequency from expected passband frequency.




APPENDIX - A

This T-Spice if for the Telescopic OTA with constant current source at its tail.


* SPICE netlist written by S-Edit Win32 8.10
* Written on May 24, 2006 at 08:56:41

* Waveform probing commands
.probe
.options probefilename="om_one end_2 input sig.dat"
+ probesdbfile="C:\Documents and Settings\Jyoti\My Documents\nimisha\om_4th order
butterworth filter\telescopic_final_freeze\om_one end_2 input sig.sdb"
+ probetopmodule="Module0"

* Main circuit: Module0
M1 N1 vin1 N3 N8 NMOS L=2u W=395u AD=66p PD=24u AS=66p PS=24u
M2 N2 vin2 N3 N8 NMOS L=2u W=395u AD=66p PD=24u AS=66p PS=24u
M4 vout N4 N2 N8 NMOS L=2u W=395u AD=66p PD=24u AS=66p PS=24u
M5 P3 P3 P1 v1 PMOS L=2u W=606u AD=66p PD=24u AS=66p PS=24u
M7 P1 P1 v1 v1 PMOS L=2u W=606u AD=66p PD=24u AS=66p PS=24u
M3 P3 N4 N1 N8 NMOS L=2u W=395u AD=66p PD=24u AS=66p PS=24u
M8 P2 P1 v1 v1 PMOS L=2u W=606u AD=66p PD=24u AS=66p PS=24u
M6 vout P3 P2 v1 PMOS L=2u W=606u AD=66p PD=24u AS=66p PS=24u
C9 vout Gnd 0.5pF
i10 N3 N8 500uA
v11 vin1 N6 0.0 AC 1.0 0.0
v12 vin2 Gnd 0.0 AC 1.0 180
v13 N4 Gnd 0.8
v14 N6 Gnd 40u
v15 Gnd N8 2.5
v16 v1 Gnd 2.5
.ac dec 10 1 1g
.print vdb(vout) vp(vout)
.op
.include "C:\Tanner\TSpice91\models\ml2_125.md"
End of main circuit: Module0







APPENDIX B

This T-Spice is for the Telescopic OTA with bias circuit that provides bias at the gate of
the tail transistor.


* SPICE netlist written by S-Edit Win32 8.10
* Written on May 18, 2006 at 10:45:39

* Waveform probing commands
.probe
.options probefilename="OMNAMAHSHIVAY_2end_simple tail.dat"
+ probesdbfile="C:\Documents and Settings\Jyoti\My Documents\nimisha\om namah
shivay\with simple tail\OMNAMAHSHIVAY_2end_simple tail.sdb"
+ probetopmodule="Module0"

* Main circuit: Module0
M3 P3 vb N1 N5 NMOS L=2u W=395u AD=66p PD=24u AS=66p PS=24u
M1 N1 vin1 N3 N5 NMOS L=2u W=395u AD=66p PD=24u AS=66p PS=24u
M4 vout vb N2 N5 NMOS L=2u W=395u AD=66p PD=24u AS=66p PS=24u
M2 N2 vin2 N3 N5 NMOS L=2u W=395u AD=66p PD=24u AS=66p PS=24u
M9 N3 O N5 N5 NMOS L=2u W=15u AD=66p PD=24u AS=66p PS=24u
M10 N10 N10 O N4 NMOS L=2u W=12.8u AD=66p PD=24u AS=66p PS=24u
M11 O O N4 N4 NMOS L=2u W=15u AD=66p PD=24u AS=66p PS=24u
M7 P1 P1 V1 V1 PMOS L=2u W=606u AD=66p PD=24u AS=66p PS=24u
M5 P3 P3 P1 V1 PMOS L=2u W=606u AD=66p PD=24u AS=66p PS=24u
M8 P2 P1 V1 V1 PMOS L=2u W=606u AD=66p PD=24u AS=66p PS=24u
M6 vout P3 P2 V1 PMOS L=2u W=606u AD=66p PD=24u AS=66p PS=24u
C12 vout Gnd 0.5pF
v13 vin1 N7 0.0 AC 1.0 0.0
v14 vin2 Gnd 0.0 AC 1.0 180
v15 N7 Gnd 100u
v16 N10 Gnd 2.5
v17 V1 Gnd 2.5
v18 vb Gnd 0.8
v19 Gnd N4 2.5
v20 Gnd N5 2.5
.ac dec 10 1 1g
.print vdb(vout) vp(vout)
.op
.include "C:\Tanner\TSpice91\models\ml2_125.md"
End of main circuit: Module0


APPENDIX C

This T-Spice is for 6
th
order Active-RC Butterworth filter.

* SPICE netlist written by S-Edit Win32 8.10
* Written on May 23, 2006 at 12:23:13
* Waveform probing commands
.probe
.options probefilename="6th order.dat"
+ probesdbfile="C:\Documents and Settings\Jyoti\My Documents\nimisha\6th order\6th
order.sdb"
+ probetopmodule="Module0"

.SUBCKT om vin1 vin2 vout Gnd
M1 N1 vin1 N3 N13 NMOS L=2u W=395u AD=66p PD=24u AS=66p PS=24u
M2 N2 vin2 N3 N13 NMOS L=2u W=395u AD=66p PD=24u AS=66p PS=24u
M4 vout N11 N2 N13 NMOS L=2u W=395u AD=66p PD=24u AS=66p PS=24u
M5 P3 P3 P1 v1 PMOS L=2u W=606u AD=66p PD=24u AS=66p PS=24u
M7 P1 P1 v1 v1 PMOS L=2u W=606u AD=66p PD=24u AS=66p PS=24u
M3 P3 N11 N1 N13 NMOS L=2u W=395u AD=66p PD=24u AS=66p PS=24u
M8 P2 P1 v1 v1 PMOS L=2u W=606u AD=66p PD=24u AS=66p PS=24u
M6 vout P3 P2 v1 PMOS L=2u W=606u AD=66p PD=24u AS=66p PS=24u
i10 N3 N13 500uA
C11 vout Gnd 0.5pF
v11 N11 Gnd 0.8
v12 Gnd N13 2.5
v13 v1 Gnd 2.5
.ENDS

* Main circuit: Module0
C1 N7 o1 .005pf
C2 N8 Gnd .005pf
C3 N5 Gnd .005pf
C4 N2 o2 .005pf
C5 N10 vout .005pf
C6 N11 Gnd .005pf
Xom_1 N8 F1 o1 Gnd om
Xom_2 N5 F2 o2 Gnd om
Xom_3 N11 F3 vout Gnd om
R7 Gnd F1 2K TC=0.0, 0.0
R8 F1 o1 304 TC=0.0, 0.0
R9 vin N7 10k TC=0.0, 0.0
R10 N7 N8 10k TC=0.0, 0.0
R11 N2 N5 10k TC=0.0, 0.0
R12 o1 N2 10k TC=0.0, 0.0
R13 F2 o2 4940 TC=0.0, 0.0
R14 Gnd F2 4K TC=0.0, 0.0
R15 Gnd F3 3k TC=0.0, 0.0
R16 F3 vout 6k TC=0.0, 0.0
R17 o2 N10 10k TC=0.0, 0.0
R18 N10 N11 10k TC=0.0, 0.0
v19 vin N6 0.0 AC 1.0 0
v20 N6 Gnd 40u
.ac dec 10 1 150meg
.print vdb(vin) vdb(vout)
.include "C:\Tanner\TSpice91\models\ml2_125.md"
.op
* End of main circuit: Module0

# This T-Spice is for the simulation of





















APPENDIX D

Papers Published:

During this work the following two review papers were accepted in the National
Conference on Emerging Trends in Electronics and Communication (sponsored by IEEE)
to be held on 14
th
- 15
th
September 2006 at Pardre Conceicao College of Engineering,
Verna, Goa.

1. Nimisha Saini, Jyoti Jain and Alpana Agarwal, Different Methods to Design
Analog CMOS Filters: A Review National Conference on Emerging Trends in
Electronics and Communication, September 2006.

2. Jyoti Jain, Nimisha Saini and Alpana Agarwal, Methods of Designing Elliptic Filter:
A Review National Conference on Emerging Trends in Electronics and
Communication, September 2006.




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