NAVODAYA INSTITUTE OF TECHNOLOGY,
RAICHUR – 584103
(Affiliated to VTU and UGC Autonomous 2025 - 2035)
B.E. in Electronics and Communication Engineering
MICROPROCESSOR AND ITS APPLICATIONS Semester 1/2
Course Code 25ECE114/124 CIE Marks 50
Teaching Hours/Week (L: T: P: S) (3:0:0:0) SEE Marks 50
Total Hours of Pedagogy 40 hours Theory Total Marks 100
Credits 03 Exam Hours 03
Examination Nature (SEE) Theory
Course Learning Objectives: The students will be able to
1. Familiarize basic architecture of 8085 and 8086 microprocessor
2. Program 8085 and 8086 Microprocessor using Assembly Level Language
3. Use Macros and Procedures in 8086 Programs
4. Understand interfacing of 16 bit microprocessor with memory and peripheral chips
involving system design
5. Understand the architecture of 8088, 8087 Coprocessor and other CPU architectures
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teacher can use to accelerate the attainment of the various
course outcomes.
1. Lecture method (L) does not mean only traditional lecture method, but different type of
teaching methods may be adopted to develop the outcomes.
2. Show Video/animation films to explain evolution of communication technologies.
3. Encourage collaborative (Group) Learning in the class.
4. Ask at least three HOTS (Higher order Thinking) questions in the class, which promotes
critical thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop
thinking skills such as the ability to evaluate, generalize, and analyze information rather than
simply recall it.
6. Show the different ways to solve the same problem and encourage the students to come up
with their own creative ways to solve them.
7. Discuss how every concept can be applied to the real world - and when that’s possible, it helps
improve the students’ understanding.
Module-1: 8085 Processor
8085 Processor: Historical background, 8085 CPU Architecture, Pin diagram, Addressing modes,
Machine language instruction formats, Machine coding the program.
Instruction set of 8085: Data transfer and arithmetic instructions. Control/Branch Instructions,
Illustration of these instructions with example programs
Teaching-Learning Chalk and Talk, YouTube videos, Power Point presentation
Process RBT Level: L1, L2 and L3
Module–2: 8086 Processor
8086 Processor: Historical background, 8086 CPU Architecture, Pin diagram, Addressing modes,
Machine language instruction formats, Machine coding the program.
Instruction set of 8086: Data transfer and arithmetic instructions. Control/Branch Instructions,
Illustration of these instructions with example programs.
Teaching-Learning Process Chalk and Talk, YouTube videos, Power Point presentation RBT Level:
L1, L2 and L3
Module–3: Stack and Interrupts
Stack and Interrupts: Introduction to stack, Stack structure of 8086, Programming for Stack.
Interrupts and Interrupt Service routines, Interrupt cycle of 8086, NMI, INTR, Interrupt
programming, Passing parameters to procedures, Macros, Timing and Delays.
Teaching-Learning Process Chalk and Talk, YouTube videos, Power Point presentation RBT Level:
L1, L2 and L3
Module–4: 8086 Bus Configuration, Timing Diagrams, and Peripheral Interfacing
8086 Bus Configuration and Timings: Physical memory Organization, General Bus operation
cycle, I/O addressing capability, Special processor activities, Minimum mode 8086 system and
Timing diagrams, Maximum Mode 8086 system and Timing diagrams.
Basic Peripherals and their Interfacing with 8086 (part-1): Static RAM, Interfacing with 8086
Interfacing I/O ports, PIO 8255, Modes of operation – Mode-0 and BSR Mode, Interfacing
Keyboard and 7-Segment digits using 8255
Teaching-Learning Process Chalk and Talk, YouTube videos, Power Point presentation RBT Level:
L1, L2 and L3
Module–5: Basic Peripherals and their Interfacing with 8086
Basic Peripherals and their Interfacing with 8086 (Part 2): Interfacing ADC-0808/0809, DAC-
0800, Stepper Motor using 8255. Timer 8254 – Mode 0, 1, 2 & 3 and Interfacing programmes for
these modes.
Other Architectures: Architecture of 8088 and Architecture of NDP 8087. Von-Neumann &
Harvard CPU architecture and CISC & RISC CPU architecture
Teaching-Learning Chalk and Talk, YouTube videos, Power Point presentation
Process RBT Level: L1, L2 and L3
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE)
is 50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of
50) and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks).
The student is declared as a pass in the course if he/she secures a minimum of 40% (40 marks out
of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together. .
Continuous Internal Evaluation:
• There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
• Each test shall be conducted for 25 marks. The first test will be administered after 4050%
of the coverage of the syllabus, and the second test will be administered after 8590% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
• Any two assignment methods mentioned in the 25OB2.4, if an assignment is project based
then only one assignment for the course shall be planned. The schedule for assignments
shall be planned properly by the course teacher. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned. Each assignment
shall be conducted for 25 marks. (If two assignments are conducted then the sum of the
two assignments shall be scaled down to 25 marks).
• The final CIE marks of the course out of 50 will be the sum of the scale-down marks of
tests and assignment/s marks. Internal Assessment Test question paper is designed to attain
the different levels of Bloom’s taxonomy as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module
(with a maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
Text Book:
1. Advanced Microprocessors and Peripherals - A.K. Ray and K.M. Bhurchandi, TMH, 3rd
Edition, 2012, ISBN 978-1-25-900613-5.
2. "Microprocessor Architecture, Programming, and Applications with the 8085" by Ramesh S.
Gaonkar.
Reference Books:
1. Microprocessor and Interfacing - Douglas V Hall, SSSP Rao, 3rd edition TMH, 2012.
2. Microcomputer systems-The 8086 / 8088 Family – Y.C. Liu and A. Gibson, 2nd edition, PHI -
2003.
3. The 8086 Microprocessor: Programming & Interfacing the PC – Kenneth J Ayala, CENGAGE
Learning, 2011.
4. The Intel Microprocessor, Architecture, Programming and Interfacing - Barry B. Brey, 6e,
Pearson Education / PHI, 2003.
Web links and Video Lectures (e-Resources):
1. https://youtu.be/MqWeH3zp5GY?si=V2K6eKB4O5O3tCWy
2. https://youtu.be/qyQNNqdk4-o?feature=shared
3. https://youtu.be/lj5L1nGZAwg?feature=shared
4. https://youtu.be/zqrZRsldg-s?feature=shared
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning:
• Group Discussion
• Poster Presentation
• Seminar
• NPTEL Certification Course
