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Hps Setup Main

The document provides a comprehensive guide for configuring a custom system on the DE1-SoC board, including steps for setting up a Quartus Prime project, building U-Boot, compiling the Linux kernel, and preparing an SD card with the necessary boot images. It details the installation of dependencies, the creation of a root filesystem using Yocto, and the process of burning the SD card image. Additionally, it includes instructions for transferring project files to the DE1-SoC board and running the application.

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0% found this document useful (0 votes)
2 views14 pages

Hps Setup Main

The document provides a comprehensive guide for configuring a custom system on the DE1-SoC board, including steps for setting up a Quartus Prime project, building U-Boot, compiling the Linux kernel, and preparing an SD card with the necessary boot images. It details the installation of dependencies, the creation of a root filesystem using Yocto, and the process of burning the SD card image. Additionally, it includes instructions for transferring project files to the DE1-SoC board and running the application.

Uploaded by

epsrkr
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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DE1-SoC: SD Card Boot Image Creation and Setup Guide

This document outlines the complete procedure to configure a custom system on the DE1-SoC board,
generate a bootable image, and prepare an SD card with Linux.

A. Quartus Prime Project Setup on Linux

1. Create Qsys System

 Launch Platform Designer (formerly Qsys) in Quartus Prime Lite.

 Add the required IPs (e.g., HPS, SDRAM controller, PLLs, etc.) based on your custom design
needs.

 Configure each component with your desired settings. If required adjust the address of the
given components

 Save and generate the HDL system.

2. Pin Assignment :-

 Use the GitHub download the pin planner file(.qsf) for de1 soc board otherwise use the
previous projects file

Github link:- https://github.com/norxander/DE1-SoC-HPSFPGA/blob/master/DE1_SoC.qsf

 Apply pin assignments in Quartus:

For assigning the pins we have to go to

Assignments -> import assignments ->add the file path and click OK
3. Create Top-Level Verilog Module

 Instantiate the generated Qsys system.(.qip file )

Location of the file :- project folder / qsys name folder /synthesis

Project folder :- our project folder

Qsys name folder :- the name which we are given to qsys same as like one folder is created

In that folder we have synthesis in that we have a file with haveing extension (.qip)

ex:- /home/user/Downloads/sdram_project/hps22/synthesis

 Add verilog file having an HPS instantiations and our logic.

 Put the verilog file as the top module and Run the design (only analysis and synthesis).

4. Run SDRAM TCL Scripts:-

 For Running the tcl scripts


 Go to Tools >> tcl scripts >> run parameters.tcl and pin_assignments.tcl

 After Running the 2 scripts .

4. Compile the Design

 Run full compilation in Quartus (Click on Complie Design).


 On success, locate the hps_isw_handoff directory inside the handoff/ folder. This will be
needed for U-Boot setup.

B. Build U-Boot

1. Clone and Checkout U-Boot

cd $TOP_FOLDER/cv_soc_devkit

mkdir -p software && cd software

mkdir bootloader && cd bootloader

git clone https://github.com/altera-opensource/u-boot-socfpga

cd u-boot-socfpga

git checkout -b test-bootloader -t origin/socfpga_v2022.04

2. Generate Board Support Package (BSP)

 Command 1:-

cd arch/arm/mach-socfpga/cv_bsp_generator

For running the python file :-

python3 cv_bsp_generator.py \ -i
/home/user/Downloads/sdram_project/hps_isw_handoff/soc_system_hps_0 \ -o
../../../../board/altera/cyclone5-socdk/qts

Note:- that Red directory is replaced with your project directory

 We have to come back to the directory (/software/bootloader/u-boot-socfpga)


 By clicking this command

cd ../../../..

Step 3,4 are use it for installing libraries (once done this process, next we don't want to do
it again )

3. Install Dependencies

sudo apt update && sudo apt install -y \


libncurses-dev gawk flex bison openssl libssl-dev

4. Install Cross-Compiler

Check:

which arm-none-linux-gnueabihf-gcc

If not present:

sudo apt install -y gcc-arm-linux-gnueabihf

5. Export Toolchain

export PATH=$HOME/Downloads/bin_things/gcc-arm-xxx/bin:$PATH

Note :- xxx replaced with the your system

export CROSS_COMPILE=arm-none-linux-gnueabihf-

6. Build U-Boot

Run the below commands to get the required packages:-

make socfpga_cyclone5_defconfig

make -j 48

To check if it is successfully executed or not by checking the below files are generated successfully
or not :-(if generated it is running successfully otherwise it won’t)

 spl/u-boot-spl – SPL ELF

 u-boot – U-Boot ELF

 u-boot-with-spl.sfp – Final bootable image


XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

We don't want to do this because it is used for binaries creation:-


C. Linux Kernel and RootFS

1. Install Yocto Build Dependencies

sudo apt install gawk wget git diffstat unzip texinfo gcc build-essential \

chrpath socat cpio python3 python3-pip python3-pexpect xz-utils debianutils \

iputils-ping python3-git python3-jinja2 libegl1-mesa libsdl1.2-dev pylint3 xterm \

python3-subunit mesa-common-dev zstd liblz4-tool

2. Setup Kernel Build

rm -rf linux && mkdir linux && cd linux

export LINUX_TOP=`pwd`

git clone https://github.com/altera-opensource/linux-socfpga.git

cd linux-socfpga

git checkout -b scarthgap -t origin/socfpga-6.6.22-lts

export ARCH=arm

export CROSS_COMPILE=arm-none-linux-gnueabihf-

3. Build Kernel

sudo apt install libgmp-dev libmpfr-dev libmpc-dev

make socfpga_defconfig

make -j 48 zImage Image dtbs modules

make -j 48 modules_install INSTALL_MOD_PATH=modules_install

rm -rf modules_install/lib/modules/*/build

rm -rf modules_install/lib/modules/*/source

4. Organize Binaries

mkdir -p ../linux-bin/a9

ln -s $LINUX_TOP/linux-socfpga/arch/arm/boot/zImage ../linux-bin/a9/

ln -s $LINUX_TOP/linux-socfpga/arch/arm/boot/Image ../linux-bin/a9/

ln -s $LINUX_TOP/linux-socfpga/arch/arm/boot/dts/socfpga_cyclone5_socdk.dtb ../linux-bin/a9/

ln -s $LINUX_TOP/modules_install/lib/modules ../linux-bin/a9/

D. Build Root Filesystem Using Yocto


1. Setup RootFS Folder

cd $LINUX_TOP

mkdir rootfs && cd rootfs

export ROOTFS_TOP=`pwd`

2. Yocto Setup

git clone -b kirkstone https://git.yoctoproject.org/poky

git clone -b kirkstone https://git.yoctoproject.org/meta-intel-fpga

source poky/oe-init-build-env ./cv_build

echo 'MACHINE = "cyclone5"' >> conf/local.conf

echo 'BBLAYERS += " ${TOPDIR}/../meta-intel-fpga "' >> conf/bblayers.conf

bitbake image-base-cyclone5

3. Link RootFS

ln -s $ROOTFS_TOP/cv_build/tmp/deploy/images/cyclone5/core-image-minimal-cyclone5.tar.gz
$LINUX_TOP/linux-bin/a9/

XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
E. SD Card Image Preparation

1. SD Card Structure

cd $TOP_FOLDER

sudo rm -rf sd_card && mkdir sd_card && cd sd_card

wget https://releases.rocketboards.org/2021.04/gsrd/tools/make_sdimage_p3.py

chmod +x make_sdimage_p3.py

2. Create FAT Partition (sdfs)

mkdir sdfs && cd sdfs

cp $LINUX_BIN/a9/zImage .

cp $LINUX_BIN/a9/socfpga_cyclone5_socdk.dtb .

mkdir extlinux

cat <<EOF > extlinux/extlinux.conf

LABEL Linux Default

KERNEL ../zImage

FDT ../socfpga_cyclone5_socdk.dtb
APPEND root=/dev/mmcblk0p2 rw rootwait earlyprintk console=ttyS0,115200n8

EOF

3. RootFS Partition

cd $TOP_FOLDER/sd_card

mkdir rootfs && cd rootfs

sudo tar xf $LINUX_BIN/a9/core-image-minimal-cyclone5.tar.gz

sudo rm -rf lib/modules/*

sudo cp -r $LINUX_BIN/a9/modules/* lib/modules

4. Copy Bootloader

cp ../cv_soc_devkit_ghrd/software/bootloader/u-boot-socfpga/u-boot-with-spl.sfp .

5. Create SD Card Image

sudo python3 make_sdimage_p3.py -f \

-P u-boot-with-spl.sfp,num=3,format=raw,size=10M,type=A2 \

-P sdfs/*,num=1,format=fat,size=100M \

-P rootfs/*,num=2,format=ext3,size=300M \

-s 512M \

-n sdcard_cv.img

6. Burn Image to SD Card

sudo dd if=sdcard_cv.img of=/dev/sdX bs=4M status=progress

sync

Note :- Replace /dev/sdX with your actual SD card device (check via lsblk).

https://chatgpt.com/share/6825b3bc-edc8-8006-b61d-
689a923e24e4
To clear the sd_card data (if previously it consists of some
data)

Replace /dev/sdX with your actual device (e.g., /dev/sdb)


--->

sudo dd if=/dev/zero of=/dev/sdX bs=1M count=100 status=progress

Ex:- sudo dd if=/dev/zero of=/dev/sdb bs=1M count=100 status=progress

--->

sudo wipefs --all /dev/sdX

sudo fdisk /dev/sdX

Then in fdisk: type o → [Enter], then w → [Enter]

https://chatgpt.com/c/68272550-3f18-8006-ad98-034fe1d22e85
For Creating the File which is use to transfer from PC to De1
soc (project file)

1. Go to the Embedded Development Suite (EDS) Terminal

You need to source the environment before using sopc-create-header-files and make:

source /path/to/embedded/embedded_command_shell.sh

Ex:- go to this path /home/user/altera_lite/24.1std/nios2eds


Run the command after this :-

./nios2_command_shell.sh
This sets environment variables like SOCEDS_DEST_ROOT, PATH, etc.

2. Generate Header from .sopcinfo

Your generate.sh script:-

#!/bin/sh

sopc-create-header-files \

"hps2.sopcinfo" \

--single hps_0.h \

--module hps_0

This will create a single header file (hps_0.h) describing the memory map and register offsets of your
HPS IP.

Make sure:

 hps2.sopcinfo exists in the directory.

 It was generated after a successful Qsys Platform Designer save.

Run:
 chmod +x generate.sh
 ./generate.sh
3. Write and Use the Makefile
Your Makefile is mostly correct. Here's a refined version with a minor fix for formatting
and clarity:
After writing the script save as without any extension

# Target executable name

TARGET = FPGAHPS

# Cross-compiler and flags

CROSS_COMPILE = arm-linux-gnueabihf-

CFLAGS = -static -g -Wall -I${SOCEDS_DEST_ROOT}/ip/altera/hps/altera_hps/hwlib/include

LDFLAGS = -g -Wall

CC = $(CROSS_COMPILE)gcc

ARCH = arm

# Build rules

build: $(TARGET)

$(TARGET): test.o

$(CC) $(LDFLAGS) $^ -o $@

%.o : %.c

$(CC) $(CFLAGS) -c $< -o $@

# Cleanup

.PHONY: clean

clean:

rm -f $(TARGET) *.a *.o *~

Save it ,Now simply run:

 make
It will create a file which consists of all the details of the project(C code, Design,Libraries)
Opening putty/minicom in your system :-
Open new command window:-
 FOR CHECKING THE USB PORT IN LINUX THE COMMAND IS
ls /dev/ttyUSB*

Write the command :-


sudo minicom –s
It will display this window:-

 Go to serial port setup


 It will display like this window we have to configure the same value
except the Serial Device

 Click Enter
 It will open the previous configuration window
 Click on Save setup as ..
 Then after click Exit
 If the board is connected good it will reflect like below

 If you are not getting this this turn on and off the board if will reflect like this otherwise you
SD_card is the problem
 After this to known the ip address of the de1 soc board (previously you have to ethernet to
the board)
ifconfig

Before ethernet connection:-


After ethernet connection: -

✅ After Compilation:

We have to GO to EDS window which we already open previously


Recap:-
Go to the Embedded Development Suite (EDS) Terminal

You need to source the environment before using sopc-create-header-files and make:

source /path/to/embedded/embedded_command_shell.sh

Ex:- go to this path /home/user/altera_lite/24.1std/nios2eds


Run the command after this :-

./nios2_command_shell.sh

Our project file is ready to transfer by using the below command to transfer the
file :-
scp FPGAHPS root@<board_ip>:/home/root/
Ex:- scp FPGAHPS [email protected]:/home/root/
After sucessfully running this we have to go minicom/putty
Click the below command :-
./FPGAHPS

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