Hps Setup Main
Hps Setup Main
This document outlines the complete procedure to configure a custom system on the DE1-SoC board,
generate a bootable image, and prepare an SD card with Linux.
Add the required IPs (e.g., HPS, SDRAM controller, PLLs, etc.) based on your custom design
needs.
Configure each component with your desired settings. If required adjust the address of the
given components
2. Pin Assignment :-
Use the GitHub download the pin planner file(.qsf) for de1 soc board otherwise use the
previous projects file
Assignments -> import assignments ->add the file path and click OK
3. Create Top-Level Verilog Module
Qsys name folder :- the name which we are given to qsys same as like one folder is created
In that folder we have synthesis in that we have a file with haveing extension (.qip)
ex:- /home/user/Downloads/sdram_project/hps22/synthesis
Put the verilog file as the top module and Run the design (only analysis and synthesis).
B. Build U-Boot
cd $TOP_FOLDER/cv_soc_devkit
cd u-boot-socfpga
Command 1:-
cd arch/arm/mach-socfpga/cv_bsp_generator
python3 cv_bsp_generator.py \ -i
/home/user/Downloads/sdram_project/hps_isw_handoff/soc_system_hps_0 \ -o
../../../../board/altera/cyclone5-socdk/qts
cd ../../../..
Step 3,4 are use it for installing libraries (once done this process, next we don't want to do
it again )
3. Install Dependencies
4. Install Cross-Compiler
Check:
which arm-none-linux-gnueabihf-gcc
If not present:
5. Export Toolchain
export PATH=$HOME/Downloads/bin_things/gcc-arm-xxx/bin:$PATH
export CROSS_COMPILE=arm-none-linux-gnueabihf-
6. Build U-Boot
make socfpga_cyclone5_defconfig
make -j 48
To check if it is successfully executed or not by checking the below files are generated successfully
or not :-(if generated it is running successfully otherwise it won’t)
sudo apt install gawk wget git diffstat unzip texinfo gcc build-essential \
export LINUX_TOP=`pwd`
cd linux-socfpga
export ARCH=arm
export CROSS_COMPILE=arm-none-linux-gnueabihf-
3. Build Kernel
make socfpga_defconfig
rm -rf modules_install/lib/modules/*/build
rm -rf modules_install/lib/modules/*/source
4. Organize Binaries
mkdir -p ../linux-bin/a9
ln -s $LINUX_TOP/linux-socfpga/arch/arm/boot/zImage ../linux-bin/a9/
ln -s $LINUX_TOP/linux-socfpga/arch/arm/boot/Image ../linux-bin/a9/
ln -s $LINUX_TOP/linux-socfpga/arch/arm/boot/dts/socfpga_cyclone5_socdk.dtb ../linux-bin/a9/
ln -s $LINUX_TOP/modules_install/lib/modules ../linux-bin/a9/
cd $LINUX_TOP
export ROOTFS_TOP=`pwd`
2. Yocto Setup
bitbake image-base-cyclone5
3. Link RootFS
ln -s $ROOTFS_TOP/cv_build/tmp/deploy/images/cyclone5/core-image-minimal-cyclone5.tar.gz
$LINUX_TOP/linux-bin/a9/
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
E. SD Card Image Preparation
1. SD Card Structure
cd $TOP_FOLDER
wget https://releases.rocketboards.org/2021.04/gsrd/tools/make_sdimage_p3.py
chmod +x make_sdimage_p3.py
cp $LINUX_BIN/a9/zImage .
cp $LINUX_BIN/a9/socfpga_cyclone5_socdk.dtb .
mkdir extlinux
KERNEL ../zImage
FDT ../socfpga_cyclone5_socdk.dtb
APPEND root=/dev/mmcblk0p2 rw rootwait earlyprintk console=ttyS0,115200n8
EOF
3. RootFS Partition
cd $TOP_FOLDER/sd_card
4. Copy Bootloader
cp ../cv_soc_devkit_ghrd/software/bootloader/u-boot-socfpga/u-boot-with-spl.sfp .
-P u-boot-with-spl.sfp,num=3,format=raw,size=10M,type=A2 \
-P sdfs/*,num=1,format=fat,size=100M \
-P rootfs/*,num=2,format=ext3,size=300M \
-s 512M \
-n sdcard_cv.img
sync
Note :- Replace /dev/sdX with your actual SD card device (check via lsblk).
https://chatgpt.com/share/6825b3bc-edc8-8006-b61d-
689a923e24e4
To clear the sd_card data (if previously it consists of some
data)
--->
https://chatgpt.com/c/68272550-3f18-8006-ad98-034fe1d22e85
For Creating the File which is use to transfer from PC to De1
soc (project file)
You need to source the environment before using sopc-create-header-files and make:
source /path/to/embedded/embedded_command_shell.sh
./nios2_command_shell.sh
This sets environment variables like SOCEDS_DEST_ROOT, PATH, etc.
#!/bin/sh
sopc-create-header-files \
"hps2.sopcinfo" \
--single hps_0.h \
--module hps_0
This will create a single header file (hps_0.h) describing the memory map and register offsets of your
HPS IP.
Make sure:
Run:
chmod +x generate.sh
./generate.sh
3. Write and Use the Makefile
Your Makefile is mostly correct. Here's a refined version with a minor fix for formatting
and clarity:
After writing the script save as without any extension
TARGET = FPGAHPS
CROSS_COMPILE = arm-linux-gnueabihf-
LDFLAGS = -g -Wall
CC = $(CROSS_COMPILE)gcc
ARCH = arm
# Build rules
build: $(TARGET)
$(TARGET): test.o
$(CC) $(LDFLAGS) $^ -o $@
%.o : %.c
# Cleanup
.PHONY: clean
clean:
make
It will create a file which consists of all the details of the project(C code, Design,Libraries)
Opening putty/minicom in your system :-
Open new command window:-
FOR CHECKING THE USB PORT IN LINUX THE COMMAND IS
ls /dev/ttyUSB*
Click Enter
It will open the previous configuration window
Click on Save setup as ..
Then after click Exit
If the board is connected good it will reflect like below
If you are not getting this this turn on and off the board if will reflect like this otherwise you
SD_card is the problem
After this to known the ip address of the de1 soc board (previously you have to ethernet to
the board)
ifconfig
✅ After Compilation:
You need to source the environment before using sopc-create-header-files and make:
source /path/to/embedded/embedded_command_shell.sh
./nios2_command_shell.sh
Our project file is ready to transfer by using the below command to transfer the
file :-
scp FPGAHPS root@<board_ip>:/home/root/
Ex:- scp FPGAHPS [email protected]:/home/root/
After sucessfully running this we have to go minicom/putty
Click the below command :-
./FPGAHPS