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Decoder With Instruction Decoding

A decoder is a combinational logic circuit that converts n input lines into 2ⁿ unique output lines, activating one output based on the binary input. It is used for applications like address decoding and instruction decoding in digital systems. The document includes detailed explanations, examples, truth tables, applications, and Verilog code for a 2-to-4 decoder, along with a section on instruction decoding using decoders.

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0% found this document useful (0 votes)
7 views8 pages

Decoder With Instruction Decoding

A decoder is a combinational logic circuit that converts n input lines into 2ⁿ unique output lines, activating one output based on the binary input. It is used for applications like address decoding and instruction decoding in digital systems. The document includes detailed explanations, examples, truth tables, applications, and Verilog code for a 2-to-4 decoder, along with a section on instruction decoding using decoders.

Uploaded by

rathoreanil700
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 8

Perfect!

Let's now cover the Decoder in exactly the same structured, detailed, and example-
driven manner as we did for the Encoder — including what, why, how, truth table, diagram,
applications, real-world example (with buttons), Verilog code, and summary.

Complete Notes on Decoder in Digital Logic Design

1. What is a Decoder?

A decoder is a combinational logic circuit that converts n input lines into 2ⁿ unique output
lines.

It activates exactly one output line based on the binary value of the inputs.

2. Why Use a Decoder?

 To select one specific output line among many

 Acts like a binary-to-one-hot converter

 Used in address decoding, instruction decoding, memory enable, etc.

3. How Does a Decoder Work?

A decoder takes a binary number as input and decodes it to select one output line
corresponding to that number.

4. Example: 2-to-4 Decoder

Inputs:

 2-bit input: A1 A0

Outputs:

 4 output lines: Y0, Y1, Y2, Y3

Only one output will be HIGH at a time, based on the input value.

Truth Table:

A1 A0 Y3 Y2 Y1 Y0

0 0 0 0 0 1

0 1 0 0 1 0
A1 A0 Y3 Y2 Y1 Y0

1 0 0 1 0 0

1 1 1 0 0 0

You can see:

 Input 00 → Y0 = 1

 Input 01 → Y1 = 1

 Input 10 → Y2 = 1

 Input 11 → Y3 = 1

5. Logic Expressions (2-to-4 Decoder)

Assuming inputs are A1 and A0:

Y0 = ~A1 & ~A0

Y1 = ~A1 & A0

Y2 = A1 & ~A0

Y3 = A1 & A0

6. Decoder Block Diagram

Inputs: A1, A0

+---+---+

| Decoder |

+---+---+

Outputs: Y3 Y2 Y1 Y0 (only one HIGH at a time)

7. Applications of Decoders

Application Area Use of Decoder

Memory Systems Select memory blocks or registers

Microprocessors Instruction decoding


Application Area Use of Decoder

Embedded Systems Enable peripheral devices based on address

Display Controllers Drive segments in 7-segment displays

Control Systems Select operations or modules

8. Real-World Use Case: 2-Button Selector Using Decoder

Problem:

Suppose you’re designing a toy or learning kit that has 2 switches to choose among 4 output
devices (say, 4 di erent lights or buzzers).

Each time the user presses a binary value using two switches, only one output should
activate.

Solution:

Use a 2-to-4 Decoder!

Inputs:

 Switch 1 (A1)

 Switch 0 (A0)

Outputs:

 Y0 → Turns ON Light 0

 Y1 → Turns ON Light 1

 Y2 → Turns ON Light 2

 Y3 → Turns ON Light 3

Only one light turns on at a time!

Truth Table (again):

A1 A0 Light Output (Y3 Y2 Y1 Y0)

0 0 0001

0 1 0010

1 0 0100
A1 A0 Light Output (Y3 Y2 Y1 Y0)

1 1 1000

Simple Diagram:

[Switch 1] ---> A1 ┐

[Switch 0] ---> A0 ┘

+---------+

| Decoder |

+---------+

┌────┴────┬────┬────┐

[Y3] [Y2] [Y1] [Y0] → Connected to Lights

Let’s say:

 Switches = 10

 Output: Y2 = 1 → Only Light 2 glows

The decoder "decodes" binary input into one-hot output to control the light.

9. Verilog Code Example: 2-to-4 Decoder

module decoder_2to4 (

input [1:0] in,

output reg [3:0] out

);

always @(*) begin

case (in)

2'b00: out = 4'b0001;

2'b01: out = 4'b0010;

2'b10: out = 4'b0100;

2'b11: out = 4'b1000;

endcase

end
endmodule

10. Summary

Decoder Type Input Output Purpose

Convert binary input to one-hot


2-to-4 Decoder 2-bit 4 lines
output

n-to-2ⁿ 2ⁿ
n-bit Address selection, control signals
Decoder lines

CPU, memory, display, control


Key Use Areas
lines

Final Insight:

A decoder activates one of many outputs based on a binary input.


It's like the reverse of an encoder:

 Encoder compresses 1-hot → binary

 Decoder expands binary → 1-hot

Encoder vs Decoder (Quick Comparison)

Feature Encoder Decoder

Input 1-hot inputs (many lines) Binary input (fewer lines)

Output Binary code One-hot output

Use Case Example Button press recognition Light or device selection

Application Keyboard, interrupt system Memory, display, selector

Would you like a PDF of this complete note or want to continue with another digital logic block
like multiplexer, demultiplexer, comparator, or ALU unit in the same format?

Absolutely! Let's extend the same note on Decoder with a complete, easy-to-understand
section on instruction decoding — how it works, why a decoder is used, and an example that
makes it click clearly.

Here’s the additional section to append at the end of the Decoder notes:
11. How Instruction Decoding Works (with Decoder)

What is Instruction Decoding?

When a processor fetches an instruction from memory, the instruction is stored as a binary
opcode.

The CPU must decode this binary opcode to determine:

 Which instruction to execute (ADD, SUB, LOAD, etc.)

 Which internal logic block or operation to activate

This process is called instruction decoding.

Role of Decoder in Instruction Decoding

 The opcode (binary input) is fed into a decoder.

 The decoder activates exactly one control signal out of many — corresponding to that
instruction.

This way, only the required logic circuit (e.g., ALU, memory unit, control logic) gets activated.

Example: 3-bit Opcode with 8 Instructions

Let’s say a processor supports 8 instructions, with 3-bit opcodes:

Opcode Instruction

000 NOP

001 ADD

010 SUB

011 LOAD

100 STORE

101 AND

110 OR

111 JUMP

Using Decoder

 Input: 3-bit opcode → (Opcode[2:0])


 Output: 8 control lines → (Instr[7:0])

 Only one line is HIGH at a time, triggering that instruction's execution logic.

Decoder Output:

Opcode Output Lines (Instr[7:0])

000 00000001 (NOP active)

001 00000010 (ADD active)

010 00000100 (SUB active)

011 00001000 (LOAD active)

100 00010000 (STORE active)

101 00100000 (AND active)

110 01000000 (OR active)

111 10000000 (JUMP active)

Diagram:

[ Opcode (3-bit) ] ---> [ 3-to-8 Decoder ]

[ NOP ] [ ADD ] [ SUB ] [ LOAD ] ... [ JUMP ]

(Only one active at a time)

Inside CPU Control Logic

The output of the decoder:

 Activates only the logic block that handles that instruction

 Other circuits remain idle → saves power, avoids incorrect behavior

For example:

 Opcode = 010 (SUB) → Decoder activates SUB line → ALU performs subtraction

 All other instruction lines remain LOW

Why Decoder is Perfect Here?

Because:
 It transforms compact binary opcodes into 1-hot enable signals

 It's fast, simple, and scalable

 It fits perfectly in control units and instruction decoders of RISC/VLIW processors

Summary: Instruction Decoder with Decoder

Component Role

Instruction Binary opcode (from memory)

Decoder Converts opcode into one-hot control line

Control Line Triggers specific instruction logic

Example Opcode 011 → Load → Activates LOAD

Final Analogy:

Think of opcode like a menu number, and decoder like a waiter:

 You say "item 3" → Waiter (decoder) brings only that item

 All other menu items stay in the kitchen

This makes instruction decoding super e icient — and that's exactly where decoders shine in
real CPU architecture.

Would you like me to now combine this full note (including this new section) into a single PDF
for download or move on to the next digital block like Multiplexer?

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