Error Sign Detection-Based Compensation of Commutation Error For Use in Sensorless Position Control of BLDCM
Error Sign Detection-Based Compensation of Commutation Error For Use in Sensorless Position Control of BLDCM
Abstract—This article presents a novel commutation er- is employed in magnetically suspended CMG (MSCMG), which
ror closed-loop compensation method for the position sen- has the properties of zero friction and enhanced damping of rotor
sorless brushless dc motor. A key challenge is addressed vibration [1]–[3]. Thus, the MSCMG becomes an ideal solution
that the conventional closed-loop compensation method
fails in the case of no available analog-to-digital converter for spacecraft attitude control.
(ADC). The proposed method consists of a commutation Because of the reliability and efficiency demands in space
error sign detection circuit and a compensation algorithm. application, brushless dc motors (BLDCMs) with ironless and
First, the voltage of the virtual neutral point with respect slotless stator are introduced to drive the high-speed rotor in
to dc-link midpoint is transformed to obtain a logic level.
MSCMG [4]. It is well known that six discrete rotor positions are
The logic level can indicate whether the commutation is
advanced or delayed. Then, the logic level is mapped to required for BLDCM commutation, and position sensors, e.g.,
a commutation error sign flag variable, based on which a Hall-effect sensors, encoders, etc., are commonly used [5], [6].
novel iterative compensation algorithm is designed. Com- The position sensors are usually installed in the motor stator, and
pared with the conventional method, the proposed method extra wires ought to be added for position signals transformation.
achieves a high-precision closed-loop compensation using
Thus, they are easily affected by electromagnetic interference
only one general-purpose input/output of the digital proces-
sor instead of ADC. Finally, the experiments on a magnet- and high temperature, and the reliability of MSCMG can be
ically suspended control moment gyro prototype validate reduced, especially in the harsh space environment. Besides,
the effectiveness of the proposed method. the special mechanical arrangements for sensor installation can
Index Terms—Brushless dc motor (BLDCM), commuta- easily introduce commutation error. Consequently, various sen-
tion error compensation, sensorless commutation. sorless commutation techniques have been developed. Because
the commutation point detection circuit is constructed outside
of the BLDCM, the environment for sensorless commutation
I. INTRODUCTION points detection is much better, which improves the reliability
WING to the advantages of large torque amplification and of the MSCMG. The common sensorless commutation method
O momentum storage, control moment gyros (CMGs) are
the effective actuators for spacecraft attitude control, in which
includes back-electromotive force (back-EMF) method [7], [8],
line-to-line back-EMF method [9] [10], G function method [11]
the output gyroscopic torque is generated through spinning [12], etc. However, in order to avoid the influences of modulation
high-speed rotor providing angular momentum. Instead of tradi- noise and commutation freewheeling current, low-pass filters
tional mechanical bearing, the active magnetic bearing (AMB) (LPFs) are inevitability used. As a result, the LPF phase shift,
hardware transport delay, and software processing time lead to
Manuscript received April 23, 2021; revised July 13, 2021 and August the commutation error, which deteriorates the BLDCM effec-
22, 2021; accepted September 16, 2021. Date of publication October
5, 2021; date of current version April 1, 2022. This work was sup- tiveness. However, traditional compensation methods, including
ported by the National Natural Science Foundation of China under table look-up compensation method, LPF phase-frequency cal-
Grant 61822302 and Grant 51925501. (Corresponding authors: Haifeng culation method, etc., have poor accuracy, and the commutation
Zhang; Baodong Chen.)
Hao Jin and Gang Liu are with the School of Instrumentation Sci- error cannot be corrected when there is interference or parameter
ence and Optoelectronics Engineering, Beihang University (BUAA), variation [13]–[15]. In contrast, benefiting from the properties
Beijing 100191, China and also with the Ningbo Institute of Technol- of real-time compensation and anti-interference, the closed-loop
ogy, Beihang University (BUAA), Ningbo 315800, China (e-mail: jin-
[email protected]; [email protected]). compensation method has become a research focus in recent
Haifeng Zhang is with the Research Institute for Frontier Sci- years.
ence, Beihang University, Beijing 100191, China (e-mail: zhang- The conventional closed-loop compensation methods are
[email protected]).
Baodong Chen is with the School of Automation Science and Elec- commonly implemented according to the motor signal (e.g.,
trical Engineering, Beihang University, Beijing 100191, China (e-mail: phase voltage) asymmetry caused by commutation error. With
[email protected]). the asymmetrical motor signal quantified as feedback quantity to
Color versions of one or more figures in this article are available at
https://doi.org/10.1109/TIE.2021.3116566. feed a controller, the motor signal returns to be symmetrical due
Digital Object Identifier 10.1109/TIE.2021.3116566 to the commutation error compensated by the controller output.
0278-0046 © 2021 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
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9280 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 69, NO. 9, SEPTEMBER 2022
is commonly used to obtain the digital feedback quantity in the u = RiB + L didtB + eB + uSG . (1)
abovementioned existing closed-loop compensation methods. ⎩ BG
uCG = RiC + L didtC + eC + uSG
Thereby, the compensation angle can be calculated from the
algorithm in the digital processor. However, for the highly Because only two stator windings are energized each time for
integrated MSCMG, the AMB and BLDCM control algorithms BLDCM, phase A is floating with iA = 0 given that phase B
share one digital processor using the total ADC channels. There- and phase C are energized. Thus, the phase voltage of phase A
fore, there is no remaining ADC channel to obtain the digital can be written as
feedback quantity for the commutation error compensation. uAS = eA . (2)
In order to address the issue, as shown in Fig. 1(b), this article
proposes a novel closed-loop compensation method based on According to the back-EMF method, the commutation signals
error type detection without using ADC. First, the relationship (SA , SB , and SC ) can be obtained from back-EMF zero crossing
between commutation error and the voltage of the virtual neutral point (ZCP) signals with 30◦ delayed shift [3]. Thus, from (2), the
point with respect to the dc-link midpoint is analyzed. Then, a ZCP can be detected by using phase voltage comparison circuit
novel commutation error sign detection circuit is designed to in Fig. 3. However, as shown in Fig. 4, the adopted LPF phase
obtain a logic level. The logic level is read by a general-purpose shift along with the hardware delay and software processing time
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JIN et al.: ERROR SIGN DETECTION BASED COMPENSATION OF COMMUTATION ERROR 9281
TABLE I
RELATIONSHIP BETWEEN uS M AND MOTOR COMMUTATION
Fig. 4. Schematic diagram of commutation points detection. Combining (9) and (7), uSG can be derived as
1
uSG = (uDC − eA − eC ). (10)
2
cause the commutation error ϕ, which will reduce the BLDCM
efficiency. Therefore, after substituting (10) into (9), uS G can be rewrit-
In order to compensate the commutation error by a closed- ten as
loop control, the voltage of the virtual neutral point with respect uDC 2eB − eA − eC
uS G = + . (11)
to dc-link midpoint (uS M , Fig. 2) is analyzed. Then, a novel 2 6
circuit is designed to detect whether the commutation is delayed Finally, uS M can be obtained as
or advanced, which is illustrated in the following sections.
1 eA + eC
uS M = uS G − uM G =
eB − (12)
B. Correlation Between the Commutation Error and uS M 3 2
As shown in Fig. 2, according to Kirchhoff’s law, the voltage where uM G (uM G = uDC 2 ) is the dc-link midpoint voltage.
from motor terminals to the virtual neutral point satisfies During the commutation from phase C and phase A conduction
to phases C and phase B conduction, the freewheeling current
uAS uBS uCS floats through D1 into the dc-link. Thus, there are
+
+ =0 (3)
R R R ⎧
⎨ uAG = uDC
where R is the resistor for constructing the virtual neutral point.
uBG = 0 . (13)
If G is taken as the reference ground, (3) can be transformed into ⎩
uCG = uDC
uAG + uGS + uBG + uGS + uCG + uGS = 0. (4) Combining (5), (12), and (13), we get uS M = −uDC /6.
From (4), we get Therefore, uS M with different commutation situation can be
represented by Table I. Considering that the freewheeling cur-
uAG + uBG + uCG
uS G = −uGS = . (5) rent decaying time is very short for the ironless and slotless
3 stator BLDCM, the freewheeling current duration is ignored
Given that phase C and phase A are energized, the three-phase in this article [17]. As shown in Fig. 5, with the definition of
terminal voltages can be described as Sinv = SA + SB + SC , a new signal uinv can be created from
⎧ the transformation as
⎨ uAG = 0
uBG = eB + uSG . (6) −uS M Sinv = 1
⎩ uinv = . (14)
uCG = uDC uS M Sinv = 1
Substituting (6) into (5) yields Furthermore, uinv is separated by positive and negative com-
ponents to form two different waveforms named as uP and uN ,
eB + uSG + uDC respectively. Take uP as an example; according to Fourier series
uS G = . (7)
3 decomposition, the dc component of uP is expressed as
In addition, based on (1), the following equation can be
1 tx +T 1
obtained: uP _dc = uP = AP (15)
⎧ T tx T
⎨ uAS + uS G = RiA + L dtA + eA + uSG
di
u + uS G = RiB + L didtB + eB + uSG . (8) where T is the commutation period, and tx is assigned to be a
⎩ BS commutation point (see Fig. 5). Similarly, the dc component of
uCS + uS G = RiC + L didtC + eC + uSG
uN can be obtained as uN _dc = T1 AN . AP and AN are the areas
According to Kirchhoff’s law, iA + iB + iC = 0 is satisfied. of uP and uN per commutation period, respectively.
Thus, from (3) and (8), uS G can be deduced as Then, it can be seen in Fig. 5(a) that if |uN _dc | = uP _dc is
eA + eB + eC satisfied due to the equality of AP and AN , the commutation is
uS G = + uSG . (9) accurate (ϕ = 0). Else if |uN _dc | > uP _dc is achieved because
3
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9282 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 69, NO. 9, SEPTEMBER 2022
Fig. 5. Relationship between uS M , commutation signals, and uinv in the case of different commutation errors. (a) Accurate commutation with
ϕ = 0. (b) Delayed commutation with ϕ > 0. (c) Advanced commutation with ϕ < 0.
TABLE II
RELATIONSHIP BETWEEN COMMUTATION ERROR AND COMMUTATION ERROR SIGN FLAG VARIABLE
Fig. 6. Commutation error sign detection circuit and four stages of uS M transformation.
of AN > AP , the commutation is delayed by ϕ (ϕ > 0) [see circuits, two precision half-wave rectifiers, and a comparator.
Fig. 5(b)]. When AN < AP results in |uN _dc | < uP _dc , the The circuit can output a logic level (0 or 1) indicating that the
BLDCM commutates with advanced commutation error (ϕ < 0) commutation error is advanced or delayed.
[see Fig. 5(c)]. For a better illustration, the abovementioned
relationship is presented in Table II. A. Acquisition of Commutation Error Sign Flag Variable
Based on the conclusion, if the transformation from uS M to
|uN _dc | and uP _dc is realized, a comparator can be used to detect As shown in Fig. 6, the proposed circuit is divided into four
whether the commutation error is advanced or delayed. stages functionally.
In stage 1, a two-channel multiplexer is used. When Sinv = 1
is satisfied, uS M is gated through an invert circuit. On the
III. NOVEL COMMUTATION ERROR SIGN DETECTION CIRCUIT
contrary, uS M is gated directly in the case of Sinv = 0. Conse-
AND COMPENSATION ALGORITHM
quently, uS M is transformed to uinv .
According to the analysis in the previous section, as shown In stage 2, two precision half-wave rectifiers are adopted to
in Fig. 6, a novel commutation error sign detection circuit transform uinv into uP and uN , respectively. Owing to the high
is designed to transform uS M , which consists of two invert open-loop gain of operational amplifier, even though the input
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JIN et al.: ERROR SIGN DETECTION BASED COMPENSATION OF COMMUTATION ERROR 9283
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9284 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 69, NO. 9, SEPTEMBER 2022
TABLE III
MOTOR PARAMETERS
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JIN et al.: ERROR SIGN DETECTION BASED COMPENSATION OF COMMUTATION ERROR 9285
Fig. 10. DC-link current iL and its FFT in case of different commu-
tation error. (a) Delayed commutation error. (b) Advanced commutation
error. (c) Commutation error compensated by the proposed method.
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9286 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 69, NO. 9, SEPTEMBER 2022
V. CONCLUSION
In this article, a closed-loop commutation error compensation
method based on error sign detection was proposed. The main
compensation configuration consists of a proposed commutation
error sign detection circuit and a novel iterative compensation
Fig. 14. Delayed commutation error converging process when the algorithm. First, the detecting circuit was employed to obtain a
proposed method is introduced at t0 .
logic level indicating the commutation error type. Then, the logic
level was read by the GPIO of digital processor and mapped to a
flag variable for error correction. Finally, a novel commutation
(AP < AN ). |uN _dc | > uP _dc is obtained leading to So = 0; error iterative compensation method was introduced based on
thus, k0 = −1 is mapped. When the proposed method with the flag variable. Compared with the traditional method, the
initial compensation angle ϕc (0) = k0 ϕinit is introduced at t0 , proposed method used only one GPIO to feed a novel compen-
the commutation error starts to decrease in the negative direction. sation algorithm, and achieved a high-precision commutation
Then, |uN _dc | < uP _dc is achieved at t1 , and So is flipped from error closed-loop compensation under the circumstance of no
0 to 1, resulting in kn = +1. Thus, ϕc (n) starts to increase available ADC channel for commutation compensation feed-
in the positive direction from the overshoot of the negative back quantity construction.
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JIN et al.: ERROR SIGN DETECTION BASED COMPENSATION OF COMMUTATION ERROR 9287
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