4931_Grace College of Engineering, Thoothukudi

DEPARTMENT OF ELECTRONICS & COMMUNICATION

ENGINEERING

BE- Electronics & Communication

Course/Programme : Engineering

Regulation : 2021

Sub. Code & Name : OMR351– Mechatronics

Year/Sem : IV Year/VII Sem

Content Name : Notes

Unit- II 8085 MICROPROCESSOR

Compiled by,

Mrs. A.Samsu Nighar, AP/ECE

4931_Grace College of Engineering, Thoothukudi

UNIT- II
8085 MICROPROCESSOR

Introduction – Architecture of 8085 – Pin Configuration – Addressing Modes –Instruction set,

Timing diagram of 8085

2.1 INTRODUCTION

 The microprocessor is a clock-driven semiconductor device consisting of electronic

logic circuits manufactured by using either a large-scale integration (LSI) or very-
large-scale integration (VLSI) technique.

 The microprocessor is capable of performing various computing functions and making

decisions to change the sequence of program execution. In large computers, a CPU
implemented on one or more circuit boards performs these computing functions.

 The microprocessor is in many ways similar to the CPU, but includes all the logic
circuitry, including the control unit, on one chip.

 The microprocessor can be divided into three segments for the sake of clarity,
arithmetic/logic unit (ALU), register array, and control unit.

Fig 2.1 Structure of microprocessor

Arithmetic/Logic Unit: This is the area of the microprocessor where various computing functions
are performed on data. The ALU unit performs such arithmetic operations as addition and
subtraction, and such logic operations as AND, OR, and exclusive OR.
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Register Array: This area of the microprocessor consists of various registers identified by letters
such as B, C, D, E, H, and L. These registers are primarily used to store data temporarily during the
execution of a program and are accessible to the user through instructions.

Control Unit: The control unit provides the necessary timing and control signals to all the
operations in the microcomputer. It controls the flow of data between the microprocessor and
memory and peripherals.

Memory: Memory stores such binary information as instructions and data, and provides that
information to the microprocessor whenever necessary. To execute programs, the microprocessor
reads instructions and data from memory and performs the computing operations in its ALU
section. Results are either transferred to the output section for display or stored in memory for later
use. Read-Only memory (ROM) and Read/Write memory (R/WM), popularly known as Random-
Access memory (RAM).

1. The ROM is used to store programs that do not need alterations. The monitor
program of a single-board microcomputer is generally stored in the ROM. This
program interprets the information entered through a keyboard and provides
equivalent binary digits to the microprocessor. Programs stored in the ROM can
only be read; they cannot be altered.

2. The Read/Write memory (RIWM) is also known as user memory It is used to store
user programs and data. In single-board microcomputers, the monitor program
monitors the Hex keys and stores those instructions and data in the R/W memory.
The information stored in this memory can be easily read and altered.

I/O (Input/Output): It communicates with the outside world. I/O includes two types of devices:
input and output; these I/O devices are also known as peripherals.

System Bus: The system bus is a communication path between the microprocessor and peripherals:
it is nothing but a group of wires to carry bits

2.2 ARCHITECTURE Of MICROPROCESSOR (8085)

Address Bus:
The address bus is a group of 16 lines generally identified as A0 to A15. The address
bus is unidirectional: bits flow in one direction —from the MPU to peripheral devices. The
MPU uses the address bus to perform the first function: identifying a peripheral or a
memory location.

Data Bus:
The data bus is a group of eight lines used for data flow. These lines are bidirectional
-data flow in both directions between the MPU and memory and peripheral devices. The
MPU uses the data bus to perform the second function: transferring binary information
.The eight data lines enable the MPU to manipulate 8-bit data ranging from 00 to FF (28
= 256 numbers). The largest number that can appear on the data bus is 11111111.
4931_Grace College of Engineering, Thoothukudi

Fig 2.2 Architecture of 8085 Microprocessor

Control Bus:
The control bus is comprised of various single lines that carry synchronization
signals, providing timing signals. The MPU generates specific control signals for every
operation it performs. These signals are used to identify a device type with which the MPU
intends to communicate.

Registers:
The 8085 have six general-purpose registers to perform the first operation listed
above; that is, to store 8-bit data during program execution. These registers are identified
as B, C, D, E, H, and L. They can be combined as register pairs —BC, DE, and HL —to
perform some 16-bit operations.

Fig 2.2
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The accumulator is an 8-bit register that is part of the arithmetic/logic unit (ALU).
This register is used to store 8-bit data and to perform arithmetic and logical
operations. The result of an operation is stored in the accumulator. The
accumulator is also identified as register A.
Flags:
The ALU includes five flip-flops that are set or reset according to the result of an
opera tion. The microprocessor uses them to perform the third operation; namely, testing
for data conditions. They are Zero (Z), Carry (CY), Sign (S), Parity (P), and Auxiliary
Carry (AC) flags. The most commonly used flags are Sign, Zero, and Carry; the others will
be explained as necessary.

The bit position for the flags in flag register is,

D7 D6 D5 D4 D3 D2 D1 D0

S Z AC P CY

(1) Sign Flag (S): After execution of any arithmetic and logical operation, if D7
of the result is 1, the sign flag is set. Otherwise it is reset. D 7 is reserved for
indicating the sign; the remaining is the magnitude of number. If D7 is 1, the
number will be viewed as negative number. If D7 is 0, the number will be
viewed as positive number.

(2) Zero Flag (z): If the result of arithmetic and logical operation is zero, then
zero flag is set otherwise it is reset.

(3) Auxiliary Carry Flag (AC): If D3 generates any carry when doing any
arithmetic and logical operation, this flag is set. Otherwise it is reset.

(4) Parity Flag (P): If the result of arithmetic and logical operation contains even
number of 1’s then this flag will be set and if it is odd number of 1’s it will be
reset.

(5) Carry Flag (CY): If any arithmetic and logical operation results any carry
then carry flag is set otherwise it is reset.

Program Counter (PC):

 This 16-bit register deals with the fourth operation, sequencing the execution of
instructions. This register is a memory pointer.

 The microprocessor uses this register to sequence the execution of instructions. The
function of the program counter is to point to the memory address from which the next
byte is to be fetched.

 When a byte (machine code) is being fetched, the program counter is incremented by
one to point to the next memory location.
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The stack pointer is also a 16-bit register used as a memory pointer; initially, it will
be called the stack pointer register to emphasize that it is a register. It pointsto a memory
location in R/W memory, called the stack. The beginning of the stack is defined by loading
a 16-bit address in the stack pointer (register).
Temporary Register: It is used to hold the data during the arithmetic and logical
operations.
Instruction Register: When an instruction is fetched from the memory, it is loaded in the
instruction register.
Instruction Decoder: It gets the instruction from the instruction register and decodes the
instruction. It identifies the instruction to be performed.
Serial I/O Control: It has to control signals named SID and SOD for serial data
transmission.
Timing and Control unit: It has control and status signals. It provide control signal to
synchronize the components of microprocessor and timing for instruction to perform the
operation.
Interrupt Control Unit: It is used to receive an interrupt signal for process the operation
and send an acknowledgement for receiving the interrupt signal.

2.3 PIN DIAGRAM OF 8085

Fig 2.4 Pin Diagram of 8085

4931_Grace College of Engineering, Thoothukudi
2.3.1 Introduction to 8085

 It was introduced in 1977.

 It is 8-bit microprocessor.
 Its actual name is 8085 A.
 It is single NMOS device.
 It contains 6200 transistors approx.
 Its dimensions are 164 mm x 222 mm.
 It is having 40 pins Dual- Inline-Package (DIP).

PIN NAME PIN FUNCTION PIN NUMBER

HLDA This is for hold Acknowledgment HLDA goes
(output )(Hold) low, when HOLD is high or vice-verse 38

INTR (output) This Interrupt request signal interrupts the 10

processor to stop the sequence of instructions.
The INTR is enable or disabled by software.
INTA(output) This Interrupt Acknowledgment signal is for 11
Acknowledging once the INTR signal is
received by the processor.
RST5.5,6.5,7.5 and The Interrupt signals for restarting the cause and 7,8,9 and 6
TRAP(inputs) TRAP is the highest priority among interrupts
and INTR is the lowest priority.
RESET IN (input) This reset signal reset the program counter, 36
interrupt enable and HLDA flip loops.
RESET OUT (output) This reset signal defines the processor is being 3
reset.
X1,X2 (input) This terminals are used to create a suitable clock 1,2
for the microprocessor operation.
CLK (output) This clock signal is for the user. 37
SID (output) This signal is the serial input data, normally 5
loaded into the accumulator ads 7th bit.
SOD (output) This signal is the serial output data on 4
accumulators seventh bit out.
Vss For power supply of +5 volts. 20
Vcc For ground reference 40
A8-A15 (output) Address buses for the MSB (Most significant 21-28
(Address buses) bit) of the memory Address/I/O address.
ALE (output) This signal is at high in the first clock cycle and 30
(Address latch Enable ) enables the address to be latched.
IO/M (output) This status signal identifies whether the address 34
is for memory or I/O.
S0,S1(output)(Status This status signals identifies the status of the 29,33
signals) operations of HALT, WRITE, READ and
FETCH.
RD (output)(Read) For controlling READ operation. 32
WR(output) For controlling WRITE operation. 31
READY(input) For identifying whether a component is ready to 35
transfer data or not READY line is used for the
same.
4931_Grace College of Engineering, Thoothukudi
HOLD (input) For holding the use of the buses as soon as the 39
current cycle is completed.
AD0-AD7 For the LSB(Least significant bit) of the memory 12-19
(Input/ output) address /I/O address and for data
(Address Data)

2.4 ADDRESSING MODES

Every instruction of a program has to operate on a data. The method of specifying the data to be
operated by the instruction is called Addressing. The 8085 has the following 5 different types of
addressing.
1. Immediate Addressing
2. Direct Addressing
3. Register Addressing
4. Register Indirect Addressing
5. Implied Addressing
Immediate Addressing:
In immediate addressing mode, the data is specified in the instruction itself. The data will
be a part of the program instruction.
Ex: MVI B, 3EH - Move the data 3EH given in the instruction to B register.
Direct Addressing:
In direct addressing mode, the address of the data is specified in the instruction. The data
will be in memory. In this addressing mode, the program instructions and data can be stored in
different memory.
Ex: LDA 1050H - Load the data available in memory location 1050H in to accumulator..
Register Addressing:
In register addressing mode, the instruction specifies the name of the register in which the
data is available.
Ex: MOV A, B - Move the content of B register to A register.
Register Indirect Addressing:
In register indirect addressing mode, the instruction specifies the name of the register in
which the address of the data is available. Here the data will be in memory and the address will be
in the register pair.
Ex; MOV A, M - The memory data addressed by H L pair is moved to A register.
Implied Addressing:
In implied addressing mode, the instruction itself specifies the data to be operated.
Ex: CMA - Complement the content of accumulator.
4931_Grace College of Engineering, Thoothukudi
2.5 INSTRUCTION SET OF 8085

The 8085 instruction set can be classified into the following five functional headings.

1. DATA TRANSFER INSTRUCTIONS

Includes the instructions that move (copies) data between registers or between memory
locations and registers. In all data transfer operations the content of source register is not altered.
Hence the data transfer is copying operation.
Examples:
MOV: Move – Copy from Source to Destination.
Description: This instruction copies the contents of the source register into the destination
register; the contents of the source register are not altered. If one of the operand is a memory
location, it is specified by the contents of HL registers. No flags are affected.
MVI: Move Immediate 8-Bit
Description: The 8-bit data is stored in the destination register or memory. If the Operand
is a memory location; it is specified by the contents of HL registers. No flags are affected.
LDA: Load accumulator Direct
Description: The contents of a memory location, specified by a 16-bit address in the
operand, are copied to the accumulator. The contents of the source are not altered. This is a 3- byte
instruction; the second byte specifies the low-order address and the third byte specifies the high-
order address. No flags are affected.
LDAX: Load Accumulator Indirect.
Description: The contents of the designated register pair point to a memory location. This
instruction copies the contents of that memory location into the accumulator. The contents of either
the register pair or the memory location are not altered. No flags are affected.

2. ARITHMETIC INSTRUCTIONS
Includes the instructions, which performs the addition, subtraction, increment or decrement
operations. The flag conditions are altered after execution of an instruction in this group.
Examples:
ACI: Add Immediate to Accumulator with Carry.
Description: The 8-bit data (operand) and the Carry flag are added to the contents of the
accumulator, and the result is stored in the accumulator. All flags are modified to reflect the result
of the addition.
ADC: Add Register to Accumulator with Carry
Description: The contents of the operand (register or memory) and the Carry flag are added to the
contents of the accumulator and the result is placed in the accumulator. The contents of the operand
are not altered; however, the previous Carry flag is reset. All flags are modified to reflect the result
of the addition.
ADD: Add Register to Accumulator
Description: The contents of the operand (register or memory) are added to the contents of the
accumulator and the result is stored in the accumulator. If the operand is a memory location, that
is indicated by the 16-bit address in the HL register. All flags are modified to reflect the result of
the addition.
ADI: Add Immediate to Accumulator
Description: The 8-bit data (operand) are added to the contents of the accumulator, and the result
is placed in the accumulator. All flags are modified to reflect the result of the addition.
4931_Grace College of Engineering, Thoothukudi
3. LOGICAL INSTRUCTIONS
The instructions which performs the logical operations like AND, OR, EXCLUSIVE- OR,
complement, compare and rotate instructions are grouped under this heading. The flag conditions
are altered after execution of an instruction in this group.
Examples:

4. BRANCHING INSTRUCTIONS:
The instructions that are used to transfer the program control from one memory location to
another memory location are grouped under this heading.
5. MACHINE CONTROL INSTRUCTIONS:
Includes the instructions related to interrupts and the instruction used to halt program
execution.
ANA: Logical AND with Accumulator
Description: The contents of the accumulator are logically AND ed with the contents of the
operand (register or memory), and the result is placed in the accumulator. If the operand is a
memory location, its address is specified by the contents of HL registers. Flags S, Z, P are modified
to reflect the result of the operation. CY is reset. In 8085 AC is set.
ANI: AND Immediate with Accumulator
Description: The contents of the accumulator are logically AND ed with the 8-bit data (operand)
and the results are placed in the accumulator. Flags S, Z, P are modified to reflect the results of the
operation. CY is reset. In 8085, AC is set.
CALL: Unconditional Subroutine Call
Description: The program sequence is transferred to the address specified by the operand. Before
the transfer, the address of the next instruction to CALL (the contents of the program counter) is
pushed on the stack.
CMA: Complement Accumulator
Description: The contents of the accumulator are complemented. No flags are affected.
CMC: Complement Carry.
Description: The carry flag is complemented.
CMP: Compare with Accumulator.
Description: The contents of the operand (register or memory) are compared with the contents of
the accumulator.
CPI: Compare Immediate with Accumulator
Description: The second byte (8-bit data) is compared with the contents of the accumulator.
INR: Increment Contents of Register/Memory by 1
Description: The contents of the designated register/memory are incremented by I and the results
are stored in the same place. If the operand is a memory location, it is specified by the contents of
HL register pair. Flags S. Z, P, AC are modified to reflect the result of the operation. CY is not
modified.
INX: Increment Register Pair by 1
Description: The contents of the specified register pair are incremented by 1. The instruction
views the contents of the two registers as a 16-bit number. No flags are affected.
JMP: Jump Unconditionally.
Description: The program sequence is transferred to the memory location specified by the 16-bit
address. This is a 3-byte instruction; the second byte specified the low order byte and the third byte
specifies the high-order byte. No flags are affected.
Jump Conditionally:
 Description:
 Jump on carry
 Jump on No carry
 Jump on Positive
4931_Grace College of Engineering, Thoothukudi
 Jump on minus
 Jump on Parity Even
 Jump on parity Odd
 Jump on Zero
 Jump on No Zero
LD: Load H and L Registers Direct
Description: The instruction copies the contents of the memory location pointed out by the 16- bit
address in register L and copies the contents of the next memory location in register H. The
contents of source memory locations are not altered. No flags are affected.

2.6 TIMING DIAGRAM OF 8085

Timing diagram is the display of initiation of read/write and transfer of data operations
under the control of 3-status signals IO / M , S1, and S0.

Timing diagram of opcode fetch cycle

Explanation;
 Fetching the instruction (opcode ) from the memory.
 There are 4 clock cycles T1,T2,T3,T4 were to represent as one machine cycle.
 IO/M includes to communicate with the memory
 Processor sends S0 & S1 signals out to perform the fetch operation.
 During T1 cycle, processor sends out the address of memory location.
 16 bit address is sent through AD0-D7 & A8-A15.
 ‘AD’ carries low signals and ‘A’ carries high signals.
 During T2 &T3 ‘AD’ bus is for data transferring and fetch is over.
 During T4’ the opcode is decoded.
 Address latch enable is the type pulses generated whenever the processor starts an
operation, creating A0-A7 address line separately.
Timing diagram of memory read
Explanation;
 Reading the content of memory location to suit the output in the registers.
 There are 3 timing clocks only.
 For read operation S0 and S1 are 1 & 0.
0 0 means Halt
0 1 means Write
1 0 means Read
1 1 means Fetch
 The other operations are same as like in the fetch cycle.
Timing diagram of memory read with state
Explanation;
 Reading the content of memory location to place it in the register with wait signal,
 There are 3 clock periods available.
 Ready signal is to delay the processor read cycle till the peripheral is ready to accept the
data.
 Ready signal is the input signal.
 Remaining things are same as in the read operation.

Timing diagram of I/O Read

Explanation;
 The processor reads the data in the input device/port to place in the accumulator.
 I/O read cycle is similar to memory read cycle.
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 The address is 8 bit length only. So that the same duplicated on ‘Address and Address
data bus. ’
 Remaining are same as in the Read Operation.

Timing diagram of Memory Write Cycle

Explanation;
 Processor sends the data from the register to memory.
 The status signals options are 1 and 0 for different operations.
0 0 Halt
0 1 Write
1 0 Read
1 1 fetch
 There are 3 clock cycles.

Memory Write With Wait State.

Explanation;
 Processor se4nds the data from the register to memory.
 The status signal options are same as memory write cycle.
 There are 3 clock cycles.
 The ready signal is to delay the processor write cycle till the peripheral is ready to send or
accept the data.
I/O write.
Explanation;
 The processor sends data to an I/O port from the accumulator.
 It is similar to memory write cycle.
 If I/O goes high, the processor sends the address for I/O device and the I/O port address
is duplicated by ‘A’ ad ‘AD’ buses.

2.7 INTRODUCTION
 The microcontroller incorporates all the features that are found in microprocessor. The
microcontroller has built in ROM, RAM, Input Output ports, Serial Port, timers, interrupts
and clock circuit. A microcontroller is an entire computer manufactured on a single chip.
Microcontrollers are usually dedicated devices embedded within an application. For
example, microcontrollers are used as engine controllers in automobiles and as exposure
and focus controllers in cameras.

2.7.1 Concepts of 8051 microcontroller

 Microcontroller (MC) may be called computer on chip since it has basic features of
microprocessor with internal ROM, RAM, Parallel and serial ports within single chip. Or
we can say microprocessor with memory and ports is called as microcontroller. This is
widely used in washing machines, vcd player, microwave oven, robotics or in industries.
 Microcontroller can be classified on the basis of their bits processed like 8bit MC, 16bit
MC.
 8 bit microcontroller, means it can read, write and process 8 bit data. Ex. 8051
microcontroller. Basically 8 bit specifies the size of data bus. 8 bit microcontroller means
8 bit data can travel on the data bus or we can read, write process 8 bit data.
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Fig 2.5 Block diagram 8051

128 Byte RAM for Data Storage
 MC 8051 has 128 byte Random Access memory for data storage. Random access memory
is non volatile memory. During execution for storing the data the RAM is used. RAM
consists of the register banks, stack for temporary data storage. It also consists of some
special function register (SFR) which are used for some specific purpose like timer, input
output ports etc. Normally microcontroller has 256 byte RAM in which 128 byte is used
for user space which is normally Register
4KB ROM
 In 8051, 4KB read only memory (ROM) is available for program storage. This is used for
permanent data storage. Or the data which is not changed during the processing like the
program or algorithm for specific applications.
 This is volatile memory; the data saved in this memory does not disappear after power
failure.
 We can interface up to 64KB ROM memory externally if the application is large. These
sizes are specified different by their companies.
Address Range of PC:
 Address range of PC means program counter (which points the next instruction to be
executing) can be moved between these locations or we can save the program from this
location to this location. The address range can be calculated in the same way just like the
RAM which is discussed in previous section.
Difference between RAM and ROM
 RAM is used for data storage while ROM is used for program storage.
 Data of RAM can be changed during processing while data of ROM can’t be changed
during processing.
 We can take an example of calculator. If we want to perform addition of two numbers then
we type the two numbers in calculator, this is saved in the RAM, but the Algorithms by
which the calculation is performed is saved in the ROM. Data which is given by us to
calculator can be changed but the algorithm or program by which calculation is performed
can’t be changed.
1.4.3 Timers and Counters
Timer means which can give the delay of particular time between some events. For example on or
off the lights after every 2 sec. This delay can be provided through some assembly program but in
microcontroller two hardware pins are available for delay generation. These hardware pins can be
also used for counting some external events. How much times a number is repeated in the given
table is calculated by the counter.
4931_Grace College of Engineering, Thoothukudi
• In MC8051, two timer pins are available T0 and T1, by these timers we can give the delay of
particular time if we use these in timer mode.
• We can count external pulses at these pins if we use these pins in counter mode.
• 16 bits timers are available. Means we can generate delay between 0000H to FFFFH.
• Two special function registers are available.
• If we want to load T0 with 16 bit data then we can load separate lower 8 bit in TL0 and higher
8 bit in TH0.
• In the same way for T1.
• TMOD, TCON registers are used for controlling timer operation.

1.4.4 Serial Port

• There are two pins available for serial communication TXD and RXD.
• Normally TXD is used for transmitting serial data which is in SBUF register, RXD is used for
receiving the serial data.
• SCON register is used for controlling the operation.
• There are four modes of serial communication which has been discussed in next chapter.

1.4.5 Input Output Ports

• There are four input output ports available P0, P1, P2, P3.
• Each port is 8 bit wide and has special function register P0, P1, P2, P3 which are bit addressable
means each bit can be set or reset by the Bit instructions (SETB for high, CLR for low)
independently.
• The data at any port which is transmitting or receiving is in these registers.
• The port 0 can perform dual works. It is also used as Lower order address bus (A0 to A7)
multiplexed with 8 bit data bus P0.0 to P0.7 is AD0 to AD7 respectively the address bus and data
bus is demultiplex by the ALE signal and latch which is further discussed in details.
• Port 2 can be used as I/O port as well as higher order address bus A8 to A15.
• Port 3 also have dual functions it can be worked as I/O as well as each pin of P3 has specific
function. P3.0 – RXD – {Serial I / P for Asynchronous communication When external memory is
interfaced with 8051 then P0 and P2 can’t be worked as I/O port they works as address bus and
data bus, otherwise they can be accessed as I/O ports.
1.4.6 Oscillator
• It is used for providing the clock to MC8051 which decides the speed or baud rate of MC.
• We use crystal which frequency vary from 4MHz to 30 MHz, normally we use 11.0592 MHz
frequency.
1.4.7 Interrupts
• Interrupts are defined as requests because they can be refused (masked) if they are not used, that
is when an interrupt is acknowledged. A special set of events or routines are followed to handle
the interrupts. These special routines are known as interrupt handler or interrupt service routines
(ISR). These are located at a special location in memory.
• INT0 and INT1 are the pins for external interrupts.