The document outlines the structure and instructions for the Regular & Supplementary Winter Examination-2023 for B. Tech students in Electronics and Computer Engineering and Electronics and Computer Science Engineering. It includes details on the subject 'Computer Architecture & Operating System', the examination format, and a series of questions that students must answer. Each question is linked to specific Course Outcomes and covers various topics related to computer architecture and operating systems.
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Computer Architecture and Operating
The document outlines the structure and instructions for the Regular & Supplementary Winter Examination-2023 for B. Tech students in Electronics and Computer Engineering and Electronics and Computer Science Engineering. It includes details on the subject 'Computer Architecture & Operating System', the examination format, and a series of questions that students must answer. Each question is linked to specific Course Outcomes and covers various topics related to computer architecture and operating systems.
Regular & Supplementary Winter Examination-2023 Course: B. Tech. Branch : Electronics and Computer Engineering / Electronics and Computer Science Engineering Semester :III Subject Code & Name: Computer Architecture & Operating System (BTESC304) Max Marks: 60 Date:09-01-24 Duration: 3 Hr.
Instructions to the Students:
1. All the questions are compulsory. 2. The level of question/expected answer as per OBE or the Course Outcome (CO) on which the question is based is mentioned in ( ) in front of the question. 3. Use of non-programmable scientific calculators is allowed. 4. Assume suitable data wherever necessary and mention it clearly. (Level/CO) Marks Q. 1 Solve Any Two of the following. 12 A) Draw the connections between the processor and main memory and CO1 6 explain the basic operational concepts. B) Explain the different kinds of addressing modes with an example. CO3 6 C) Explain the Intel X86 architecture with a neat block diagram. CO1 6
Q.2 Solve Any Two of the following. 12
A) Explain briefly about Associate-mapped and set-associate mapped CO2 6 cache. B) What are the disadvantages of single continuous memory allocation? CO2 6 Explain. C) Consider the following page reference string: CO4 6 1,2,3,4,2,1,5,6,2,1,2,3,7,6,3,2,1,2,3,6 How many page faults would occur for the optimal page replacement algorithm, assuming three frames and all frames are initially empty.
Q. 3 Solve Any Two of the following. 12
A) Explain the basic concepts of instruction pipelining in computer CO3 6 architecture. How does instruction pipelining improve CPU performance? B) Draw the microinstruction-sequencing organization of next-address CO3 6 field and explain it. C) Explain input/output operations of computer architecture. CO3 6 Q.4 Solve Any Two of the following. 12 A) What is the difference between a process and a thread? CO4 6 B) Define the Operating System. Describe the operating system's CO4 6 objectives and functions. C) Assume the following workload in a system: Draw a Gantt chart CO4 6 illustrating the execution of these jobs using Round robin with time quantum = 2 unit scheduling algorithm and also Calculate the average waiting time and average turnaround time. Process Arrival Time Burst Time P1 5 5 P2 4 6 P3 3 7 P4 1 9 P5 2 2 P6 6 3
Q. 5 Solve Any Two of the following. 12
A) What is the critical section? What are the minimum requirements CO5 6 that should be satisfied by a solution to critical section problem? B) What is Producer Consumer problem? How it can illustrate the CO5 6 classical problem of synchronization? Explain. C) Explain deadlock avoidance using banker’s algorithm with suitable CO5 6 example.