Camli Page

Date

M e m o r y Management

x Baelg Hardware
Whenever a process is created it has to be
loaded on a physical rmemoryfor ils success-
Fu executionEveru process hao a separate
mempry epace on phusical _memoruThere
is need to_determine range ot. leqal
1 Oddress es that the prDces may access and
to ensure that process can accesS anly
these legal addresacss
he memory protechon is achieved by
uaing uo reqisters base register and limt.
1eqieter h e base eqister contains_
Smallest legal physical address (First leqal_
phusical address ) at phuoical menony dssiqne
tothat panticulor procesa.lhe limit reqister
specifies he Size dE fhe processi.e totalL
number ot physical addhésses assiqned to_
hat proce5
peratng-
Systern 1510

Process P
Last adeoS|
PLS Process Pa
232L

hysical MMemOry
 PLSBase= 1SiD Camlin Page

Pis i m t gegis}e =820

The qiven diaqmam shows the structute ot
physical memby. Base register ot proce9s P
Contains the address 1610 0nd limit Tegister
of pocess Pi contains23 B0- 15lO =820
h e base g imit reqister can be 1oaded

only by operatinq syatem

Bose + imit|
Bose

CPU addre9S Yes

No INO

Irap addiessina eiTDY

Physical
mémoy

Addrcss_p1otecthon oitb base & lim1t yeqiater

Address Bindioq
Bindina betuueen_instructions ot the
preces6 and phusical addresses On O
phusical mermory Can be_dane_at any
the folouinq time

Compile time
1t indicates that phusical addresoes
oamemoTy0Te determined at
 Camlin Page
Date

cOmpile hime et the proq10m 1.e., it is

known at compile time where the pTbCeSs
unill eside n memby, Fhe physicol
addres5ES_Ae detearained at the time ot loading
sa he protess la nain memot Foxsucb
proqiams edEoe Code is qeneroted
absolmBe

Load time address bìnd inq

T t i is not know n at compile time uhere
hprocess uuill seside in memory, the physical
addresaes are determined at the time ot loadina|
st the procesa in main memorys foy 6uch proqom
J
nocatable code is qenerated

3s E xecution time addess binding

TR tne procesa can be moved durim its
execution fom memony aegment o anoth@r
then binding must be delayed until Tuntimc.

aoqical hddresa Spaced ëPhysical_Address epace

Logi.cal Addreess
Anaddress qenerated bu o CPu.
scalled as loqical address

Physlcal Addre63
Physicd addresg ie an_addreoe on
a memory unit Cphysical memors
 Camlin Page
Date

The compile 4ime address binding

&oad time address bindinq methodc

generate identhical. loqical dnd physical
the_execution
a ddyesees HoueyeT Hmc
Oddres6 bindinq method results
in
different logical and physical aIdyesDEs.
The loqical ane- physteaB addresses
1s also Called as vistual address
Toe set ot all lbaical addoresecs
geneated bu a proaam 19 called as
l6gicaladdress Apace The Set dall
phusical addresses Qasiqned to a.
paxticLular pioomam on a phusical
memoY iS Called as physical address
15 Space
Inexecuion Aime addkess bindinq-
methodlogical add1ess apacephysical
address Space may ditter there is a
need ok perfavming the mappinq from
irtual addiesses to phyaical addresseo-
Thi6 mappinqis done by a horduiaTt
device Called 05 memøru monaq emen
unit CMMU ) MMU U.sea base
reqister uelbcation Tegister) ohose
valye is added to every oqical
addresS oy a EEE s .CpU.
 Camlin Page
| Date

Relocation
Regieter
Phusicol
sPUogtcar 0ddTesS
AddresS 1100 Jsi0
410

MMU

Physical
mernDM-
Dunamic Relocanion_USinqnelocathon xeaisBey

RDynamic Loading
La this a routine dt a pazhicular progra
nDt loaded until it is called
The advantage c dyndmic loadinq is
that an unuscd roufine iis never loacded

*Swappiha
owappinqisa technique cttenpoTa-
nily moving apTOcess from-physical
memory Ao abackinq store (secondou~
storage ) and hen binq back into
main_memory- forconhinued execuhion.

-
 Camlin Page
Date

Operoino-
System
1 Suap
Out Ronese

8uwoOp
Prores
P

uSer
spoce
a
backina store
uappina t u o pocesa5 disk as
backing Store
NOy mally a process ihat iD swagued
Out oil be suapped back into fhe same.
memoxy Bpaceit
itoccapied meviously. I
binding i9 done at compile OT Ioad time
fben he process (an not be easilumOYEd.
D O difterent lbcation But ifexecuion
indin9.
time addhess neis USed the pTOLCE
Can b e
SuappedintD 0 difterent mcm014
Space because fHe phuical addicsses-
ale Compufed duming execuion
timt
Memeit AHacatien

Memer
 Camlin Page
|Date

Contiquaus Memoy Allocation

Memoru mnappinq ohd

protectiDn
n_cdntiquouS me morYy allocothioo,-
naemeru mapping Eptection isdone
Aiththe help st relocation ond limit
reqisAer9 Fach Loaicaladdies9qenera=
ted by CPU must_be less han the
limit reaisBer
Ihe memoTU mona.gcment un1 T
maps the_loqical address dynamically
by ddimqit to the yalue in the
relpcadon Ieqisterlhe resultant
addaess is he physicalna phusi-
C a me mo1Y addTe98

limit relocanon
reister Tester

CPU l0gical yes Physica

addvess addess
h6

trop 0ddiesSing ern

25
Phusical
memOTY

Memaru mapping ond proBechon in

CDntiauaLus memorualocation
 Camlin Page
Date I

In contiquous menory allocction

seveTal
physical memoTY iS _divided into
PLXed
Fxed sized patitions wherc si2e oone
pan tition may vary rom ather paTtition

tach pantition may contoin exactly ODe

pIccess hen a parahon js free
pTocess is selected Krom a input queue
And is loaded ino the free patition.
ohen pntuesa texminates pantititn
become available fo1 anothex process.
There ane3 diffeyed allocction
Hechniquesiused tn Select a tree
Aosihon uhenevey_a neuS pocess is
Created

First- it allocation
This allocotion technique allocates irst.
Ovailable pantiion uubich s bi9 enougb
J

Bestfit allocatiaD_
Ihis Aechnique allocates snallest.
Duailablepootition to the precess
which is_biqenoLugh or the alldcation-
t h e 1ocess Ihis technique equ
25 iD ech entixe list o Otitions o-
the allocation.

3 Norat-it allocation
This sehnique allocates a panthtiO
 Camlin Page
Date

DaDTOCES8uhich is larqest amonq

all fhe_availablepanitions

gtihionA

pmhion B

pahhoh C
oD
paTitinn D

Physical memDIY

Conside the stTUctune ot physica

wbichis _divídend into 4
panhtions Each partion is of different
SIze
Consider a piocess_P bt Sze a 50
ls CIeate.d n case_ef iat-fit
allocation pantition A will be
allocated to pocee P In case
ot besB -it allocati.on method,-
paytition C uill be allo.cated to
pIOcesS P And in case ot u01st
25
Ht allocation method pan ition D
ill be allocoted o pro.ceso
 Camlin Page
Date

Eraqmentation
ContiouOuS memory allocaten has a
problem oi inteinal aamentahion
and exBernal iraqmentaion

Intemal fragmeptation
Cpavtiton)
The memary, allbcaled Ad the
pb.cess may be laTQer than the
oSi2 he proce65 The difEere.nce
behueen pantihion Size and pmocese
Szc iacalled as internal fraq
mentatho.o

Pror ess Po
Panhhon A

35o

busical Memsru

In INendiagigm, o.artinan A-
size 400 is albcated m the
prOces6 Pa uoith sizc z60 I n
this Cose 50 memoru |o.cahoD-
t h e phlusical_memors_can ptl-
 Camlin|Pa
Date
be uilized Since they ae
intenal fo
pantition A

External fraqmentaBhion
External åraqmentation exist
when here s enough total space
tD saisfs_a equestai a
pYocess
but the avai able epaces Q1e nof
Contiauous IEstorage is roq
1amented intp_laxqe. numbex ot small
parhops external fraqmentaton Can

Pracess P
39

Panhtion B PIOCess P
- - 600

Ponti tion C2 ProcesS P2

-
Phusical Memoy

Consider he qiven phusical mmary

aTe-
in which 95D memory locations
Consider the_mocess Pa
available
2oo
1 newly crecated with size
he size the prbcess 16less thap
 Camlin Page
Date

he total available size on physica

memary but stil prbcess Pa can

not bbe loaded on phusicalmemDIL
S
since the total availoble memor
Space IS non - ContiquouS

Solutions o H a externa\ Tagmcnto

Honpmoblem

i Compaction In_conpachion tecbniqU

Memoru Contents on phusical mem-
OTYaTe shutfled_S0 05 n
place all Aree memoTU laccations
tngetheri n one larqe block
Compaction is not alu»oys
pD6ible T1 [elocation 1s Stotic
and i it done at Compile timt
Ond
Ond oad time compachon can
nDt be done
Compocion_1S posslble on
4relocc1tion is dynamic and is
done ot exeCunon time

Exernal faqmentation Canbe solved-

bu alloLing loaical addiess
25

Orocf5 s_ n be epoct
n00-Coniquoug
Hesce pIDcess Can be olldcated o
physiml memo ohereser it 19
vailable
 CamlinPage
Date

Paging
Poqing 1 O MemOnu nanaaement
echnlque that permits phusicol addres
SpaaGe O dp1bcess t be Don-conh-
quous
The basic me thod for implemen
ing paging- nvolves breaking phuscal
memory into Äxed sizc, blocks called
framesand bneakinq loqicaaddres
Space dt a pmocees ino blocks at the
Samesize Called_gs Pages
WheneNeT C pocess is D be
execut ed its pages are Daded into
1sQny avalable mem oTu rames on
aphusical
J memoTY
Everyoqical addnesa
generatecl intd cPU is divided inta
2 pants Page Numbt Cp)E
age_otfaet LdO
he poage number is 0sed
as on index into oqe table The
page table contain9 base addaess
C) e4 each page in physicalmemoiy
h i s base oddrcos,is com-
bined oifh page oftsct@to generoe
phusil aempty_add)ecs carespo Hd-
jna o loaical add1ess qeneroted by
eP
 Camlin Poge
Date

toqicol
addvess|
P Pd
physica
oddses5

physico|
mem.oY U
Poge Toble

Paging horduoo1e
Tn poginq there isno probem of
exteyna froomentation since any ree
Frame can be allocated to a
that needs itbut there prOcess
poblem ot
is a
internal
in paging
fraqmentathon-
* Mapping of \ogical address intD corres1
ponding physical addTess
Considler a process dt size
1G by
ConsideTpage size is 4 bytes
physical
physical
memOTyis tE32 bytes
To executeTnot pTOcess OS haS
lDaded pag OOntd irarne B,
Pac 1 Onto frame 3, poge 2 -
 Camlin Page

onto tramc 1 and page 3 onto

rame 0.
The COTTesponding entle6 OTe mode
inio page toble i.e, t same nuinbrr ore
stuved into paqe toble intu CoIespond-
ingp0ge numbe enties

b
Page
2

Fboe
1

3 O
2
mPage 3
Paae 2
Table 13 rorne
A5

Process5 iome

20

22 5
20 2,

25
26

28
2 |tam
30
3

Phueical
memoT

Dmap a loqical addxess into corres

pondina phusicaladde3s the foamula
rame o x frame size) + poar ofseb
Can be used.
 Camlin Page
Date

CPU ants dd executeinstiuction

'h b' has loqlcal address 1
Lpq no =1, paqe offsct=3).
The CO respandinq phusical addaess
will be (3x4) t3 uohich is phusim
address_o instruction h

Paging
*Paqinq hardusane uwith TLB.

IE tae si2e thethe pTDcess is

Page
Do bìq Its precess tnble can have
large number o entries Sich paqAe
toble is kept in_main_memoru
LLpao table is stored on main_
memoU here ae two memory
eferences 0eeded o access
uiredinstuctions Cone for paae table-
entn and one r he instruction
en main memDry
stred
Hence memory acces-
becomes slouw ya actor d 2.
lo provide a 5olution r
problem, franslorion look- oside this-
CTLB) can be buffe
used The TB 15
15
hiah speed memoru
Each_entru in he TLB Co n515
of tuuo pants
key and \oluc Cpag
no and tranmenunber)
Contains ILB
ony heuo e the page
page
entries The number ot tablc
table
entries in
 Camlin Page
Date

TLB 1 smallbetuw een 6y ond 024

he TLB is ueed uwith paqe
table n follouwing way
Whena loqical adsess iSqene-
rated by CP0, its paqeno s seam-
ched in LB Epaqe no. is aund
CILB hit), the rame numbe is
immediately uailable and is used to
acce.6s memOTY

t page no is not ound in

TLS TLB_ miss) eference to
page table must be made When the
Erame no. is obtained It Con be usedl
toaccess_memoru Ihe paae no
5 ame nO. 1sadded lo TLB oa fature
reterence

Hit_ratio : he percentage ot ttimes

that a ponticular_paqe number is
Dund io_TLB is called as hit
logial
addess9
CPU Pd Page Frame
nurmber nunober
TLB
hit

TLB
Physico
odress
d
TLB mi6S

Pogt Physical
Table MemorKy
Poqina Harduwaxe uwithTLB
 Camlin Page
Date

*aeameatation
Seqmentation_15 0 memoru_managc-
ment Scheme hat Suports iser view vie
s t memoru-
In seqm.entation, lcqical Oddiess
space et apOcess is divided intD 0o.
oseaments Each seqment f o pDCCS5
has a 6eament Aundber In seqmentanon,
oqical addre55 consists ottuo tupple
seament-number, sCqment -citset.-
Seaments oB a precess can be.
1code seqment
9 Data seqment
2 Stack seamem
4 Heap seament
5 )Standand librany ecamert

he omapping a loqical addness

uithCorresp.ondinq physical addyess is-
doneby usinq seoqment toble.
EYeruentry Ot seamcnt table-
has o fieldsseameni base &
Seament limit
Ihe eeameni base Contains
sto ting physical address ot thart
seqment DD physical memoru he
Sea ment limit 9peciies lenqth er th
J
Seqmerni
 Camlin Page
Date

A lbqical add1eos has uuo parts:

AegmenB-numberS6 and seqment-_
offoetd. The 5eqment_oumbe is
used as an index into s.eameni table
he oi faet d_ot loqical address must
be betuieen 0_and eqment limit
F iBis no addiessing eNoroillL
be qenerated. when cn_ctiset l5
leaal,itis added Bo seqment basc
lto prbduce physicoladdress af obyte
OntD physicalmemory
loqical S
address
Segment seoment
CPU sd lirmit base

ezmen JTble

Piysica
address
d yes
No

Trap: addressina eirorK Physica

mernoIY
heqmentation hardu20ne

Example o f Seqmentahon
 Logical oddress C2,2 so
Camlin gzare
S2gment nate

o
5cgrmento|

Stack Code
limit base
SEqmEnto SComent 1 390D
4o6 Segmet 3
500
Stondae 4 G30d segment 2|
Dato heop 160
librory 400 4 30o| segmert 4|
Roment 2 Seqmert 3 egmem 6100
3 Oo 3200
4100 1o0 segment4
Loqical addicSs Spacee Seqment toble 6To0
of aplocesS Physical
TTemoT

k Vittual= Memoru managernent.

Vixtual - Memor y_manaqe ment.

1S a technique that al\OUOS executioa
of prOCesses that ane not comple
ely i n phusical memoru

Adantuq cs
Size cB the pTOcess cin be
than SIZe
laTqer
otthe
phusical mcmory
Since Lach pPIOCESS, ess phusica
memaT morepTOCesses Can uD
at the sametime whicb
at the
inreas
CPU utilization and thIouahput
3 Less 1/ois_ needed to ioad
oY wap pIOcess9es tota memory
 Logica addrcss =Ç41 640
egmert nunmbeCamlinlPage
smen
FSSEt
Date

Hence eachprocess Can Tunfoster

Demand Paging
Demand Paqinq i commonly
uSed in_Vixtual-nemen eystem
lh demand pounq intially ooly
eu
teu pages aprocess dre loaded intu
phusical memb14 whicb CTebeeded
l i t h demand paqngpaests p.acrs
ae only loaded ushen fhey a
demanded duninq execution e mocess
A handüiane Suppomt is
needed a ndicote hat uhickh paaes
pmoceS6 Oe on phusical memorq
Lohich paqes ofprocess ane not
On physical membry Fox this,-
PagetableContain additional ield
called as valid -invalid bit field
20 paqe s on_ phusical memon
then paae 4able ent m hat poqe
ls moked a s valid ( ) . 1E paqe is
paqeis
not on phusicol_memory, paqe table
entry
enttu Oí hat p.age is maked as
invaiid Ci uohich is shouan 0 given
 |Logica addressS =4, 670 Smert
Segmet nubeCumin Page
Date

Hence eachpoces9 can Tun faster A

Demand Paging
Demand Paqinq i s commonly
Used n virtual-memaiu 8ystem
lh_demand pagunq iniially ooly
teu pages d_a process are loaded int
physical mem.o1y which CATe eeded_
l a i t h demand pagingphastspaqrs
a e only loaded_when hey Are
demanded duinq executiop spOCess
A hadanane suppomt is
needed nindicate hat ushich paqes
15 paoces601eon phusical memary4
Lobich paqesof process ane not
phuysical membry Fox this,
pagc table_contain addittonalield
called as valid -invalid bit field.
paae is onn phusical memo
then paae 4able _entiu fnn that paqc
s Maked as valid (v)ifpaqe is
not on physical memoy poqe ta ble
entry hí Ahat pcqe is mamked as
invalid C uohich is shoun a qiven
 Camlin Page

1 Torne
number

ddress
Frame No olid Inulid
brt

2 v A

3 D DE
3

E 4 L

Looicol Pane oble

opoce D
PTOCess
Phusical
memorY
Date

storogee

Page -Hault - Page fault ocuis when

bi process tru o acces4 apaqe Luh0se
page table entLis mnankcdhas invalid:
LeipIDCes4 tru o ccess a paae
uwhichis not on physicalmemo then-
paae ault DCCUTS

Operating system fnllous same set ot

steps tD handle _page Kault

O S0S determines_ whether the Tefercnce

made n memaTy 6 vaid ar invalid
 M

25
Camlin Page

LHhe reference is inualid piocess is

terminated IF rekerence i ualid, oS
will Tead that paqefrom_
secondary
sBorage nto main mem ory
3Find a free ftame on phy6ical memory
A Sehedule disk operation to read the desired
page into the neulu allocat ed frame-
5 Nhen disk read operoion is complete,
OS moditics he poge table entru to
olindicote that pogs is nDus io main_
Meonory Date

GResiart fhe instruction that was inte-

ol upted because et page fault. The
pTOCes.s canDou accessthe paqe as
15 1t 1s in_main memary
Operottng System
Pbae is on bocking sure

20
2)
Tap
(1eence
load

Restant
instiuchon

Paqe bocking
stnìe
Tabte

Bving
misang9
Free framnek aqe
Reset Paqe-
table

Steps handling page ault Physical memoy