Unit-III

Functional Units of Digital System

o A computer organization describes the functions and design of the various units of a
digital system.
o A general-purpose computer system is the best-known example of a digital system.
Other examples include telephone switching exchanges, digital voltmeters, digital
counters, electronic calculators and digital displays.
o Computer architecture deals with the specification of the instruction set and the
hardware units that implement the instructions.
o Computer hardware consists of electronic circuits, displays, magnetic and optic
storage media and also the communication facilities.
o Functional units are a part of a CPU that performs the operations and calculations
called for by the computer program.
o Functional units of a computer system are parts of the CPU (Central Processing Unit)
that performs the operations and calculations called for by the computer program. A
computer consists of five main components namely, Input unit, Central Processing
Unit, Memory unit Arithmetic & logical unit, Control unit and an Output unit.

Input unit

o Input units are used by the computer to read the data. The most commonly used input
devices are keyboards, mouse, joysticks, trackballs, microphones, etc.
o However, the most well-known input device is a keyboard. Whenever a key is
pressed, the corresponding letter or digit is automatically translated into its
corresponding binary code and transmitted over a cable to either the memory or the
processor.
Central processing unit

o Central processing unit commonly known as CPU can be referred as an electronic

circuitry within a computer that carries out the instructions given by a computer
program by performing the basic arithmetic, logical, control and input/output (I/O)
operations specified by the instructions.

Memory unit

o The Memory unit can be referred to as the storage area in which programs are kept
which are running, and that contains data needed by the running programs.
o The Memory unit can be categorized in two ways namely, primary memory and
secondary memory.
o It enables a processor to access running execution applications and services that are
temporarily stored in a specific memory location.
o Primary storage is the fastest memory that operates at electronic speeds. Primary
memory contains a large number of semiconductor storage cells, capable of storing a
bit of information. The word length of a computer is between 16-64 bits.
o It is also known as the volatile form of memory, means when the computer is shut
down, anything contained in RAM is lost.
o Cache memory is also a kind of memory which is used to fetch the data very soon.
They are highly coupled with the processor.
o The most common examples of primary memory are RAM and ROM.
o Secondary memory is used when a large amount of data and programs have to be
stored for a long-term basis.
o It is also known as the Non-volatile memory form of memory, means the data is
stored permanently irrespective of shut down.
o The most common examples of secondary memory are magnetic disks, magnetic
tapes, and optical disks.

Arithmetic & logical unit

o Most of all the arithmetic and logical operations of a computer are executed in the
ALU (Arithmetic and Logical Unit) of the processor. It performs arithmetic
operations like addition, subtraction, multiplication, division and also the logical
operations like AND, OR, NOT operations.
Control unit

o The control unit is a component of a computer's central processing unit that

coordinates the operation of the processor. It tells the computer's memory,
arithmetic/logic unit and input and output devices how to respond to a program's
instructions.
o The control unit is also known as the nerve center of a computer system.
o Let's us consider an example of addition of two operands by the instruction given as
Add LOCA, RO. This instruction adds the memory location LOCA to the operand in
the register RO and places the sum in the register RO. This instruction internally
performs several steps.

Output Unit

o The primary function of the output unit is to send the processed results to the user.
Output devices display information in a way that the user can understand.
o Output devices are pieces of equipment that are used to generate information or any
other response processed by the computer. These devices display information that has
been held or generated within a computer.
o The most common example of an output device is a monitor.

Bus and Memory Transfers

A digital system composed of many registers, and paths must be provided to transfer
information from one register to another. The number of wires connecting all of the registers
will be excessive if separate lines are used between each register and all other registers in the
system.

A bus structure, on the other hand, is more efficient for transferring information between
registers in a multi-register configuration system.

A bus consists of a set of common lines, one for each bit of register, through which binary
information is transferred one at a time. Control signals determine which register is selected
by the bus during a particular register transfer.

The following block diagram shows a Bus system for four registers. It is constructed with the
help of four 4 * 1 Multiplexers each having four data inputs (0 through 3) and two selection
inputs (S1 and S2).

We have used labels to make it more convenient for you to understand the input-output
configuration of a Bus system for four registers. For instance, output 1 of register A is
connected to input 0 of MUX1.
The two selection lines S1 and S2 are connected to the selection inputs of all four
multiplexers. The selection lines choose the four bits of one register and transfer them into
the four-line common bus.

When both of the select lines are at low logic, i.e. S1S0 = 00, the 0 data inputs of all four
multiplexers are selected and applied to the outputs that forms the bus. This, in turn, causes
the bus lines to receive the content of register A since the outputs of this register are
connected to the 0 data inputs of the multiplexers.

Similarly, when S1S0 = 01, register B is selected, and the bus lines will receive the content
provided by register B.

The following function table shows the register that is selected by the bus for each of the four
possible binary values of the Selection lines.

A bus system can also be constructed using three-state gates instead of multiplexers.
The three state gates can be considered as a digital circuit that has three gates, two of which
are signals equivalent to logic 1 and 0 as in a conventional gate. However, the third gate
exhibits a high-impedance state.

The most commonly used three state gates in case of the bus system is a buffer gate.

The graphical symbol of a three-state buffer gate can be represented as:

The following diagram demonstrates the construction of a bus system with three-state
buffers.

o The outputs generated by the four buffers are connected to form a single bus line.
o Only one buffer can be in active state at a given point of time.
o The control inputs to the buffers determine which of the four normal inputs will
communicate with the bus line.
o A 2 * 4 decoder ensures that no more than one control input is active at any given
point of time.

Memory Transfer
 Most of the standard notations used for specifying operations on memory transfer are stated
below.

o The transfer of information from a memory unit to the user end is called
a Read operation.
o The transfer of new information to be stored in the memory is called
a Write operation.
o A memory word is designated by the letter M.
o We must specify the address of memory word while writing the memory transfer
operations.
o The address register is designated by AR and the data register by DR.
o Thus, a read operation can be stated as:

1. Read: DR ← M [AR]
o The Read statement causes a transfer of information into the data register (DR) from
the memory word (M) selected by the address register (AR).
o And the corresponding write operation can be stated as:

1. Write: M [AR] ← R1
o The Write statement causes a transfer of information from register R1 into the
memory word (M) selected by address register (AR).

Register Transfer

The term Register Transfer refers to the availability of hardware logic circuits that can
perform a given micro-operation and transfer the result of the operation to the same or
another register.

Most of the standard notations used for specifying operations on various registers are stated
below.

o The memory address register is designated by MAR.

o Program Counter PC holds the next instruction's address.
o Instruction Register IR holds the instruction being executed.
 o R1 (Processor Register).
o We can also indicate individual bits by placing them in parenthesis. For instance, PC
(8-15), R2 (5), etc.
o Data Transfer from one register to another register is represented in symbolic form by
means of replacement operator. For instance, the following statement denotes a
transfer of the data of register R1 into register R2.

1. R2 ← R1

o Typically, most of the users want the transfer to occur only in a predetermined control
condition. This can be shown by following if-then statement:
If (P=1) then (R2 ← R1); Here P is a control signal generated in the control section.
o It is more convenient to specify a control function (P) by separating the control
variables from the register transfer operation. For instance, the following statement
defines the data transfer operation under a specific control function (P).

1. P: R2 ← R1

The following image shows the block diagram that depicts the transfer of data from R1 to R2.

Here, the letter 'n' indicates the number of bits for the register. The 'n' outputs of the register
R1 are connected to the 'n' inputs of register R2.

A load input is activated by the control variable 'P' which is transferred to the register R2.

Processor Organization
Figure below is a simplified view of a processor, indicating its connection to the rest of the

system via the system bus.

The ALU does the actual computation or processing of data. The control unit controls the
movement of data and instructions into and out of the processor and controls the operation of
the ALU. In addition, the figure shows a minimal internal memory, consisting of a set of
storage locations, called registers. Figure below depicts is a slightly more detailed view of the
processor.

The data transfer and logic control paths are indicated, including an element labeled internal
processor bus. This element is needed to transfer data between the various registers and the
ALU because the ALU in fact operates only on data in the internal processor memory. The
figure also shows typical basic elements of the ALU. Note the similarity between the internal
structure of the computer as a whole and the internal structure of the processor. In both cases,
there is a small collection of major elements (computer: processor, I/O, memory; processor:
control unit,ALU, registers) connected by data paths.

Register Organization

At higher levels of the hierarchy, memory is faster, smaller, and more expensive (per bit).
Within the processor, there is a set of registers that function as a level of memory above main
memory and cache in the hierarchy. The registers in the processor perform two roles:

• User-visible registers: Enable the machine- or assembly language programmer to minimize

main memory references by optimizing use of registers.
• Control and status registers: Used by the control unit to control the operation of the
processor and by privileged, operating system programs to control the execution of programs.

User-Visible Registers

A user-visible register is one that may be referenced by means of the machine language that
the processor executes. We can characterize these in the following categories:

• General purpose
• Data
• Address
• Condition codes

General-purpose registers can be assigned to a variety of functions by the programmer.

Sometimes their use within the instruction set is orthogonal to the operation. That is, any
general-purpose register can contain the operand for any opcode. This provides true general-
purpose register use. Often, however, there are restrictions. For example, there may be
dedicated registers for floating-point and stack operations.

In some cases, general-purpose registers can be used for addressing functions (e.g., register
indirect, displacement). In other cases, there is a partial or clean separation between data
registers and address registers.

Data registers may be used only to hold data and cannot be employed in the calculation of
an operand address.

Address registers may themselves be somewhat general purpose, or they may be devoted to
a particular addressing mode. Examples include the following:

• Segment pointers: In a machine with segmented addressing, a segment register holds the
address of the base of the segment. There may be multiple registers: for example, one for the
operating system and one for the current process.
• Index registers: These are used for indexed addressing and may be autoindexed.
• Stack pointer: If there is user-visible stack addressing, then typically there is a dedicated
register that points to the top of the stack. This allows implicit addressing; that is, push, pop,
and other stack instructions need not contain an explicit stack operand.

A final category of registers, which is at least partially visible to the user, holds condition
codes (also referred to as flags). Condition codes are bits set by the processor hardware as the
result of operations. For example, an arithmetic operation may produce a positive, negative,
zero, or overflow result. In addition to the result itself being stored in a register or memory, a
condition code is also set. The code may subsequently be tested as part of a conditional
branch operation. Condition code bits are collected into one or more registers. Usually,
they form part of a control register. Generally, machine instructions allow these bits to
be read by implicit reference, but the programmer cannot alter them.

Control and Status Registers

There are a variety of processor registers that are employed to control the operation of the
processor. Most of these, on most machines, are not visible to the user. Some of them may be
visible to machine instructions executed in a control or operating system mode.

Four registers are essential to instruction execution:

• Program counter (PC): Contains the address of an instruction to be fetched
• Instruction register (IR): Contains the instruction most recently fetched
• Memory address register (MAR): Contains the address of a location in memory
• Memory buffer register (MBR): Contains a word of data to be written to memory or the
word most recently read

The four registers just mentioned are used for the movement of data between the processor
and memory. Within the processor, data must be presented to the ALU for processing. The
ALU may have direct access to the MBR and user-visible registers. Alternatively, there may
be additional buffering registers at the boundary to the ALU; these registers serve as input
and output registers for the ALU and exchange data with the MBR and user-visible registers.

Many processor designs include a register or set of registers, often known as the program
status word (PSW), that contain status information. The PSW typically contains condition
codes plus other status information. Common fields or flags include the following:
• Sign: Contains the sign bit of the result of the last arithmetic operation.
• Zero: Set when the result is 0.
• Carry: Set if an operation resulted in a carry (addition) into or borrow (subtraction) out of a
high-order bit. Used for multiword arithmetic operations.
• Equal: Set if a logical compare result is equality.
• Overflow: Used to indicate arithmetic overflow.
• Interrupt Enable/Disable: Used to enable or disable interrupts.
• Supervisor: Indicates whether the processor is executing in supervisor or user mode. Certain
privileged instructions can be executed only in supervisor mode, and certain areas of memory
can be accessed only in supervisor mode.

Sample microprocessor register organizations are illustrated bellow.

Stack Organization: A useful feature that is included in the CPU of most computers is a
stack or last in, first out (LIFO) list. A stack is a storage device that stores information in such
a manner that the item stored last is the first item retrieved. The operation of a stack can be
compared to a stack of trays. The last tray placed on top of the stack is the first to be taken
off. The stack in digital computers is essentially a memory unit with an address register that
can only( after an initial value is loaded in to it).The register that hold the address for the
stack is called a stack pointer (SP) because its value always points at the top item in stack.
Contrary to a stack of trays where the tray itself may be taken out or inserted, the physical
registers of a stack are always available for reading or writing. The two operation of stack are
the insertion and deletion of items. The operation of insertion is called PUSH because it can
be thought of as the result of pushing a new item on top. The operation of deletion is called
POP because it can be thought of as the result of removing one item so that the stack pops up.
However, nothing is pushed or popped in a computer stack. These operations are simulated
by incrementing or decrementing the stack pointer register.

Register stack: A stack can be placed in a portion of a large memory or it can be organized
as a collection of a finite number of memory words or registers. Figure X shows the
organization of a 64-word register stack. The stack pointer register SP contains a binary
number whose value is equal to the address of the word that is currently on top of the stack.
Three items are placed in the stack: A, B, and C in the order. Item C is on the top of the stack
so that the content of sp is now 3. To remove the top item, the stack is popped by reading the
memory word at address 3 and decrementing the content of SP. Item B is now on top of the
stack since SP holds address 2. To insert a new item, the stack is pushed by incrementing SP
and writing a word in the next higher location in the stack. Note that item C has read out but
not physically removed. This does not matter because when the stack is pushed, a new item is
written in its place. In a 64-word stack, the stack pointer contains 6 bits because 2 6 =64. since
SP has only six bits, it cannot exceed a number greater than 63(111111 in binary). When 63
is incremented by 1, the result is 0 since 111111 + 1 =1000000 in binary, but SP can
accommodate only the six least significant bits. Similarly, when 000000 is decremented by 1,
the result is 111111. The one bit register Full is set to 1 when the stack is full, and the one-bit
register EMTY is set to 1 when the stack is empty of items. DR is the data register that holds
the binary data to be written in to or read out of the stack. Block Diagram Of A 64-Word
Stack Initially, SP is cleared to 0, Emty is set to 1, and Full is cleared to 0, so that SP points
to the word at address o and the stack is marked empty and not full. if the stack is not full , a
new item is inserted with a push operation. the push operation is implemented with the
following sequence of micro-operation. SP ←SP + 1 (Increment stack pointer) M(SP) ← DR
(Write item on top of the stack) if (sp=0) then (Full ← 1) (Check if stack is full) Emty ← 0
( Marked the stack not empty) 46 The stack pointer is incremented so that it points to the
address of the next-higher word. A memory write operation inserts the word from DR into the
top of the stack. Note that SP holds the address of the top of the stack and that M(SP) denotes
the memory word specified by the address presently available in SP, the first item stored in
the stack is at address 1. The last item is stored at address 0, if SP reaches 0, the stack is full
of item, so FULLL is set to 1. This condition is reached if the top item prior to the last push
was in location 63 and after increment SP, the last item stored in location 0. Once an item is
stored in location 0, there are no more empty register in the stack. If an item is written in the
stack, Obviously the stack can not be empty, so EMTY is cleared to 0. DR← M[SP] Read
item from the top of stack SP ← SP-1 Decrement stack Pointer if( SP=0) then (Emty ← 1)
Check if stack is empty FULL ← 0 Mark the stack not full The top item is read from the
stack into DR. The stack pointer is then decremented. if its value reaches zero, the stack is
empty, so Emty is set to 1. This condition is reached if the item read was in location 1. once
this item is read out , SP is decremented and reaches the value 0, which is the initial value of
SP. Note that if a pop operation reads the item from location 0 and then SP is decremented,
SP changes to 111111, which is equal to decimal 63. In this configuration, the word in
address 0 receives the last item in the stack. Note also that an erroneous operation will result
if the stack is pushed when FULL=1 or popped when EMTY =1. Memory Stack : A stack can
exist as a stand-alone unit as in figure given, or can be implemented in a random access
memory attached to CPU. The implementation of a stack in the CPU is done by assigning a
portion of memory to a stack operation and using a processor register as a stack pointer.
Figure shows a portion of computer memory partitioned in to three segment program, data
and stack. The program counter PC points at the address of the next instruction in the
program. The address register AR points at an array of data. The stack pointer SP points at
the top of the stack. The three register are connected to a common address bus, and either one
can provide an address for memory. PC is used during the fetch phase to read an instruction.
AR is used during the execute phase to read an operand. SP is used to push or POP items into
or from the stack. As show in given figure. The initial value of SP is 4001 and the stack
grows with decreasing addresses. Thus the first item stored in the stack is at address 4000, the
second item is stored at address 3999, and the last address that can be used for the stack is
3000. No previous are available for stack limit checks. We assume that the items in the stack
communicate with a data register DR. A new item is inserted with the push operation as
follows. SP← SP-1 M[SP] ← DR The stack pointer is decremented so that it points at the
address of the next word. A Memory write operation insertion the word from DR into the top
of the stack. A new item is deleted with a pop operation as follows.

DR← M[SP],SP←SP + 1, 47 The top item is read from the stack in to DR. The stack pointer
is then incremented to point at the next item in the stack. Most computer do not provide
hardware to check for stack overflow (FULL) or underflow (Empty). The stack limit can be
checked by using two processor register: one to hold upper limit and other hold the lower
limit. After the pop or push operation SP is compared with lower or upper limit register.

Addressing Modes

Addressing Modes– The term addressing modes refers to the way in which
the operand of an instruction is specified. The addressing mode specifies a
rule for interpreting or modifying the address field of the instruction before
the operand is actually executed.
Addressing modes for 8086 instructions are divided into two
categories:
1) Addressing modes for data
2) Addressing modes for branch
The 8086 memory addressing modes provide flexible access to memory,
allowing you to easily access variables, arrays, records, pointers, and other
complex data types. The key to good assembly language programming is
the proper use of memory addressing modes.
IMPORTANT TERMS
 Starting address of memory segment.
 Effective address or Offset: An offset is determined by adding any
combination of three address elements: displacement, base and index.
 Displacement: It is an 8 bit or 16 bit immediate value given in
the instruction.
 Base: Contents of base register, BX or BP.
 Index: Content of index register SI or DI.
According to different ways of specifying an operand by 8086
microprocessor, different addressing modes are used by 8086.
Addressing modes used by 8086 microprocessor are discussed below:
 Implied mode:: In implied addressing the operand is specified in the
instruction itself. In this mode the data is 8 bits or 16 bits long and data is
the part of instruction.Zero address instruction are designed with implied
addressing mode.

Example: CLC (used to reset Carry flag to 0)

 Immediate addressing mode (symbol #):In this mode data is present in
address field of instruction .Designed like one address instruction format.
Note:Limitation in the immediate mode is that the range of constants are
restricted by size of address field.

Example: MOV AL, 35H (move the data 35H into AL register)
 Register mode: In register addressing the operand is placed in one of 8
bit or 16 bit general purpose registers. The data is in the register that is
specified by the instruction.
Here one register reference is required to access the data.

 Example: MOV AX,CX (move the contents of CX register to AX

register)
 Register Indirect mode: In this addressing the operand’s offset is placed
in any one of the registers BX,BP,SI,DI as specified in the instruction. The
effective address of the data is in the base register or an index register
that is specified by the instruction.
Here two register reference is required to access the data.
 The 8086 CPUs let you access memory indirectly through a register using
the register indirect addressing modes.
 MOV AX, [BX](move the contents of memory location s
addressed by the register BX to the register AX)
 Auto Indexed (increment mode): Effective address of the operand is the
contents of a register specified in the instruction. After accessing the
operand, the contents of this register are automatically incremented to
point to the next consecutive memory location.(R1)+.
Here one register reference,one memory reference and one ALU
operation is required to access the data.
Example:
 Add R1, (R2)+ // OR
 R1 = R1 +M[R2]
R2 = R2 + d
Useful for stepping through arrays in a loop. R2 – start of array d – size of
an element
 Auto indexed ( decrement mode): Effective address of the operand is
the contents of a register specified in the instruction. Before accessing the
operand, the contents of this register are automatically decremented to
point to the previous consecutive memory location. –(R1)
Here one register reference,one memory reference and one ALU
operation is required to access the data.
Example:
Add R1,-(R2) //OR
R2 = R2-d
R1 = R1 + M[R2]
Auto decrement mode is same as auto increment mode. Both can also
be used to implement a stack as push and pop . Auto increment and Auto
decrement modes are useful for implementing “Last-In-First-Out” data
structures.
 Direct addressing/ Absolute addressing Mode (symbol [ ]): The
operand’s offset is given in the instruction as an 8 bit or 16 bit
displacement element. In this addressing mode the 16 bit effective
address of the data is the part of the instruction.
Here only one memory reference operation is required to access the data.
 Example:ADD AL,[0301] //add the contents of offset
address 0301 to AL
 Indirect addressing Mode (symbol @ or () ):In this mode address field
of instruction contains the address of effective address.Here two
references are required.
1st reference to get effective address.
2nd reference to access the data.
Based on the availability of Effective address, Indirect mode is of two
kind:
1. Register Indirect:In this mode effective address is in the register, and
corresponding register name will be maintained in the address field of
an instruction.
Here one register reference,one memory reference is required to
access the data.
2. Memory Indirect:In this mode effective address is in the memory, and
corresponding memory address will be maintained in the address field
of an instruction.
Here two memory reference is required to access the data.
Indexed addressing mode: The operand’s offset is the sum of the
content of an index register SI or DI and an 8 bit or 16 bit displacement.
Example:MOV AX, [SI +05]
Based Indexed Addressing: The operand’s offset is sum of the content
of a base register BX or BP and an index register SI or DI.
Example: ADD AX, [BX+SI]
Based on Transfer of control, addressing modes are:
PC relative addressing mode: PC relative addressing mode is
used to implement intra segment transfer of control, In this mode
effective address is obtained by adding displacement to PC.
EA= PC + Address field value
PC= PC + Relative value.
Base register addressing mode:Base register addressing
mode is used to implement inter segment transfer of control.In
this mode effective address is obtained by adding base register
value to address field value.
EA= Base register + Address field value.
PC= Base register + Relative value.

Fixed and floating point number representation

Digital Computers use Binary number system to represent all types of information
inside the computers. Alphanumeric characters are represented using binary bits
(i.e., 0 and 1). Digital representations are easier to design, storage is easy, accuracy
and precision are greater.
There are various types of number representation techniques for digital number
representation, for example: Binary number system, octal number system, decimal
number system, and hexadecimal number system etc. But Binary number system is
most relevant and popular for representing numbers in digital computer system.

Storing Real Number

These are structures as following below −

There are two major approaches to store real numbers (i.e., numbers with fractional
component) in modern computing. These are (i) Fixed Point Notation and (ii) Floating
Point Notation. In fixed point notation, there are a fixed number of digits after the
decimal point, whereas floating point number allows for a varying number of digits
after the decimal point.
Fixed-Point Representation −
This representation has fixed number of bits for integer part and for fractional part.
For example, if given fixed-point representation is IIII.FFFF, then you can store
minimum value is 0000.0001 and maximum value is 9999.9999. There are three
parts of a fixed-point number representation: the sign field, integer field, and
fractional field.

We can represent these numbers using:

  Signed representation: range from -(2(k-1)-1) to (2(k-1)-1), for k bits.
 1’s complement representation: range from -(2(k-1)-1) to (2(k-1)-1), for k bits.
 2’s complementation representation: range from -(2(k-1)) to (2(k-1)-1), for k bits.
2’s complementation representation is preferred in computer system because of
unambiguous property and easier for arithmetic operations.
Example −Assume number is using 32-bit format which reserve 1 bit for the sign, 15
bits for the integer part and 16 bits for the fractional part.
Then, -43.625 is represented as following:

Where, 0 is used to represent + and 1 is used to represent. 000000000101011 is 15

bit binary value for decimal 43 and 1010000000000000 is 16 bit binary value for
fractional 0.625.
The advantage of using a fixed-point representation is performance and
disadvantage is relatively limited range of values that they can represent. So, it is
usually inadequate for numerical analysis as it does not allow enough numbers and
accuracy. A number whose representation exceeds 32 bits would have to be stored
inexactly.

These are above smallest positive number and largest positive number which can be
store in 32-bit representation as given above format. Therefore, the smallest positive
number is 2-16 ≈ 0.000015 approximate and the largest positive number is (2 15-1)+(1-
2-16)=215(1-2-16) =32768, and gap between these numbers is 2-16.
We can move the radix point either left or right with the help of only integer field is 1.
Floating-Point Representation −
This representation does not reserve a specific number of bits for the integer part or
the fractional part. Instead it reserves a certain number of bits for the number (called
the mantissa or significand) and a certain number of bits to say where within that
number the decimal place sits (called the exponent).
The floating number representation of a number has two part: the first part
represents a signed fixed point number called mantissa. The second part of
designates the position of the decimal (or binary) point and is called the exponent.
The fixed point mantissa may be fraction or an integer. Floating -point is always
interpreted to represent a number in the following form: Mxre.
Only the mantissa m and the exponent e are physically represented in the register
(including their sign). A floating-point binary number is represented in a similar
manner except that is uses base 2 for the exponent. A floating-point number is said
to be normalized if the most significant digit of the mantissa is 1.

So, actual number is (-1)s(1+m)x2(e-Bias), where s is the sign bit, m is the mantissa, e is
the exponent value, and Bias is the bias number.
Note that signed integers and exponent are represented by either sign
representation, or one’s complement representation, or two’s complement
representation.
The floating point representation is more flexible. Any non-zero number can be
represented in the normalized form of ±(1.b1b2b3 ...)2x2n This is normalized form of a
number x.
Example −Suppose number is using 32-bit format: the 1 bit sign bit, 8 bits for signed
exponent, and 23 bits for the fractional part. The leading bit 1 is not stored (as it is
always 1 for a normalized number) and is referred to as a “hidden bit”.
Then −53.5 is normalized as -53.5=(-110101.1)2=(-1.101011)x25 , which is
represented as following below,

Where 00000101 is the 8-bit binary value of exponent value +5.

Note that 8-bit exponent field is used to store integer exponents -126 ≤ n ≤ 127.
The smallest normalized positive number that fits into 32 bits is
(1.00000000000000000000000)2x2-126=2-126≈1.18x10-38 , and largest normalized
positive number that fits into 32 bits is (1.11111111111111111111111) 2x2127=(224-
1)x2104 ≈ 3.40x1038 . These numbers are represented as following below,
The precision of a floating-point format is the number of positions reserved for binary
digits plus one (for the hidden bit). In the examples considered here the precision is
23+1=24.
The gap between 1 and the next normalized floating-point number is known as
machine epsilon. the gap is (1+2-23)-1=2-23for above example, but this is same as the
smallest positive floating-point number because of non-uniform spacing unlike in the
fixed-point scenario.
Note that non-terminating binary numbers can be represented in floating point
representation, e.g., 1/3 = (0.010101 ...)2 cannot be a floating-point number as its
binary representation is non-terminating.
IEEE Floating point Number Representation −
IEEE (Institute of Electrical and Electronics Engineers) has standardized Floating-
Point Representation as following diagram.

So, actual number is (-1)s(1+m)x2(e-Bias), where s is the sign bit, m is the mantissa, e is
the exponent value, and Bias is the bias number. The sign bit is 0 for positive
number and 1 for negative number. Exponents are represented by or two’s
complement representation.
According to IEEE 754 standard, the floating-point number is represented in
following ways:

 Half Precision (16 bit): 1 sign bit, 5 bit exponent, and 10 bit mantissa
 Single Precision (32 bit): 1 sign bit, 8 bit exponent, and 23 bit mantissa
 Double Precision (64 bit): 1 sign bit, 11 bit exponent, and 52 bit mantissa
 Quadruple Precision (128 bit): 1 sign bit, 15 bit exponent, and 112 bit
mantissa
Special Value Representation −
There are some special values depended upon different values of the exponent and
mantissa in the IEEE 754 standard.
 All the exponent bits 0 with all mantissa bits 0 represents 0. If sign bit is 0,
then +0, else -0.
 All the exponent bits 1 with all mantissa bits 0 represents infinity. If sign bit is
0, then +∞, else -∞.
 All the exponent bits 0 and mantissa bits non-zero represents denormalized
number.
 All the exponent bits 1 and mantissa bits non-zero represents error.