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ECE2002 - Computer Organization and Architecture - 2.0docx

The document outlines the course ECE2002: Computer Organization and Architecture, detailing its objectives, expected outcomes, and structure. Key topics include computer evolution, arithmetic logic units, I/O organization, CPU fundamentals, memory organization, and parallel processing. The course includes continuous assessments, practical evaluations, and is approved by the academic council.

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6 views3 pages

ECE2002 - Computer Organization and Architecture - 2.0docx

The document outlines the course ECE2002: Computer Organization and Architecture, detailing its objectives, expected outcomes, and structure. Key topics include computer evolution, arithmetic logic units, I/O organization, CPU fundamentals, memory organization, and parallel processing. The course includes continuous assessments, practical evaluations, and is approved by the academic council.

Uploaded by

tgowdabj
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Course Code: ECE2002 Course Title: Computer Organization TP 4 0 4

and Architecture C
Version No. 2.0
Course Pre-requisites/ ECE1003
Co-requisites
anti-requisites (if any). None
Objectives: 1. To understand the structure, function and characteristics of
computer systems along with number systems and
arithmetic
2. To understand the design of the various functional units
and components of computers with their significance
3. To identify the elements of modern instructions sets and
their impact on processor design
Expected Course Outcome: On completion of the course, students will have the ability to

1. Apply different formats of data representation and number


systems
2. Analyse various algorithms to perform any signed and
unsigned arithmetic operations
3. Build assembly language programs for specific
applications by understanding the fundamentals of
microprocessor
4. Design the control unit and identify the importance of
different types of control units
5. Outline the memory hierarchy, draw the importance of
cache memory and construct the different types of cache
mapping techniques
6. Describe the pipelined and parallel processors and their
significance

COs Mapping with POs and PEOs


Course Outcome Statement
PO's / PEO's
CO Apply different formats of data representation and number
1 systems. PO1, PO2, PO3
Assemble a simple computer with hardware design including
CO
data format, instruction format, instruction set, addressing
2
modes, and bus structure. PO1, PO2, PO3
CO Understand the hierarchy of Memory and cache memory
3 mapping techniques PO1, PO2, PO3, PO5
CO Design and analyse Arithmetic/Logic unit, control unit, data,
4 instruction and address flow. PO1, PO2, PO3, PO5
Design simple assembly language programs that make
CO5
appropriate use of a registers and memory. PO1, PO2, PO3
CO6 Understand parallel and super scalar processors PO1, PO2, PO3, PO5

Page 1 of 3
TOTAL HOURS OF
INSTRUCTIONS: 60

Module No. 1 Computer Evolution & Arithmetic 12 Hours


A Brief History of computers, Basic structures of Computers: Computer Architecture vs. Computer
Organization, Functional units, Operational concepts, RISC vs CISC, Performance assessment,
MIPS, Registers, Bus and Bus organization, Memory location and addresses, Fixed and
Floating-point numbers and operations, Signed numbers.
Module No. 2 ALU 10 Hours
Arithmetic: Integer Arithmetic, Addition and Subtraction of signed and unsigned numbers, Multiplication
of signed and unsigned numbers, 2’s Complement method for multiplication, Booths Algorithm,
Hardware Implementation, Array Multiplier, Integer Division, Restoring and Non-Restoring
algorithms, Floating point operations.
Module No. 3 I/O Organization 8 Hours
Microprocessors, Instruction format, Instruction set, Addressing modes. Assembly Language
Programming, Stack, Subroutine, Interrupt, Accessing I/O devices, Standard I/O Interfaces- RS-232C,
IEEE-488, Interfacing concepts.
Module No. 4 The Central Processing Unit 10 Hours

Basic Processing Units: Fundamental concepts, Instruction Sequencing, Execution cycle, Hardwired
control, Micro programmed control.

Module No. 5 Memory Organization 10 Hours


Memory System: Basic Concepts, Memory hierarchy, Main Memory, Secondary storage, Cache memory
mapping, cache coherence.
Module No. 6 Parallel Organization 10 Hours

Text Books.
1. William Stallings, Computer Organization and Architecture: Designing for Performance, Pearson
Education, Tenth Edition, 2016.
2. M. Morris Mano, Rajib Mall, Computer System Architecture, Pearson Education Third Edition,2017
References
1. Carl Hamacher, Zvonkovranesic, Safwat Zaky, Computer Organization, McGraw Hill, Fifth
Edition,2011.
Mode of Evaluation Continuous Assessment Tests and Final Assessment Test-60%,
Practical Assessment and practice tests-40%
Continuous Assessment Test-1 20%
Continuous Assessment Test-2 20%
Final Assessment Test 20%
Practical Assessment (Mini Project) 20%
Practice Tests 20%

Recommended by the Board of 03-05-2023


Studies on
Date of Approval by the Academic 10th Academic Council held on 01.06.2023
Council

Page 2 of 3
PO/PSO/PEO PEO
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 PEO2 PEO3
CO 1
CO1 3 2 1 1 2 2 1
CO2 2 3 1 2 1 1 3
CO3 2 2 1 2 2 2 1
CO4 2 2 2 1 2 1 2 1
CO5 2 2 1 2 1 2 1
CO6 2 2 2 2 2 2 1

Page 3 of 3

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