1. a. Top level structure of a multi-core b.

computer with a suitable diagram.

RISC CISC
It stands for Reduced It stands for Complex
Instruction Set Computer. Instruction Set Computer.
uses small instruction set of instructions of different
uniform length. sizes to the users.
Simple addressing formats The instructions interact
are supported. with memory using
complex addressing
modes.
These chips are relatively These chips are complex to
simple to design. design.
They are inexpensive. They are relatively
expensive.
Examples of RISC chips Examples of CISC include
include SPARC, POWER PC. Intel architecture, AMD.
It has less number of It has more number of
instructions. instructions.
It has fixed-length It has variable-length
encodings for instructions. encodings of instructions.
c.

2. a. The problem associated in increasing the clock speed logic density of a microprocessor.
i. RC DELAY
ii. POWER DISSIPATION
iii. MEMORY LATENCY & THROUGHPUT
iv.
 b. Ans:
𝟏
Overall speedup = 𝒇
(𝟏−𝒇)+
𝑺𝑼𝒇

F = 40% = 0.4
SUf =10
Overall speedup = 1/(1-0.4)+0.4/10 =1.5625
c.
Normalized w.r.t. X
Benchmark Processor
Machine X Machine Y Machine Z
time time time
1 40 (1) 20 (0.5) 80 (2)
2 40 (1) 80 (2) 20 (0.5)
Total time 80 100 100
AM 1 1.25 1.25
GM 1 1 1

3. a. Priorities approach to handle multiple interrupts:

It allow an interrupt of higher priority to cause a lower-priority interrupt handler to be itself interrupted.
Nested Interrupt : Interrupt that has happen during execution of ISR when higher priorities interrupt has
been processed, processor returns to previous interrupt.
Ex: a printer, a disk, and a communications line, with increasing priorities of 2, 4, and 5 respectively.

b. Eight control signals in the control bus:

■ Memory write: causes data on the bus to be written into the addressed location.
■ Memory read: causes data from the addressed location to be placed on the bus.
■ I/O write: causes data on the bus to be output to the addressed I/O port.
■ I/O read: causes data from the addressed I/O port to be placed on the bus.
■ Transfer ACK: indicates that data have been accepted from or placed on the bus.
■ Bus request: indicates that a module needs to gain control of the bus.
■ Bus grant: indicates that a requesting module has been granted control of the bus.
■ Interrupt request: indicates that an interrupt is pending.
■ Interrupt ACK: acknowledges that the pending interrupt has been recognized.
■ Clock: is used to synchronize operations.
■ Reset: initializes all modules.

c. A CPU has 24-bit instructions. The program starts at an address 300H.

1st instruction- 300H
2nd instruction- 303H
3rd instruction- 306H
4th instruction – 309H
4. a. 3 parameters of performance characteristics in a memory:
i. Access time (latency)
ii. Memory cycle time
iii. Transfer rate
iv.
b. cache size = 2 KB
cache block size = 2w = 64 bytes
= 26 bytes
Number of lines in cache =m = 2r =cache size/cache block size = 2KB/26 =25
Word offset = w= 6 bits
Physical address = s+w = 32 bits
Tag field = 22 bits

For set associative mapping function

No of bits used to identify set =d = (s+w) – tag- w

= 32-22-6
=4
No of sets = v =2d = 24 = 16

No of line in cache = no of set x no of lines in each set

 25 = 24 x k

 K = 25 / 24 = 2 Ans.
c.

5. a. DRAM: The presence or absence of charge in a capacitor is interpreted as a binary 1 or 0. Essentially

an analog device. Cells are smaller and simpler. More dense. Less expensive. Used for main
memory.
SRAM: Traditional flipflop logic gates are used to store binary 1 or 0. Basically, digital devices. Cells are not
simpler. Less Dense. More expensive. Used for cache memory (both on and off-chip).

b. codeword length =12-bits

code 12 11 10 9 8 7 6 5 4 3 2 1
checkbits C8 C4 C2 C1
Data bits d8 d7 d6 d5 d4 d3 d2 d1
1 1 0 X y 0 1 0 0 1 1 0

C1 = 3 ⊕ 5 ⊕ 7 ⊕ 9 ⊕ 11 C8 = 9 ⊕ 10 ⊕ 11 ⊕ 12
 0 = 1 ⊕ 0 ⊕ 0 ⊕ X ⊕1 Y = 0 ⊕ 0⊕ 1 ⊕ 1
 X=0 Y= 0
c. No of disks available =N=8
Capacity of each disk =600GB
For RAID level 0, all the disks are used to store data.
So no of data disk=N= 8
Data storage capacity = no of data disks * capacity of each disk
=8*600GB = 4800GB
For RAID level 1, no of data disk=N/2= 4
Data storage capacity = no of data disks * capacity of each disk
=4*600GB = 2400GB
For RAID level 3, no of data disk=N-1= 7
Data storage capacity = no of data disks * capacity of each disk
=7*600GB = 4200GB
For RAID level 4, no of data disk=N-1= 7
Data storage capacity = no of data disks * capacity of each disk
= 7*600GB = 4200GB
For RAID level 5, no of data disk=N-1= 7
Data storage capacity = no of data disks * capacity of each disk
=7*600GB = 4200GB
For RAID level 6, no of data disk=N-2= 6
Data storage capacity = no of data disks * capacity of each disk
=6*600GB = 3600GB
6. a. Block diagram of an external device
 b.

Control word is 99H

c.
7. a. Interactive System: refer theory
Batched system: refer theory
Multiprogramming: refer theory
Uniprogramming: Refer Theory

b. i. 333D = (101001101)2 = (14D)16

ii. 11110001.1011 = (241. 6875)10

c. 00,10,01,00………

8 a. Y= ABC ⊕ AC⊕BC
b.

Step A Multiplier (Q) Q-1 Multiplicand Count

Initialization 0000 1011 0 0011 4

1a 1101 1011 0 0011
2 1110 1101 1 0011 3
2 1111 0110 1 0011 2
1b 0010 0110 1 0011
2 0001 0011 0 0011 1
1a 1110 0011 0 0011
2 1111 0001 1 0011 0
Product Result = - 15

c. IEEE 32-bit representation of decimal value -14.25 = (C1640000)16

9. a. The effective address of MOV [BX+32H], DX : 10H * 3000H + 32H+ 300H =30332H

The effective address of MOV CX, [BP+DI] = 10H * 3000H + 400H + 300H =30700H

b. all the statements are erroneous.

c. MOV AL, 00H

MOV CL,0BH
MOV DL,01H
MOV BL,00H
BCK: ADD AL,DL
JNC FWD
INC BL
FWD: INC DL
CMP DL,CL
JC BCK
10. a. ◼ Condition code flags
◼ N = Negative result from ALU
◼ Z = Zero result from ALU
◼ C = ALU operation Carried out
◼ V = ALU operation oVerflowed

b. Addressing modes of ARM processor:

Load/Store Addressing
Data Processing Addressing
Load/Store Multiple
Branch Addressing
c. LDR R0,=COUNT
LDR R1,[R0]
LDR R2,=ARRAY
LDR R3,[R2],#4
BCK: SUBS R1,R1,#1
BEQ FWD
LDR R4,[R2],#4
CMP R3,R4
BGT BCK
MOV R3,R4
B BCK
FWD: LDR R5,=SMALLEST
STR R3,[R5]
EXT: B EXT

.DATA
COUNT: .WORD 0X05
ARRAY: .WORD 0X35,0XFF,0X20,0X45,0X10
LARGEST: .WORD 0X0