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SEP600 Module 6

The document outlines a course on embedded systems, specifically focusing on communication protocols such as Serial, SPI, I2C, and CAN. It reviews key concepts including Real-Time Operating Systems (RTOS), multi-threading, and inter-process communications. Additionally, it details the characteristics and functionalities of each communication protocol, highlighting their advantages and disadvantages.
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0% found this document useful (0 votes)
4 views26 pages

SEP600 Module 6

The document outlines a course on embedded systems, specifically focusing on communication protocols such as Serial, SPI, I2C, and CAN. It reviews key concepts including Real-Time Operating Systems (RTOS), multi-threading, and inter-process communications. Additionally, it details the characteristics and functionalities of each communication protocol, highlighting their advantages and disadvantages.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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SEP600

Embedded System

Module 6: Serial, SPI, I2C, CAN


Course Outline

Module 1: Introduction and Review


Module 2: Transistor and Op-Amp
Module 3: Digital I/O and Analog Output
Module 4: Analog Input, Resolution, and Sampling
Module 5: RTOS and Multithreading
Module 6: Serial, SPI, I2C, CAN

2
Review: RTOS, Multi-threading


Threads are independent sequences
of execution within a program that
enable concurrent execution of
multiple tasks within a single process
– concurrent execution
– better utilization
– modularization of complex tasks

Real-Time Operating System (RTOS)
– must respond to external stimuli within
a predetermined time-frame

3
Review: Inter-process Communications


Mutex: protect critical sections of code
and shared resources (ie. I/O)

Semaphore: controlling access to finite
resources and synchronizing the execution
of multiple threads

Queue: asynchronous message passing
and inter-thread communication

Mail: same usage as queue but for larger
amount of data
4
Serial vs Parallel Communication

Serial: Parallel

1 bit per clock cycle ●
multiple bits per clock cycle

require one data line ●
require multiple data line

5
Asynchronous Serial Interface


External clock signal is absent

Rely on several parameters such as Data
Flow Control, Error Control, Baud Rate
Control, Transmission Control and Reception
Control

On the transmitter side, parallel data is
converted onto the serial line using its own
clock along with adding the start, stop and
parity check bits

On the receiver side, serial data is extracted Examples: RS-232, RS-422
using its own clock and converted back to and RS-485 (and USB)
parallel form after stripping off the start,
stop, and parity bits
6
Asynchronous Serial Interface

7
Asynchronous Serial Interface

8
Universal Asynchronous Receiver/Transmitter (UART)


Hardware that translates between
parallel and serial format

Commonly used in conjunction
with communication standards
such as EIA, RS-232, RS-422 or
RS-485

Data format and transmission
speeds are configurable

Actual electric signalling levels
and methods (such as differential
signalling etc.) typically are
handled by a special driver circuit
external to the UART
9
UART Signals (only most common pins)


RXD is the signal line receiving the data. This will be an
input and is usually connected to the TXD line of the
downstream device.

TXD is the signal transmitting the data. This will be an
output and is usually connected to the RXD line of the
downstream device.

RTS# (Ready to Send) is used to indicate to the
downstream device that the device is ready to receive data.
This will be an output and is usually connected to the CTS#
line of the downstream device.

CTS# (Clear to Send) is used by the downstream device to
identify that it is OK to transmit data to the upsteam device.
This will be an input and is usually connected to the RTS#
line of the upstream device.
10
UARTs Hardware and Software (Soft Serial)

11
Synchronous Serial Interface


Point-to-point connection from a master to slave

All the devices in the same network share the
same buses for data and clock
– no mismatch in baud rate

On the transmitter side, a shift in the data
and/or clock line signal a start of transmission
– no start, stop and parity bits are added to the data

On the receiver side, the data is being extract
using the clock provided by the transmitter and
converts the serial data back to the parallel form

well-known examples are: I2C and SPI

12
Synchronous Serial Interface


at each clock cycle, one bit from the
master (controller) shift register and
transmitter to the slave (peripheral)
and one bit from the (peripheral) is
transmitted back in return

Source: Toulson Fig 7.2

13
Serial Peripheral Interface (SPI)


A synchronous serial bus protocol

Fast, Easy to use, Simple

(Almost) everyone supports it

14
Serial Peripheral Interface (SPI)

Basics Info Capabilities



A communication protocol ●
Always Full Duplex
using 4 wires – Communicating in two directions at
– Also known as a 4-wire bus the same time
– Transmission need not be

Used to communicate meaningful (if only one direction is
across small distances required)

Multiple Slaves (peripheral), ●
Multiple Mbps transmission speed
Single Master (controller) ●
Transfers data in 4 to 16 bits
characters

Synchronized using a
common clock signal ●
Daisy-chaining possible

15
Serial Peripheral Interface (SPI)


MOSI – Master Output Slave Input,
carries data out of Master to Slave
– PICO (Peripheral Input Controller
Output)

MISO – Master Input Slave Output,
carries data from Slave to Master
– POCI (Peripheral Output Controller
Input)
Source: Toulson Fig 7.3

SS_BAR – Unique line to select a
slave (peripheral)

SCLK – Master (controller) produced
clock to synchronize data transfer

16
SPI – Pros and Cons

Pros Cons

Fast and easy ●
SS makes multiple slaves
– Fast for point-to-point very complicated
connections (in the MHz
range)
– every slave need a slaves
select; a lot of wires
– Easily allows
streaming/Constant data ●
No acknowledgement
inflow ability
– No addressing/Simple to
implement

No inherent arbitration

Everyone supports it ●
No flow control
17
FRDM-K64K SPI


SCK – PTD1

MISO – PTD3

MOSI – PTD2

SS_Bar – Any I/O
– the micro-controller usually
act as the master

18
Inter-Integrated Circuit (I2C)


A synchronous
communication protocol
using 2 wires
– Also known as a 2-wire bus

Multiple Master and Slaves

Require Addressing

Half Duplex: only one device
can send Source: Toulson Fig 7.7


Synchronized
19
I2C – Transmission Signal


Every transmission requires:
– Start condition (A)
– Timing (Clock) supplied by the
sender (B)
– Data and Clock signal read by
the receiver [Ack] (C)

SDA – Serial data, carries data
from sender to receiver

SCL – Serial clock, produced
by the sender to synchronize Source: Wilmshurst Fig 7.8
data transfer
20
FRDM-K64K I2C


SCL – PTE24

SDA - PTE25

21
Controller Area Network (CAN bus)

Before CAN With CAN



solution was connecting the control
systems via a serial bus system

22
CAN bus data frame


Use difference voltage as 0s and 1s for data for longer distance
communication

Easy access but not secure – could be a security risk (big problem)

Extremely robust and efficient

Source: Wikipedia: CAN bus


23
CAN (SAE J1939) Example: Caterpillar 797

Source: Caterpillar

24
Summary: Serial, SPI, I2C, CAN


Async. Serial: no need for clock

SPI: 4-wires, fast, need SS for
each device

I2C: 2-wires, half-duplex, shared
data and clock

CAN: protocol developed for the
auto-industry for communication
between controller

25
Course Outline

Module 1: Introduction and Review


Module 2: Transistor and Op-Amp
Module 3: Digital I/O and Analog Output
Module 4: Analog Input, Resolution, and Sampling
Module 5: RTOS and Multithreading
Module 6: Serial, SPI, I2C, CAN

26

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