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Instruction Set Topic Notes Unit - 2

The document provides an overview of the instruction set of the 8085 microprocessor, detailing the structure of instructions, which consist of opcodes and operands. It classifies instructions based on word size (1-byte, 2-byte, 3-byte) and addressing modes (direct, register, immediate, etc.), as well as operation modes (data transfer, arithmetic, logical, etc.). Additionally, it explains subroutines and the use of call and return instructions for modular programming.

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0% found this document useful (0 votes)
2 views13 pages

Instruction Set Topic Notes Unit - 2

The document provides an overview of the instruction set of the 8085 microprocessor, detailing the structure of instructions, which consist of opcodes and operands. It classifies instructions based on word size (1-byte, 2-byte, 3-byte) and addressing modes (direct, register, immediate, etc.), as well as operation modes (data transfer, arithmetic, logical, etc.). Additionally, it explains subroutines and the use of call and return instructions for modular programming.

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gayathri.d.cs
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UNIT- 2

Instruction Set of 8085 Microprocessor


An instruction is a binary pattern designed inside a microprocessor to perform a specified
function. In other words, we can say An instruction is a command given task on specified
data.
Each instruction has two parts:
1. One is the task to be performed, called the “operation code” (OPCODE).
2. Second is the data to be operated on called the “OPERAND”.
The operand ( or data) may include 8-bit or 16-bit data, on the internal register, a memory
location, or an 8-bit or 16-bit address.
The instruction set is a collection of Instructions of the Microprocessor, that determines what
functions the microprocessor can perform.
In data transfer, the contents of the source are not destroyed; only the contents of the
destination are changed.
An I/O device can transfer or receive data from the accumulator but not from other registers
(except for the memory-mapped I/O device).
Arithmetic and logical operations are performed with the contents of the accumulator, and the
results are stored in the accumulator.
Any register including memory can be used for increment and decrement.
A program sequence can be changed either conditionally or by testing for given data
conditions.
In some instructions, data is implied. Most instructions of this type operate on the content of
the accumulator.
Classification of Instruction Set of 8085
Types of Instruction set of 8085 based on Length of Word size
1-byte or One-word Instruction set of 8085
 A one-byte instruction includes the opcode and the operand in the same byte.
 Examples of this type are:
 MOV A, B
 ADD B
 RAL
 CMA, etc.
For 1-byte Instruction:

Task Opcode Operand

Copy the contents of the accumulator in Register C MOV C, A

Add the contents of the register B to the contents of the accumulator ADD B

Invert (Complement) each bit in the accumulator CMA

 The above instructions are 1-byte instructions performing three different tasks.
 In the first instruction, both operand registers are specified.
 In the second instruction, operand B is specified and the accumulator is assumed.
 Similarly, in the third instruction, the accumulator is assumed to be the implicit
operand.
 These instructions are stored in an 8-bit binary format in memory; each requires one
memory location.
The 2-byte or 2-word Instruction set of 8085
 In a 2-byte instruction, the 1st-byte specifies the opcode and the 2nd-byte specifies the
operand.
 MVI B, 05
 IN 01 etc.
 For 2-byte Instruction:
Task Opcode Operand Task

Load an 8-bit data byte in the accumulator MVI A, Data 1st byte, data 2nd byte

 Assume the data byte is 32H. The assembly language instruction is written as:
 Mnemonics: MVI A, 32H
 This instruction would require two memory locations to store n memory.
The 3-byte or 3-word Instruction set of 8085
 In a 3-byte instruction, the 1st byte specifies the opcode and the following two bytes
specify the 16-bit address such that the 2nd byte is a low-order address and the 3rd
byte is a high-order address.
 LXI H, 2400H
 LDA 2500H
 JMP 2085H etc.

Task Opcode Operand Hex Code

Transfer the program sequence to the memory C3 is 1st byte, 85 2nd byte, and
JMP 2085 H
location 2085H 20 3rd byte.

For 3-byte Instruction:


 This instruction would require three memory locations to store in the memory.

Types of Instruction set of 8085 based on Addressing Modes:


1. Direct Addressing Mode Instruction set of 8085
 In this instruction set, the direct address contains the address of the operand within the
instruction itself.
 LDA 2600 H
 IN 05
 OUT 07
 STA 2700 H
2. Register Addressing Mode Instruction set of 8085
 In this type of instruction set, operands will be present in the micro-process registers.
 MOV A, B
 ADD B
 SUB C
3. Register Indirect Addressing Mode Instruction set of 8085
 In this type of instruction, the operands will present in memory (M) and the address of
memory is present register pair.
 It is also called “indirect addressing mode type instruction set”.
 MOV A, M
 ADD M
 LDAX B
4. Immediate Addressing Mode Instruction set of 8085
 In this type, the operand and data are specified within the instruction itself.
 In other words, we can say, this type of instruction has an operand field rather than an
address field.
 MVI A, 25
 ADI 36
5. Implicit Addressing Mode Instruction set of 8085
 If operations of the microprocessor are performed by the accumulator alone or
machine control instructions, then it contains an implied addressing type.
 e.g. CMA, RAL, DAA

Types of Instruction set of 8085 based


on Operation Modes
1. Data Transfer Instruction set of 8085
In this group, the data in transfer,
 From register to register
 Between memory and register
 Between I/O and accumulator
 Load an 8-bit number in a register
 Load a 16-bit number in a register pair
 No flags are affected
2. Arithmetic Group Instruction set of 8085
In this group, the data is performed as addition, subtraction, increment (add 1), decrement
(subtract 1), etc.
The arithmetic operations implicitly assume that the content of the accumulator is one of
the operands.
The results of the arithmetic operations are stored in the accumulator, thus the previous
content of the accumulator is altered.
The flags are modified to reflect the data conditions of an operation.
The content of a register is not changed as a result of an arithmetic operation.
In the add operation, if the sum is larger than 8-bit, CY is set.
The subtraction operation is performed by using 2’s complement method and CY is
complemented after subtraction.
If a subtraction results in a negative number, the answer is in 2’s complement and CY is
set.
In unsigned arithmetic operations, the sign flag(S) should be ignored.
The instructions INR (Increment) and DCR (Decrement) are special cases of arithmetic
operations.

3. Logical Group Instruction set of 8085


The instruction set of this group performs AND, OR, EXOR operations, compare, rotate
or take the complement of data in register or memory.
The process of performing logic operations through the software instructions is slightly
different from the hardwired logic.
Logic operations are performed in relation to the content of the accumulator.
Logic operations simulate eight 2-input gates ( or inverters).
The sign, zero (and parity) flags are modified to reflect the status of operations. The
carry flag is reset. However, the NOT operation does not affect any flags.
After a logic operation has been performed, the answers are placed in the accumulator
replacing the original content of the accumulator.
The logic operations cannot be performed directly with the content of two registers.
The individual bits in the accumulator can be set or reset using logic instructions.
4. Branch Group Instruction set of 8085
The Branch Instructions are the most powerful instructions because they allow the
microprocessor to change the sequence of a program, either unconditionally or under
certain test conditions.
These instructions are the key to the flexibility and versatility of a computer.
These are classified into 3 categories:
1. JUMP instructions
2. CALL and RETURN instructions
3. RESTART instructions.
⇒JMP Instruction:
Unconditional JMP Instructions:
 This instruction enables the programmer to set up a continuous loop.
 When this instruction is executed then PC content will become a specified address
and the next instruction execution will start from the given address memory location.
 3-byte instruction
 Immediate addressing mode
 3 MC
 10 T-states
Conditional JMP Instructions:

 This instruction allows the microprocessor to make decisions based on certain


conditions indicated by the flags.
 The conditional jump instruction checks the flag conditions and makes decisions to
change or not to change the sequence of a program.
 Out of five flags, 4 (CY, Z, S, and P) flags are used by conditional JMP, but the AC
flag is not used.
⇒CALL Instruction:
 It is used in the main program to call a subroutine.
 When a subroutine is called, the contents of the PC, which is the address of the
instruction following the CALL instruction, are stored on the stack and the program
execution is transferred to the subroutine address.
Unconditional CALL Instructions:
 When it is executed, the microprocessor will store the address of the next instruction
in STACK, and the PC is located with a subroutine address.
 3-byte instruction
 Immediate/Register indirect mode
 5 MC
 18 T-States
 No flags are affected
Conditional CALL Instructions:
 In this case, the program is transferred to the subroutine if the condition is met and
this time it requires 5 MC and 18 T-States.
 If the condition is not met then the main program is continued and it requires 2 MC
and 9 T-states.
 In this instruction, all flags are used except the AC flag.

⇒RETURN Instruction:
 It is used at the end of the subroutine to return to the main program.
 When the RET instruction is executed at the end of the subroutine, the memory
address stored on the stack is retrieved, and the sequence of execution is resumed in
the main program.
Unconditional RET Instructions:
 It will change the program sequence from the subroutine to the main program.
 1-byte instruction
 Implicit addressing mode
 3 MC
 10 T-states
 No flags are affected.
Conditional RET Instructions:
 In this case, the sequence of the program returns to the main program if the condition
is met and at this time it requires 3 MC and 12 T-States.
 If the condition is not met then the sequence of the program is continued in the
subroutine and it requires 1-MC and 6 T-states.
 In this instruction, all flags are used except the AC flag.
5. Stack, I/O, and Machine Control Group Instruction set of 8085
The stack in an 8085 microprocessor is a group of memory locations in the R/W memory
that is used for the temporary storage of binary information during the execution of the
program.
PUSH, POP, SPHL, and XHTL are examples of instructions for stack groups.
IN, and OUT are examples of I/O groups.
NOP, EI, D, SIM, RIM, and HLT are examples of machine control groups.
ADDRESSING MODES
Every instruction of a program has to operate on a data. The method of specifying the
data to be operated by the instruction is called Addressing. The 8085 supports the
following five
TYPES OF ADDRESSING MODES
There are 5 types of addressing modes -
➢Immediate Addressing Mode (IAM)
➢Direct Addressing Mode (DAM)
➢ Register Direct Addressing Mode (RDAM)
➢ Register Indirect Addressing Mode (RIAM)
➢ Implicit Addressing Mode (IPAM)
Immediate Addressing Mode
If 8/16 bit data required for executing the instruction is
directly given along with instruction then such type of
instructions are called Immediate Addressing Mode
instructions. In most of the Immediate Addressing Mode
Instruction, the last alphabet is ‘I’.
For Example:
MVI A,75H (for 8- bit number)
LXI B,4565H (for 16- bit number)
Direct Addressing Mode
If 8/16 bit data required for executing the instruction is present
in memory location and the address of that memory location is
given along with instruction then such type of instructions are
called Direct Addressing Mode instruction.
For Example:
LDA 1575H
Load accumulator from the given address data
STA 4565H
Store accumulator at given address
Register Direct Addressing Mode
If 8/16 bit data required for executing the instruction present in register(for
8-bit)/ register pair(for 16-bit) and the name of the register / register pair is
given along with instruction then such type of instructions are called
Register Direct Addressing Mode instruction.
➢ For Example –
MOV C, D
Move data from register D to Register C
Register Indirect Addressing Mode
➢If 8/16 bit data required for executing the instruction present in
memory location and the address of that memory location is
present in register pair and the name of that register pair is given
along with instruction then such type of instructions are called
Register Indirect Addressing mode instruction .
➢For Example :
LDAX B
Load accumulator from the register pair address data.
STAX D
Store accumulator at given register address
Implicit Addressing Mode
➢ If the address of source of data as well as the destination of result is
fixed, then there is no need to give the operand in the instruction
and such type of instructions are known as Implicit Addressing
Mode instruction.
➢For Example:
CMA complement accumulator
CMC complement Carry Flag
STC Set Carry Flag
RAL Rotate Accumulator Left with Carry
RLC Rotate Accumulator Left without Carry
Subroutine in 8085
 A subroutine is a sequence of program instructions that perform a specific task,
packaged as a unit.
 This unit can then be used in programs wherever that particular task have to be
performed.
 A subroutine is often coded so that it can be started (called) several times and from
several places during one execution of the program, including from other subroutines,
and then branch back (return) to the next instruction after the call, once the
subroutine's task is done.
 It is implemented by using Call and Return instructions.
 The different types of subroutine instructions are
1.Unconditional Call instruction - CALL address is the format for unconditional call
instruction. After execution of this instruction program control is transferred to a sub-
routine whose starting address is specified in the instruction. Value of PC (Program
Counter) is transferred to the memory stack and value of SP (Stack Pointer) is
decremented by 2
2. Conditional Call instruction - In these instructions program control is transferred to
subroutine and value of PC is pushed into stack only if condition is satisfied.

INSTRUCTION PARAMETER COMMENT

CC 16-bit address Call at address if cy (carry flag) = 1

CNC 16-bit address Call at address if cy (carry flag) = 0

CZ 16-bit address Call at address if ZF (zero flag) = 1

CNZ 16-bit address Call at address if ZF (zero flag) = 0

CPE 16-bit address Call at address if PF (parity flag) = 1

CPO 16-bit address Call at address if PF (parity flag) = 0

CN 16-bit address Call at address if SF (signed flag) = 1

CP 16-bit address Call at address if SF (signed flag) = 0


Unconditional Return instruction –
RET is the instruction used to mark the end of sub-routine. It has no parameter. After
execution of this instruction program control is transferred back to main program from where
it had stopped.
Value of PC (Program Counter) is retrieved from the memory stack and value of SP (Stack
Pointer) is incremented by 2.
Conditional Return instruction - By these instructions program control is transferred back
to main program and value of PC is popped from stack only if condition is satisfied. There is
no parameter for return instruction.

INSTRUCTION COMMENT

RC Return from subroutine if cy (carry flag) = 1

RNC Return from subroutine if cy (carry flag) = 0

RZ Return from subroutine if ZF (zero flag) = 1

RNZ Return from subroutine if ZF (zero flag) = 0

RPE Return from subroutine if PF (parity flag) = 1

RPO Return from subroutine if PF (parity flag) = 0

RN Return from subroutine if SF (signed flag) = 1

RP Return from subroutine if SF (signed flag) = 0

Advantages of Subroutine -
1. Decomposing a complex programming task into simpler steps.
2. Reducing duplicate code within a program.
3. Enabling reuse of code across multiple programs.
4. Improving tractability or makes debugging of a program easy.

Stack in 8085 Microprocessor


 The stack is a special area in memory used by the CPU to store register information or
general data information during program execution. The stack has a top and a bottom.
 A stack is a region of memory that is used to store data temporarily. In the 8085
microprocessor, the stack is implemented using a dedicated block of memory known
as the stack pointer (SP).
 The stack pointer (SP) register in 8085 contains the 16-bit offset from the start of the
segment to the memory location where a word was most recently stored on the stack.
The memory location where a word was most recently stored is called the top of
stack.
 The stack pointer points to the current top of the stack, which is the location where the
next item will be stored.
 The stack used is a Last in first out (LIFO) structure that uses push and pull (pop)
operations.
 When data is pushed onto the stack, the stack pointer is decremented by one to point
to the next available memory location. When data is popped from the stack, the stack
pointer is incremented by one to point to the next item on the stack

The 8085 microprocessor provides a set of instructions that can be used to manipulate the
stack. These instructions include:
1. PUSH: This instruction is used to push a register or memory location onto the stack.
The contents of the register or memory location are first copied to the memory
location pointed to by the stack pointer, and then the stack pointer is decremented.
2. POP: This instruction is used to pop the topmost item from the stack. The contents of
the memory location pointed to by the stack pointer are first copied to the register or
memory location specified in the instruction, and then the stack pointer is
incremented.

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