Types of Addressing Modes in Computer Architecture
Types of Addressing Modes in Computer Architecture
Implied mode
In implied addressing the operand is specified in the instruction itself. In this mode the data is 8 bits
or 16 bits long and data is the part of instruction. Zero address instruction are designed with implied
addressing mode.
Example: CLC
(used to reset Carry flag to 0)
In this mode data is present in address field of instruction. Designed like one address instruction
format. Note: Limitation in the immediate mode is that the range of constants are restricted by size
of address field.
Register mode
In register addressing the operand is placed in one of 8 bit or 16 bit general purpose registers. The
data is in the register that is specified by the instruction. Here one register reference is required to
In this addressing the operand’s offset is placed in any one of the registers BX,BP,SI,DI as specified in
the instruction. The effective address of the data is in the base register or an index register that is
specified by the instruction. Here two register reference is required to access the data.
The
8086 CPUs let you access memory indirectly through a register using the register indirect addressing
modes.
Effective address of the operand is the contents of a register specified in the instruction. After
accessing the operand, the contents of this register are automatically incremented to point to the
next consecutive memory location.(R1)+. Here one register reference, one memory reference and
one ALU operation is required to access the data. Example:
Useful for stepping through arrays in a loop. R2 - start of array d - size of an element
Effective address of the operand is the contents of a register specified in the instruction. Before
accessing the operand, the contents of this register are automatically decremented to point to the
previous consecutive memory location. -(R1)Here one register reference, one memory reference and
one ALU operation is required to access the data. Example:
Auto decrement mode is same as auto increment mode. Both can also be used to implement a stack
as push and pop . Auto increment and Auto decrement modes are useful for implementing “Last-In-
First-Out” data structures.
The operand’s offset is given in the instruction as an 8 bit or 16 bit displacement element. In this
addressing mode the 16 bit effective address of the data is the part of the instruction. Here only one
memory reference operation is required to access the data.
Register Indirect: In this mode effective address is in the register, and corresponding register
name will be maintained in the address field of an instruction. Here one register reference,
one memory reference is required to access the data.
Memory Indirect: In this mode effective address is in the memory, and corresponding
memory address will be maintained in the address field of an instruction. Here two memory
reference is required to access the data.
The operand’s offset is the sum of the content of an index register SI or DI and an 8 bit or 16 bit
displacement.
The operand’s offset is sum of the content of a base register BX and an index register SI or DI.
PC relative addressing mode is used to implement intra segment transfer of control, In this mode
effective address is obtained by adding displacement to PC.
Base register addressing mode is used to implement inter segment transfer of control. In this mode
effective address is obtained by adding base register value to address field value.