IEEE TRANSACTIONS ON COMPUTERS, VOL. C-35, NO.

8, AUGUST 1986 677

Graph-Based Algorithms for Boolean Function

Manipulation
RANDAL E. BRYANT, MEMBER, IEEE

Abstract-In this paper we present a lnew data structure for A variety of methods have been developed for representing
representing Boolean functions and an associated set of manipu- and manipulating Boolean functions. Those based on classical
lation algorithms. Functions are represented by directed, acyclic representations such as truth tables, Karnaugh maps, or
graphs in a manner similar to the repre$enJation:s introduced by
Lee [11 and Akers 121, but with further restrictions on the canonical sum-of-products form [4] are quite impractical-
ordering of decision variables in the graph. Although a function every function of n arguments has a represdnitation of size 2"
requires, in the worst case, a graph of size exponential in the or more. More practical approaches utilize representations that,
number of arguments, many of the functions encountered in at least for many functions, are not of exponential size.
typical applications have a more reasonable representation. Our Example representations include as a reduced sum of products
algorithms have time complexity proportional to the sizes of the
graphs being operated on, and hence are quite efficient as long as [4] (or equivalently as sets of prime cubes [5]) and factored
the graphs do not grow too large. We present experimental results into unate functions [6]. These representations suffer from
from applying these algorithms to problems in logic design several drawbacks. First, certain common functions still
verification that demonstrate the practicality of our approach. require representations of exponential size. For example, the
even and odd parity functions serve as worst case examples in
Index Terms-Boolean functions, binary decision diagrams,
logic design verification, symbolic manipulation. all of these representations. Second, while a certain function
may have a reasonable representation, performing a simple
operation such as complementation could yield a function with
I. INTRODUCTION an exponential representation. Finally, none of these represen-
D OGLEAN Algebra forms a cornerstone of computer tations are canonicalforms, i.e., a given function may have
science and digital system design. Many problems in many different representations. Consequently, testing for
digital logic design and testing, artificial intelligence, and equivalence or satisfiability can be quite difficult.
combinatorics can be expressed as a sequence of operations on Due to these characteristics, most programs that process a
Boolean functions. Such applications would benefit from sequence of operations on Boolean functions have rather
efficient algorithms for representing and manipulating Bool- erratic behavior. They proceed at a reasonable pace, but then
ean functions symbolically. Unfortunately, many of the tasks suddenly "blow up," either running out of storage or failing
one would like to perform with Boolean functions, such as to complete an operation in a reasonable amount of time.
testing whether there exists any assignment of input variables In this paper we present a new class of algorithms for
such that a given Boolean expression evaluates to 1 (satisfiabil- manipulating Boolean functions represented as directed acy-
ity), or two Boolean expressions denote the same function clic graphs. Our representation resembles the binary decision
(equivalence) require solutions to NP-complete or co NP- diagram notation introduced by Lee [1] and further popular-
complete problems [3]. Consequently, all known approaches ized by Akers [2]. However, we place further restrictions on
to performing these operations require, in the worst case, an the ordering of decision variables in the, vertices. These
amount of computer time that grows exponentially with the restrictions enable the development of algofithms for manipu-
size of the problem. This makes it difficult to compare the lating the represehitations in a more efficieni manner.
relative efficiencies of different approaches to representing Our representation has several advantages over previous
and manipulating Boolean functions. In the worst case, all approaches to Boolean function manipulation. First, most
known approaches perform as poorly as the naive approach of commonly encountered functions have a reasonable represen-
representing functions by their truth tables and defining all of tation. Por example, all symmetric functions (including even
the desired operations in terms of their effect on truth table and odd parity) are represented by graphs where the number of
entries. In practice, by utilizing more clever representations vertices grows at most as the square of the number of
and manipulation algorithms, we can often avoid these arguments. Second, the performance of a program based on
exponential computations. our algorithms when processing a sequence of operations
degrades slowly, if at all. That is, the time complexity of any
Manuscript received Ndvember 28, 1984; revised June 11, 1985. This work single operation
is bounded by the product of the graph, sizes
was supported in part by the Defense Advanced Research Projects Agency for the functions being operated on. For example, comple-
under Orders 3771 and 3597. menting a function requires time proportional to the size of the
The author is with the Department of Computer Science, Carnegie-Mellon function graph, while combining two functions with a binary
University, Pittsburgh, PA 15213.
IEEE tog Number 8609399. operation (of which intersection, subtraction, and testing for

0018-9340/86/0800-0677$01.00 © 1986 IEEE

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 678 IEEE TRANSACTIONS ON COMPUTERS, VOL. C-35, NO. 8, AUGUST 1986

implication are special cases) requires, at most, time propor- experimental investigations into the practicality of our meth-
tional to the product of the two graph sizes. Finally, our ods. We conclude by suggesting further refinements of our
representation in terms of reduced graphs is a canonical form, methods.
i.e., every function has a unique representation. Hence,
testing for equivalence simply involves testing whether the two A. Notation
graphs match exactly, while testing for satisfiability simply We assume the functions to be represented all have the same
involves comparing the graph to that of the constant function n arguments, written xl, * xn. In expressing a system such
0. as a combinational logic network or a Boolean expression as a
Unfortunately, our approach does have its own set of Boolean function, we must choose some ordering of the inputs
undesirable characteristics. At the start of processing, we must or atomic variables, and this ordering must be the same for all
choose some ordering of the system inputs as arguments to all functions to be represented.
of the functions to be represented. For some functions, the size The function resulting when some argument xi of function f
of the graph representing the function is highly sensitive to this is replaced by a constant b is called a restriction of f
ordering. The problem of computing an ordering that mini- (sometimes termed a cofactor [10]) and is denoted fii=b*
mizes the size of the graph is itself a co NP-complete problem. That is, for any arguments xl, * xn,
Our experience, however, has been that a human with some
understanding of the problem domain can generally choose an fjlxi=b(X1, -, x") =(XI,* , xi_-,. b, xi+ ,***, xn).
appropriate ordering without great difficulty. It seems quite Using this notation, the Shannon expansion [11] of a function
likely that using a small set of heuristics, the program itself around variable xi is given by
could select an adequate ordering most of the time. More
seriously, there are some functions that can be represented by f=xi * flxi=I+i * flxi=o. (1)
Boolean expressions or logic circuits of reasonable size but for Similarly, the function resulting when some argument xi of
all input orderings the representation as a function graph is too function f is replaced by function g is called a composition of
large to be practical. For example, we prove in the Appendix f and g, and is denoted f x=g. That is, for any arguments xi,
that the furnctions describing the outputs of an integer
multiplier have graphs that grow exponentially in the word
size regardless of the input ordering. With the exception of f lxi=g(xl, Xn)
integer multiplication, our experience has been that such =f(XI, * * Xi- 1, g(Xli * *
..
Xn)9 Xi+l *
...
Xn)
functions seldom arise in digital logic design applications. For
other classes of problems, particularly in combinatorics, Some functions may not depend on all arguments. The
our methods seem practical only under restricted conditions. dependence set of a function f, denoted If, contains those
A variety of graphical representations of discrete functions arguments on which the function depends, i.e.,
have been presented and studied extensively. A survey of the
literature on the subject by Moret [7] cites over 100 refer- If= {i1f1xi=0#ffXi=11
ences, but none of these describe a sufficient set of algorithms The function which for all values of the arguments yields 1
to implement a Boolean function manipulation program. (respectively 0) is denoted 1 (respectively 0). These two
Fortune, Hopcroft, and Schmidt [8] studied the properties of Boolean functions have dependence sets equal to the empty
graphs obeying similar restrictions to ours, showing that two set.
graphs could be tested for functional equivalence in polyno- A Boolean function can also be viewed as denoting some
mial time and that some functions require much larger graphs subset of Boolean n space, namely those argument values for
under these restrictions than under milder restrictions. Payne which the function evaluates to 1. The satisfying set of a
[9] describes techniques similar to ours for reducing the size of function f, denoted Sf, is defined as
the graph representing a function. Our algorithms for combin-
ing two functions with a binary operation, and for composing Sf {(X1,*I , Xn)if(xl , X")=1}
two functions are new, however, and these capabilities are
central to a symbolic manipulation program. II. REPRESENTATION
The next section of this paper contains a formal presentation In this section we define our graphical representation of a
of function graphs. We define the graphs, the functions they Boolean function and prove that it is a canonical form.
represent, and a class of "reduced" graphs. Then we prove a Definition 1: A function graph is a rooted, directed graph
key property of reduced function graphs: that they form a with vertex set V containing two types of vertices. A
canonical representation of Boolean functions. In the follow- nonterminal vertex v has as attributes an argument index
ing section we depart from this formal presentation to give index(v) E I 1, * n } and two children low(v), high(v) e
some examples and to discuss issues regarding the V. A terminal vertex v has as attribute a value value(v) E { 0,
efficiency of our representation. Following this, we develop a 1 }.
set of algorithms for manipulating Boolean functions using our Furthermore, for any nonterminal vertex v, if low(v) is also
representation. These algorithms utilize many of the classical nonterminal, then we must have index(v) < index(low(v)).
techniques for graph algorithms, and we assume the reader has Similarly, if high(v) is nonterminal, then we must have
some familiarity with these techniques. We then present some index(v) < index(high(u)).
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 BRYANT: GRAPH-BASED ALGORITHMS 679

Due to the ordering restriction in our definition, function Definition 5: A function graph G is reduced if it contains
graphs form a proper subset of conventional binary decision no vertex v with low(v) = high(v), nor does it contain distinct
diagrams. Note that this restriction also implies that a function vertices v and v' such that the subgraphs rooted by v and v' are
graph must be acyclic because the nonterminal vertices along isomorphic.
any path must have strictly increasing index values. The following lemma follows directly from the definition of
We define the correspondence between function graphs and reduced function graphs.
Boolean functions as follows. Lemma 2: For every vertex v in a reduced function graph,
Definition 2: A function graph G having root vertex v the subgraph rooted by v is itself a reduced function graph.
denotes a function f, defined recursively as The following theorem proves a key property of reduced
1) If v is a terminal vertex: function graphs, namely that they form a canonical representa-
a) If value(v) = 1, thenffv = 1. tion for Boolean functions, i.e., every function is represented
b) If value(v) = 0, thenfv = 0. by a unique reduced function graph. In contrast to other
2) If v is a nonterminal vertex with index(v) = i, then f, canonical representations of Boolean functions, such as
is the function canonical sum-of-products form, however, many "interest-
ing" Boolean functions are represented by function graphs of
fv (XI 9 Xn) = i * flow(v)(Xi 9
..
* Xn) size polynomial in the number of arguments.
Theorem 1: For any Boolean function f, there is a unique
+ Xi * fhigh (,)(XI X Xn) - (up to isomorphism) reduced function graph denoting f and
any other function graph denoting f contains more vertices.
In other words, we can view a set of argument values xl, Proof: The proof of this theorem is conceptually
* * , xn as describing a path in the graph starting from the root, straightforward. However, we must take care not to presup-
where if some vertex v along the path has index(v) = i, then pose anything about the possible representations of a function.
the path continues to the low child if x, = 0 and to the high The proof proceeds by induction on the size of If.
child if xi = 1. The value of the function for these arguments For IIf 0, f must be one of the two constant functions 0
equals the value of the terminal vertex at the end of the path. or 1. Let G be a reduced function graph denoting the function
Note that the path defined by a set of argument values is 0. This graph can contain no terminal vertices having value 1,
unique. Furthermore, every vertex in the graph is contained in or else there would be some set of argument values for which
at least one path, i.e., no part of the graph is "unreachable." the function evaluates to 1, since all vertices in a function
Two function graphs are considered isomorphic if they graph are reachable by some -path corresponding to a set of
match in both their structure and their attributes, more argument values. Now suppose G contains at least one
precisely: nonterminal vertex. Then since the graph is acyclic, there
Definition 3: Function graphs G and G' are isomorphic if must be a nonterminal vertex u where both low(v) and high(v)
there exists a one-to-one function a from the vertices of G onto are terminal vertices, and it follows that value(low(v)) =
the vertices of G' such that for any vertex v if a(v) = v', then value(high(v)) = 0. Either these 2 vertices are distinct, in
either both v and v' are terminal vertices with value(v) = which case they constitute isomorphic subgraphs, or they are
value(v'), or both v and v' are nonterminal vertices with identical, in which case v has low(v) = high(u). In either case,
index(v) = index(v'), a(low(v)) = low(u'), and o(high(v)) G would not be a reduced function graph. Hence, the only
= high(v'). reduced function graph denoting the function 0 consists of a
Note that since a function graph contains only 1 root and the single terminal vertex with value 0. Similarly, the only
children of any nonterminal vertex are distinguished, the reduced function graph denoting 1 consists of a single terminal
isomorphic mapping a between graphs G and G' is quite vertex with value 1.
constrained: the root in G must map to the root in G', the Next suppose that the statement of the theorem holds for any
root's low child in G must map to the root's low child in G', function g having IIg < k, and that IIf = k where k > 0.
and so on all the way down to the terminal vertices. Hence, Let i be the minimum value in If, i.e., the least argument on
testing two function graphs for isomorphism is quite simple. which the functionf depends. Define the functions fo andfi as
Definition 4: For any vertex v in a function graph G, the f ,== o andlxi =1, respectively. Bothfo and fi have dependence
subgraph rooted by v is defined as the graph consisting of v sets of size less than k and hence are represented by unique
and all of its descendants. reduced function graphs. Let G and G' be reduced function
Lemma 1: If G is isomorphic to G' by mapping a, then for graphs for f. We will show that these two graphs are
any vertex v in G, the subgraph rooted by v is isomorphic to isomorphic, consisting of a root vertex with index i and with
the subgraph rooted by a(v). low and high subgraphs denoting the functions fo and fi. Let v
The proof of this lemma is straightforward, since the and u' be nonterminal vertices in the two graphs such that
restriction of a to v and its descendants forms the isomorphic index(v) = index(v') = i. The subgraphs rooted by u and v'
mapping. both denote f, since f is independent of the arguments xl, -

A function graph can be reduced in size without changing xi_1. The subgraphs rooted by vertices low(v) and low(v')
the denoted function by eliminating redundant vertices and both denote the function fo and hence by induction must be
duplicate subgraphs. The resulting graph will be our primary isomorphic according to some mapping ao. Similarly, the
data structure for representing a Boolean function. subgraphs rooted by vertices high(v) and high(v') both denote

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 680 IEEE TRANSACTIONS ON COMPUTERS, VOL. C-35, NO. 8, AUGUST 1986
the function fi and hence must be isomorphic according to Argument x i Odd Parity
some mapping a,.
We claim that the subgraphs rooted by v and v' must be 0 1
isomorphic according to the mapping a defined as 0 1

(v U =v
v(u) = o(u) u in subgraph rooted by low(v)
cri(u) u in subgraph rooted by high(v).
X1'X2 X4
To prove this, we must show that the function a is well
00
defined, and that it is an isomorphic mapping. Observe that if *

*
0

vertex u is contained in both the subgraph rooted by low(v) *

.
.
and the subgraph rooted by high(v), then the subgraphs rooted
by a0(u) and al(u) must be isomorphic to the one rooted by u
and hence to each other. Since G' contains no isomorphic
subgraphs, this can only hold if oo(u) = a,(u), and hence there
is no conflict in the above definition of a. By similar
reasoning, we can see that a must be one-to-one-if there were
distinct vertices ul and u2 in G having a(ul) = C(u2), then the Fig. 1. Example function graphs.
subgraphs rooted by these two vertices would be isomorphic to
the subgraph rooted by a(ul) and hence to each other implying index i and having as low child a terminal vertex with value 0
that G is not reduced. Finally, the properties that a is onto and and as high child a terminal vertex with value 1. We present
is an isomorphic mapping follows directly from its definition this graph mainly to point out that an input variable can be
and from the fact that both ao and a, obey these properties. viewed as a Boolean function, and hence can be operated on by
By similar reasoning, we can see that graph G contains the manipulation algorithms described in this paper.
exactly one vertex with index(v) = i because if some other The odd parity function of n variables is denoted by a graph
such vertex existed, the subgraphs rooted by it and by v would containing 2n + 1 vertices. This compares favorably to its
be isomorphic. We claim in fact that v must be the root. representation in reduced sum-of-products form (requiring 2n
Suppose instead that there is some vertex u with index(v) = j terms). This graph resembles the familiar parity ladder contact
< i, but such that there is no other vertex w having j < network first described by Shannon [11]. In fact, we can adapt
index(w) < i. The function f does not depend on the xj and his construction of a contact network to implement an arbitrary
hence the subgraphs rooted by low(u) and high(u) both denote symmetric function to show that any symmetric function of n
f, but this implies that low(u) = high(u) = u, i.e., G is not arguments is denoted by a reduced function graph having
reduced. Similarly, vertex v' must be the root of G', and O(n2) vertices.
hence the two graphs are isomorphic. As a third example, the graph denoting the function x, x2 +
Finally, we can prove that of all the graphs denoting a x4 contains 5 vertices as shown. This example illustrates
particular function, only the reduced graph has a minimum several key properties of reduced function graphs. First,
number of vertices. Suppose G is not a reduced graph. Then observe that there is no vertex having index 3 because the
we can form a smaller graph denoting the same function as function is independent of x3. More generally, a reduced
follows. If G contains a vertex v with low(v) = high(u), then function graph for a function f contains only vertices having
eliminate this vertex, and for any vertex having v as child, indexes in If. There are no inefficiencies caused by consider-
make low(v) -be the child instead. If G contains distinct ing all of the functions to have the same n arguments. This
vertices v and u' such that the subgraphs rooted by v and v' are would not be the case if we represented functions by their truth
isomorphic, then eliminate vertex v' and for any vertex having tables. Second, observe that even for this simple function,
v' as a child, make v be the child instead. E several of the subgraphs are shared by different branches. This
sharing yields efficiency not only in the size of the function
III. PROPERTIES representation, but also in the performance of our al-
In this section we explore the efficiency of our representa- gorithms-once some operation has been performed on a
tion by means of several examples. Fig. 1 shows several subgraph, the result can be utilized by all places sharing this
examples of reduced function graphs. In this figure, a subgraph.
nonterminal vertex is represented by a circle containing the
index with the two children indicated by branches labeled 0 B. Ordering Dependence
(low) and 1 (high). A terminal vertex is represented by a Fig. 2 shows an extreme case of how the ordering of the
square containing the value. arguments can affect the size of the graph denoting a function.
The functions x1ix2 + x3-x4 + x5 x6and xl x4 + x2 x5 +
A. Example Functions x3 x6 differ from each other only by a permutation of their
The function which yields the value of the ith argument is arguments, yet one is denoted by a function graph with 8
denoted by a graph with a single nonterminal vertex having vertices while the other requires 16 vertices. Generalizing this

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 BRYANT: GRAPH-BASED ALGORITHMS 681
X 1X2 + X3'X4 + 5 6 x .x
1 4
+ x .x
2 5
+ x *x
3 6 number of vertices grows exponentially with the number of
arguments.
To view this from a different perspective, consider the
family of functions:
fbl, * -,bn (Xn + I
I , X2n) =bl Xn+l1 + +bn X2n -

For all 2" possible combinations of the values bl, -, b

each of these functions is distinct, and hence they must be
represented by distinct subgraphs in the graph of the function
X1 Xn +1 + * * * + Xn X2n
l
To use our algorithms on anything other than small
problems (e.g., functions of 16 variables or more), a user must
have an intuition about why certain functions have large
function graphs, and how the choice of input ordering may
affect this size. In Section V we will present examples of how
Left = low, Right = high
the structure of the problem to be solved can often be exploited
to obtain a suitable input ordering.
Fig. 2. Example of argument ordering dependence.
C. Inherently Complex Functions
to functions of 2n arguments, the function x, x2 + + Some functions cannot be represented efficiently with our
x2" -1 x2n is denoted by a graph of 2n + 2 vertices, while the representation regardless of the input ordering. Unfortunately,
function xl xn +I + + Xn X2n requires 2 n +1 vertices. the functions representing the output bits of an integer
Consequently, a poor initial choice of input ordering can have multiplier fall within this class. The appendix contains a proof
very undesirable effects. that for any ordering of the inputs a,, * * * , an and b1, . . ., bn
Upon closer examination of these two graphs, we can gain a at least one of the 2n functions representing the integer product
better intuition of how this problem arises. Imagine a bit-serial of a b requires a graph containing at least 2n/8 vertices. While
processor that computes a Boolean function by examining the this lower bound is not very large for word sizes encountered
arguments xi, x2, and so on in order, producing output 0 or 1 in practice (e.g., it equals 256 for n = 64), it indicates the
after the last bit has been read. Such a processor requires exponential complexity of these functions. Furthermore, we
internal storage to store enough information about the argu- suspect the true bound is far worse.
ments it has already seen to correctly deduce the value of the Empirically, we have found that for word sizes n less than
function from the values of the remaining arguments. Some or equal to 8, the output functions of a multiplier require no
functions require little intermediate information. For example, more than 5000 vertices for a variety of different input
to compute the parity function a bit-serial processor need only orderings. However, for n > 10, some outputs require graphs
store the parity of the arguments it has already seen. Similarly, with more than 100 000 vertices, and hence become impracti-
to compute the function xl x2 + + X2n -I X2n, theZ cal.
processor need only store whether any of the preceding pairs Given the wide variety of techniques used in implementing
of arguments were both 1, and perhaps the value of the multipliers [12], a canonical form for Boolean functions (along
previous argument. On the other hand, to compute the with a set of manipulation algorithms) that could efficiently
function xl xn, + * * * + xn x2,, we would need to store the represent multiplication would be of great interest for circuit
first n arguments to correctly deduce the value of the function verification. Unfortunately, these functions seem especially
from the remaining arguments. A function graph can be intractable.
thought of as such a processor, with the set of vertices having
index i describing the processing of argument xi. Rather than IV. OPERATIONS
storing intermediate information as bits in a memory, how- We view a symbolic manipulation program as executing a
ever, this information is encoded in the set of possible branch sequence of commands that build up representations of
destinations. That is, if the bit-serial processor requires b bits functions and determine various properties about them. For
to encode information about the first i arguments, then in any example, suppose we wish to construct the representation of
graph for this function there must be at least 2b vertices that the function computed by a combinational logic gate network.
are either terminal or are nonterminal with index greater than i Starting from graphs representing the input variables, we
having incoming branches from vertices with an index less proceed through the network, constructing the function com-
than or equal to i. For example, the function xl X4 + x2 X5 + puted at the output of each logic gate by applying the gate
x3 x6 requires 23 branches between vertices with an index less operator to the functions at the gate inputs. In this process, we
than or equal to 3 to vertices which are either terminal or have can take advantage of any repeated structure by first construct-
an index greater than 3. In fact, the first 3 levels of this graph ing the functions representing the individual subcircuits (in
must form a complete binary tree to obtain this degree of terms of a set of auxiliary variables) and then composing the
branching. In the generalization of this function, the first n subcircuit functions to obtain the complete network functions.
levels of the graph form a complete binary tree, and hence the A similar procedure is followed to construct the representation

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 682 IEEE TRANSACTIONS ON COMPUTERS, VOL. C-35, NO. 8, AUGUST 1986

of the function denoted by some Boolean expression. At this TABLE I

point we can test various properties of the function, such as SUMMARY OF BASIC OPERATIONS
whether it equals 0 (satisfiability) or 1 (tautology), or whether
it equals the function denoted by some other expression Procedure Result Time Complexity
(equivalence). We can also ask for information about the Reduce G reduced to canonical form O(1 GIlog(lG 1))
function's satisfying set, such as to list some member, to list Apply fl(oP)f2 0(I GL 1 G21)
I
Restrict fKx,=b 0( GIlog(lGl))
all members, to test some element for membership, etc. Compose f1lxI=f2 O(IGI12 1G21)
In this section we will present algorithms to perform basic Satisfy-one some element of Sf 0(n)
Satisfy-all Sf 0(n ISf I)
operations on Boolean functions represented as function Satisfy-count Sf1 0(I G l)
graphs as summarized in Table I. These few basic operations
can be combined to perform a wide variety of operations on
Boolean functions. In the table, the functionf is represented by procedure Traverse(u:vertex);
begin
a reduced function graph G containing G vertices, and u.mark = not u.mark
similarly for the functions fi and f2. Our algorithms utilize ...do something to u...
techniques commonly used in graph algorithms such as if u.index c n
then begin (v nonterminal}
ordered traversal, table lookup and vertex encoding. As the if u.mark * v.low.mark then Traverse(v.low);
table shows, most of the algorithms have time complexity if u.mark * u.high.mark then Traverse(v.high);
proportional to the size of the graphs being manipulated. end;
end;
Hence, as long as the functions of interest can be represented
by reasonably small graphs, our algorithms are quite efficient. Fig. 3. Implementation of ordered traversal.

A. Data Structures already been visited by comparing the two marks. As a vertex
We will express our algorithms in a pseudo-Pascal notation. is visited, we could perform some operation such as to
Each vertex in a function graph is represented by a record increment a counter and then set the id field to the value of the
declared as follows: counter (thereby assigning a unique identifier to each vertex).
type vertex = record Each vertex is visited exactly once, and assuming the
low, high: vertex; operation at each vertex requires constant time, the complexity
index: 1..n + 1; of the algorithm is °(1 G I), i.e., proportional to the number of
val: (0,1,X); vertices in the graph. Upon termination, the vertices again all
id: integer; have the same mark value.
mark: boolean; B. Reduction
end;
The reduction algorithm transforms an arbitrary function
Both nonterminal and terminal vertices are represented by graph into a reduced graph denoting the same function. It
the same type of record, but the field values for a vertex v closely follows an algorithm presented in Example 3.2 of Aho
depend on the vertex type as given in the following table. et al. [13] for testing whether two trees are isomorphic.
Field Terminal Nonterminal Proceeding from the terminal vertices up to the root, a unique
low null low(v) integer identifier is assigned to each unique subgraph root.
high null high(v) That is, for each vertex v it assigns a label id(v) such that for
index n + 1 index(v) any two vertices u and v, id(u) = id(v) if and only if fu = f,
val value(v) x (in the terminology of Definition 2). Given this labeling, the
algorithm constructs a graph with one vertex for each unique
The id and mark fields contain auxiliary information used label.
by the algorithms. The id field contains a integer identifier By working from the terminal vertices up to the root, a
which is unique to that vertex in the graph. It does not matter procedure can label the vertices by the following inductive
how the identifiers are ordered among the vertices, only that method. First, two terminal vertices should have the same
they range from 1 up to the number of vertices and that they all label if and only if they have the same value attributes. Now
be different. The mark field is used to mark which vertices assume all terminal vertices and all nonterminal vertices with
have been visited during a traversal of the graph. The index greater than i have been labeled. As we proceed with the
procedure Traverse shown in Fig. 3 illustrates a general labeling of vertices with index i, a vertex v should have id(v)
method used by many of our algorithms for traversing a graph equal to that of some vertex that has already been labeled if
and performing some operation on the vertices. This proce- and only if one of two conditions is satisfied. First, if
dure is called at the top level with the root vertex as argument id(low(v)) = id(high(v)), then vertex v is redundant, and we
and with the mark fields of the vertices being either all true or should set id(v) = id(low(v)). Second, if there is some labeled
all false. It then systematically visits every vertex in the graph vertex u with index(u) = i having id(low(v)) = id(low(u)),
by recursively visiting the subgraphs rooted by the two and id(high(v)) = id(high(u)), then the reduced subgraphs
children. As it visits a vertex, it complements the value of the rooted by these two vertices will be isomorphic, and we should
mark field, so that it can later determine whether a child has set id(v) = id(u).

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 BRYANT: GRAPH-BASED ALGORITHMS 683

function Reduce(v: vertex): vertex;

var subgraph: arrayll [ GiI of vertex;
var ulist: array[l n + 1] of list;
begin
Put each vertex u on list ulist[u.index]
nextid = 0;
fori:= n + I downto I do
begin
Q := empty set;
for each u in vlist[i] do
if u.index = n + 1
then add (key,u) to Q where key = (u.value){terminal vertex}
else if u.low.id = u.high.id
then u.id = u.low.id {redundant vertex}
else add (key,u) to Q where key = (u.low.id, u.high.id);
Sort elenments of Q by keys;
oldkey:= (-1;- 1); {unmatchable key}
for each (key,u) in Q removed in order do
if key = oldkey
then u.id := nextid; {matches existing vertex}
else begin {unique vertex}
nextid := nextid + 1; u.id : nextid; subgraph[nextid] := u;
u.low := subgraph[u.low.id]; u.high := subgraph[u.high.id];
oldkey := key;
end;
end;
return(subgraph[v.id]);
end;
Fig. 4. Implementation of Reduce.

A sketch of the code is shown in Fig. 4. First, the vertices 1 (4.3)

are collected into lists according to their indexes. This can be o0 \ Key Label
done by a procedure similar to Traverse where as a vertex is (1,3)
2 2
(3.3) (1)
~~~~~~~(
2
1,2) 3
o/ 1 v X1 (3 33)33
visited, it is added to the appropriate list. Then we process o ( 1,3) 4
(3.3) 3
these lists working from the one containing the terminal (1,2) / j
1.2)
2
(4.3) 5
vertices up to the one containing the root. For each vertex on a 1 0 0 1

list we create a key of the form (value) for a terminal vertex or

of the form (lowid, highid) for a nonterminal vertex, where (0) (1) (0) (1)
lowid = id(low(v)) and highid = id(high(v)). If a vertex has Fig. 5. Reduction algorithm example.
lowid = highid, then we can immediately set id(v) = lowid.
The remaining vertices are sorted according to their keys. We
then work through this sorted list, assigning a given label to all operators in a Boolean expression or logic gate network. It
vertices having the same key. We also select one vertex record takes graphs representing functionsf1 andf2, a binary operator
for each unique label and store a pointer to this vertex in an (op) (i.e., any Boolean function of 2 arguments) and produces
array indexed by the label. These selected vertices will form a reduced graph representing the function fm (op)f2 defined as
the final reduced graph. Hence, we can obtain the reduced
version of a subgraph with root v by accessing the array [fi(op)f2](X1, Xn)
element with index id(v). We use this method to modify a
vertex record so that its two children are vertices in the =fi(X19 x") (oP) f2(XI 9
..
tn)
reduced graph and to return the root of the final reduced graph
when the procedure is exited. Note that the labels assigned to This procedure can also be used to complement a function
the vertices by this routine can serve as unique identifiers for (compute f e 1)1 to test for implication (compare f' nf2 to
later routines. The time complexity of the algorithm is 0), and a variety of other operations. With our representation,
dominated by the time to sort the lists. we can implement all of the operators with a single algorithm.
Fig. 5 shows an example of how the reduction algorithm In contrast, many Boolean function manipulation programs [6]
works. Next to each vertex we show the key and the label require different algorithms for complementing, intersecting
generated during the labeling process. Observe that both ((op) = ), and unioning ((op) - +) functions, and then
vertices with index 3 have the same key, and hence the right implement other operators by combining these operations.
hand vertex with index 2 is redundant. The algorithm proceeds from the roots of the two argument
graphs downward, creating vertices in the resultant graph at
C. Apply
The procedure Apply provides the basic method for Alternatively, a function can be complemented by simply complementing
creating the representation of a function according to the the values of the terminal vertices.

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 684 IEEE TRANSACTIONS ON COMPUTERS, VOL. C-35, NO. 8, AUGUST 1986

the branching points of the two arguments graphs. First, let us avoids the potentially numerous recursive calls required to
explain the basic idea of the algorithm. Then we will describe construct the subgraph rooted by u.
two refinements to improve the efficiency. The control Second, suppose the algorithm is applied to two vertices
structure of the algorithm is based on the following recursion, where one, say ul, is a terminal vertex, and for this particular
derived from the Shannon expansion (1) operator, value(vl) is a "controlling" value, i.e., either
value(uv)(op)a = 1 for all a, or value(vl)(op)a = 0 for all a.
fi(op)f2=Xi * (fljXi=o(oP)f2jXi=o)+Xi * (flx,=1KoP)f21x,= 1)- For example, 1 is a controlling value for either argument of
OR, while 0 is a controlling value for either argument of AND.
To apply the operator to functions represented by graphs with In this case, there is no need to evaluate further. We simply
roots vI and v2, we must consider several cases. First, suppose create a terminal vertex having the appropriate value. While
both vu and v2 are terminal vertices. Then the result graph this refinement does not improve the worst case complexity of
consists of a terminal vertex having a value of value(vl) (op) the algorithm, it certainly helps in many cases. In practice we
value(u2). Otherwise, suppose at least one of the two is a have found this case occurs around 10 percent of the time.
nonterminal vertex. If index(vl) = index(v2) = i, we create a A sketch of the code is shown in Fig. 6. For simplicity and
vertex u having index i, and apply the algorithm recursively on to optimize,,the worst case performance, the table is imple-
low(vj) and low(v2) to generate the subgraph whose root mented as a two-dimensional array indexed 'by the unique
becomes low(u), and on high(vl) and high(V2) to generate the identifiers of the two vertices. In practice;, this table will be
subgraph whose root becomes high(u). Suppose, on the other very sparse, and hence it is more efficient to use a hash table.
hand, that index(v1) = i, but either V2 is a terminal vertex or To detect whether one of the two vertices contains a
index(v2) > i. Then the function represented by the graph controllitig value for the operator, we evaluate the expression
with root v2 is independent of xi, i.e., v l.value (op) v2.value using a three-valued algebra where X
(the value at any nonterminal vertex) represents "DON'T
CARE. that is,if b (op) 1 = b (op) 0 = a, then b (op) X = a,
f2Axi= 0 =f2Ixi= f
=2-- otherwise b (op) X = X. This evaluation technique is used in
many logic simulators [14]. Before the final graph is returned,
Hence, we create a vertex u having index i, but recursively we apply the procedure Reduce to transform it into a reduced
appily the algorithm on low(vi) and V2 to generate the subgraph graph and to assign unique identifiers td the vertices.
whose root becomes low(u), and on high(vl) and v2 to To analyze the time complexity of this algorithm when
generate the subgraph whose root becomes high(u). A similar called on graphs with IGI and IG21 vertices, respectively,
situation holds When the roles of the two vertices in the observe that the procedure Apply-step only generates recur-
previbus case are reversed. In general the graph produced by sive calls the first time it is invoked on a given pair of vertices,
this process will not be reduced, and we apply the reduction hence the total number of recursive calls to this procedure
algorithm to it before returning. cannot exceed 2* GI G21 . Within a single call, all opera-
-

If we were to implement the technique described in the tions (including looking for an entry in the table) require
previous paragraph directly we would obtain an algorithm of constant time. Furthermore, the initialization of the table
exponential (in n) time complexity because every call for requires at time proportional to its size, i.e., °(I G1 G21).
which one of the arguments is a nonterminal vertex generates Hence, the total complexity of the algorithm is O(j Gi G21).
two recursive calls. This complexity can be reduced by two In the worst case, the algorithm may actually require this much
refinetients. time because the reduced graph for the function fl(op)f2 can
First, the algorithm need not evaluate a given pair of contain O(1 GI G2j) vertices. For example, choose any
subgraphs more than once. Instead, we can maintain a table positive integers m and n and define the functions fi and f2 as
containing entries of the form (Vu b2, u) indicating that the
result of applying the algorithm to subgraphs with roots v1 and fl(XI** X2n+2m)=XI Xn+m+I+ +Xn X2n+m
v2 was a subgraph with root u. Th6n before applying the
algorithm to a pair of vertices, we first chbbk whether the table f2(xCI * X2n +2m) =Xn+ I X`2n +m+ I
contains an entry for these two vertices. If so, we can + * **+Xn+m * X2n+2m,
immediately return the result. Othetwise, we proceed as
described in the previous paragraph and add a new entry to the These functions are represented by graphs containing 2 f + I and
table. This refinement alone drops the time complexity to 2 m +1 vertices, respectively, as we saw in Section III. If we
0(1 G1 G2j), as we will shdw latef. This refinement shows computef = fi + f2, the resulting functibn is
how we can exploit the sharingof ubhgraphs in the data
structures to gain efficiency in the algorithms. If the two
f(Xls s X2n+2m)=XI Xn+mpI+ +Xn+m X2n+2m
argument graphs each contain many, shared subgraphs, we Which is represented by a graph with 2fn+m+l = 0.5
obtain a high "hit rate" for our table. In practice we have 'I1 * IG21 vertices. Hence the worst case efficiency of the
found hit rates to range between 40 and 50 per&ent. Note that algorithm is limited by the size of the result graph, and we
with a 50 percent hit rate, we obtain a speed improvement far cannot expect any algorithm to achieve better performance
better than the factor of 2 one might first expect. Finding an than ours under these conditions. Empirically, we have never
entry (v1, V2, u) in the table counts as only one "hit," but observed this worst case occurring except when the result

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 BRYANT: GRAPH-BASED ALGORITHMS 685

function Apply(vl, v2: vertex; (op): operator): vertex

var T: array[I * * GI1, 1 * G2¶] of vertex;
(Recursive routine to implement Apply} al 1
x I*x3 + x
2
*x
3

function Apply-step(vl, u2: vertex): vertex;

begin 0 1
u T[vl.id, v2.id];
if u * null then return(u); (have already evaluated}
u = new vertex record; u.mark = false; a2
T[vl.id, u2.id] := u; (add vertex to table}
u.value= ul.value (op) v2.value;
if u.value * X 1 b3
then begin (create terminal vertex}
a3 a4 I b4
u.index := n + 1; u.low null; u.high null;
end
else begin (create nonterminal and evaluate further down}
u.index = Min(vl.index, v2.index);
if vl.index - u.index Evaluation Graph After Reduction
then begin vl low :v=ul.low; vhighl = vi.high end
else begin vlowl := vl; uhighl := ul end;
if v2.index = u.index
then begin vlow2 = u2.low; uhigh2 v= 2.high end
else begin vlow2 := v2; vhigh2 = u2 end; x *x .x
1 2 3
u.low := Apply-step(ulowl, vlow2);
u.high = Apply-step(vhighl, uhigh2);
end;
return(u);
end;
begin (Main routine}
Initialize all elements of T to null;
u := Apply-step(vl, u2); a3, b3
return(Reduce(u));
end; Fig. 7. Example of Apply.
Fig. 6. Implementation of Apply.
graph is large. We conjecture the algorithm could be refined to E. Composition
have worst case complexity b(1GI G + G2j + G3 I) where The composition algorithm constructs the graph for the
G3 is the resulting reduced graph. function obtained by composing two functions. This algorithm
Fig. 7 shows an example of how this algorithm would allows us to more quickly derive the functions for a logic
proceed in applying the "OR" operation to graphs representing network or expression containing repeated structures, a
the functions r (xl *x3) and x2 x3. This figure shows the graph common occurrence in structured designs. Composition can
created by the algorithm before reduction. Next to each vertex be expressed in terms of restriction and Boolean operations,
in the resulting graph, we indicate the two vertices on which according to the following expansion, derived directly from
the procedure Apply-step was invoked in creating this vertex. the Shannon expansion (1).
Each of our two refinements is applied once: when the
procedure is invoked on vertices a3 and bI (because 1 is a f1lxi=f2 = f2 * fi1xi=1 + ( 'f2) *filxi=o- (2)
controlling value for this operator), and on the second Thus, our algorithms for restriction and application are
invocation on vertices a3 and b3. For larger graphs, we would sufficient to implement composition. However, if the two
expect these refinements to be applied more often. After the functions are represented by graphs GI and G2, respectively,
reductioni algorithm has been applied, we see' that the resulting we would obtain a worst case complexity of 0(I1G2 2)
graph indeed represents the function --(xI tZ2 x3). We can improve this complexity to 0(1 G1 12. G2 1) by observ-
ing that (2) can be expressed' in terms of a ternary Boolean
D. Restriction operation ITE (short for if-then-else)
The restriction algorithm transforms the grap1 representing
a function f into one representing thefunc x=on f I=b for ITE(a, b, c)=a b+(-'a) * c.
specified values of i and b. This algorithq proceeds by
traversing the graph in the manner shown in the procedure This operation can be applied to the three functions f2, fi IXj=1,
Traverse looking for every pointer (either to th root of the and f IXj=o by an extension of the Apply procedure to ternary
graph or from some vertex to its child) to a vertex u such that operations. The procedure Compose shown in Fig. 8 utilizes
index(v) = i. When such a pointer is encountered, it is this technique to compose two functions. In this code the
changed to point either to low(v) (for b = 0) or to high(v) (for recursive routine Compose-step both applies the operation
b = 1.) Finally, the procedure Reduce is called to reduce the ITE and computes the restrictions of fi as it traverses the
graph and to assign unique identifiers to the vertices. The graphs. It is unclear whether the efficiency of this algorithm
amount computation required for each vertex is constant, fand truly has a quadratic dependence on the size of its first
hence the complexity of this algorithm is dominated by the argument, or whether this indicates a weakness in our
reduction time. Note that this algorithm could simultaneously performance analysis. We have found no cases for which
restrict several of the function arguments without changilgi the composition requires time greater than O(1 G1 G2 1).
complexity. In many instances, two functions can be composed in a

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 686 IEEE TRANSACTIONS ON COMPUTERS, VOL. C-35, NO. 8, AUGUST 1986

function Compose(vl, v2: vertex; i:integer): vertex

var T: array[lI * Gl, 1'I * GI , I * G21] of vertex;
-

{'Recursive routine to implement Compose}

function Compose-step(vlow I, uhighl, u2: vertex): vertex;
begin
{Perform restrictions}
if vlowl.index = i then ulowl := vlowl.low;
if uhighl.index = i then vhighl = uhighl.high;
{Apply operation ITE)
u := T[vlowl.id, uhighl.id, u2.id];
if u * null then return(u); {have already evaluated}
u := new vertex record; u.mark := false;
T[ulowl.id, vhighl.id, v2.id] :u=u; {add vertex to table}
u.value := (-v2.value ulow 1.value) + (u2.valueuvhighl .value);
if u.value * X
then begin {create terminal vertex}
U.index := n + 1; u.low := null; u.high := null;
end
else begin {create nonterminal and evaluate further down}
u.index := Min(vlowl .index, uhighi .index, u2.index);
if vlow I index = u.index
then begin ulll := vlowi .low; vlhl := vlowl.high end
else begin vll := vlowl; ulhl := vlowI end;
if uhighl.index = u.index
then begin vhll := vhigh .low; vhhl := vhighl .high end
else being vhll := vhighl; vhhl := vhighl end;
if v2.index = u.index
then begin ulow2 := v2.jow, vhigh2 := u2.high end
else begin vlow2 := v2; vhigh2 := v2 end;
u.low := Compose-step(vll1, vhll, vlow2);
u.high := Compose-step(vlhl, vhhl, vhigh2);
end;
return(u);
end;
begin {Main routine}
Initialize all elements of T to null;
u := Compose-step(vl, vl, v2);
return(Reduce(u));
end;

Fig. 8. Implementation of Compose.

simpler and more efficient way by a more syntactic technique. which again is optimal. However, this is generally not a wise
That is suppose functions fi and f2 are represented by graphs thing to do-many functions that are represented by small
G1 and G2, respectively. We can compose the functions by graphs have very large satisfying sets. For example, the
replacing each vertex v in graph G1 having index i by a copy of function 1 is represented by a graph with one vertex, yet all 2n
G2, replacing each branch to a terminal vertex in G2 by a possible combinations of argument values are in -its satisfying
branch to low(v) or high(v) depending on the value of the set. Hence, care must be exercised in invoking this algorithm.
terminal vertex. We can do this however, only if the resulting If we wish to find an'element of the satisfying set obeying
graph would not violate our index ordering restriction. That is, some property, it can be very inefficient to enumerate all
there can be no indexes j E Ifi, k E If2, such that i < j k elements of the satisfying set and then pick out an element with
or i > j 2 k. Assuming both Gl and G2 are reduced, the the desired characteristics. Instead, we should specify this
graph resulting from these replacements is also reduced, and property in terms of a Boolean function, compute the Boolean
we can even avoid applying the reduction algorithm. While product of this function and the original function, and then use
this technique applies only under restricted conditions, we the procedure Satisfy-one to select an element. Finally, we
have found it a worthwhile optimization. can compute the size of the' satisfying set by an algorithm of
time proportional to the size of the graph (assuming integer
F. Satisfy operations of sufficient precision can be performed in constant
There are many questions one could ask about the satisfying time). In'general, it is much faster to apply this algorithm than
set Sf for a function, including the number of elements, a to enumerate all elements of the satisfying set and count them.
listing of the elements, or perhaps just a single element. As can The procedure Satisfy-one shown in Fig. 9 is called with
be seen from Table I, these operations are performed by the root of the graph and an array x initialized to some
algorithms of widely varying complexity. A single element arbitrary pattern of O's and 1's. It returns'the value false if the
can be found in time proportional to n, the number of function function is unsatisfiable (Sf = and the value true if it is. In
arguments, assuming the graph is reduced. Considering that the latter case, the entries in the array are set to a set of values
the value of an element in Sf is specified by a bit sequence of denoting some element in the satisfying set. This procedure
length n, this algorithm is optimal. We can list all elements of utilizes a classic depth-first search with backtracking scheme
Sf in time proportional to n times the number of elements, to find a terminal vertex in the graph having value 1. This
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 BRYANT: GRAPH-BASED ALGORITHMS 687

function Satisfy-one(v: vertex; var x: array[l * n] of integer): boolean

-
procedure Satisfy-all(i: integer; v: vertex; x: array[ I n] of integer):
begin begin
if v.value = 0 then return(false); {failure} if v.value = 0 then return; {failure}
if u.value = I then return(true); {success} if i = n + I and v.value = 1
x[i] := 0; then begin {success}
if Satisfy-one(v.low, x) then return(true); Print element x41],
I , x[n];
4i] := 1; return;
return(Satisfy-one(v.high, x)) end;
end; if v.index > i
Fig. 9. Implementation of Satisfy-one. then begin {function independent of x, }
x[i] := 0; Satisfy-all(i + 1, v, x);
.XLj
yril
J *=1
. - .Cn"tiCfv_nifi;
1, oUtisjJ-Ulk t[t -4 1, Y-el
1 11U, A}s
procedure will work on any function graph. However, when end
called on an unreduced function graph, this could require time else begin {function depends on xi}
x[i] := 0; Satisfy-all(i + 1, V.low, x);
exponential in n (consider a complete binary tree where only x4i] := 1; Satisfy-all(i + 1, v.high, x);
the final terminal vertex in the search has value 1). For a end;
reduced graph, however, we can assume the following end;
Fig. 10. Implementation of Satisfy-all.
property.
Lemma 3: Every nonterminal vertex in a reduced function traverses the graph in the manner of the procedure Traverse.
graph has a terminal vertex with value 1 as a descendant. The formula is applied only once for each vertex in the graph,
The procedure will only backtrack at some vertex when the and hence the total time complexity is O() GI). Once we have
first child it tries is a terminal vertex with value 0, and in this computed these values for a graph with root v, we compute the
case it is guaranteed to succeed for the second child. Thus, the size of the satisfying set as
complexity of the algorithm is O(n).
To enumerate all elements of the satisfying set, we can |Sy= °e * 2index(v) - I
perform an exhaustive search of the graph, printing out the
element corresponding to the current path every time we reach V. EXPERIMENTAL RESULTS
a terminal vertex with value 1. The procedure Satisfy-all As with all other known algorithms for solving NP-hard
shown in Fig. 10 implements this method. This procedure has problems, our algorithms have a worst case performance that
three arguments: the index of the current function argument in is unacceptable for all but the smallest problems. We hope that
the enumeration, the root vertex of the subgraph being our approach will be practical for a reasonable class of.
searched, and an array describing the state of the search. It is applications, but this can only be demonstrated experimen-
called at the top level with index 1, the root vertex of the tally. We have already shown that the size of the graph
graph, and an array with arbitrary initialization. The effect of representing a function can depend heavily on the ordering of
the procedure when invoked with index i, vertex v, and with the input variables, and that our algorithms are quite efficient
the array having its first i - 1 elements equal to b1, *, i as long as the functions are represented by graphs of
is to enumerate all elements in the set reasonable size. Hence, the major questions to be answered by
{(big **e, bi-,. x,,is, x")1 our experimental investigation are: how can an appropriate
input ordering be chosen and, given a good ordering, how large
fu =(bis*, bi-,, xi, , Xj)l} are the graphs encountered in typical applications?
...

As with the previous algorithm, this procedure will work for We have implemented the algorithms described in this paper
any function graph, but it could require time exponential in n and have applied them to problems in logic design verification,
for an unreduced graph regardless of the size of the satisfying test pattern generation, and combinatorics. On the whole, our
set (consider a complete binary tree with all terminal vertices experience has been quite favorable. By analyzing the problem
having value 0). For a reduced graph, however, we are domain, we can generally develop strategies for choosing a
guaranteed that the search will only fail when the procedure is good ordering of the inputs. Furthermore, it is not necessary to
called on a terminal vertex with value 0, and in this case the find the optimal ordering. Many orderings will produce
recursive call to the other child will succeed. Hence, at least acceptable results. Functions rarely require graphs of size
half of the recursive calls to Satisfy-all generate at least one exponential in the number of inputs, as long as a reasonable
new argument value to some element in the satisfying set, and ordering of the inputs has been chosen. In addition, the
the overall complexity is O(n* IS 1). algorithms are quite fast, remaining practical for graphs with
Finally, to compute the size of the satisfying set, we assign a as many as 20 000 vertices.
value c,, to each vertex in the graph according to the
v For this paper, we consider the problem of verifying that the
following recursive formula: implementation of a logic function (in terms of a combina-
1) If v is a terminal vertex: av, value(v).
= tional logic gate network) satisfies its specification (in terms of
2) If v is a nonterminal vertex Boolean expressions.) As examples we use a family of
arithmetic logic unit (ALU) designs constructed from 74181
g =
ctlow(,) 2 hindexghow(0)-vndex(u) + gh(v) . 2index(high(v)) index(v) and 74182 TTL integrated circuits [15]. The '181 implements
-

a 4-bit ALU slice, while the '182 implements a lookahead

where a terminal vertex has index n + 1. carry generator. These chips can be combined to create an
This computation can be performed by a procedure that ALU with any word size that is a multiple of 4 bits. An ALU

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 688 IEEE TRANSACTIONS ON COMPUTERS, VOL. C-35, NO. 8, AUGUST 1986

with an n bit word size has 6 + 2n inputs: 5 control inputs TABLE II

ALU VERIFICATION EXAMPLES
labeled m, s sI,S2, S3 to select the ALU function, a carry
input labeled cin, and 2 data words of n-bits each, labeled ao, Word Size Gates Patterns CPU Minutes A = B Graph
, an-, and bo, , b_-1. It produces n + 2 outputs: n 4 52 1.6 x 104 1.1 197
function outputs labeled fo, * * , fn- l, a carry output labeled 8 123 4.2 x 106 2.3 377
cout, and a comparison output labeled A = B (the logical AND 16 227 2.7 x 1011 6.3 737
32 473 1.2 x 1021 22.8 1457
of the function outputs). 64 927 2.2 x 1040 95.8 2897
For our experiments, we derived the functions for the two
chips from their gate-level descriptions and then composed Vertices
these functions to form the different ALU's according to the
chip-level interconnections in the circuit manual. We then 2000 1
compared these circuit functions to functions derived from
Boolean expressions obtained by encoding the behavioral
specification in the circuit manual. We succeeded in verifying 1500
ALU's with word sizes of 4, 8, 16, 32, and 64 bits. The
performance of our program for this task is summarized in
Table II. These data were measured with the best ordering we 1000
were able to find, which happened to be the first one we tried:
first the 5 control inputs, then the carry input, and then an
interleaving of the two data words from the least significant to 500
the most. In this table, the number of gates is defined as the
number of logic gates in the schematic diagrams for the two
chips times the number of each chip used. The number of
patterns equals the number of different input combinations. - 0 1 2 3 4 5 B 7
CPU time is expressed in minutes as measured on a Digital Input-Orderings: Bit Position
Equipment Corporation VAX 11/780 (a 1-MIP machine). The 1: m,so,sj,s2,s3,cin,aO,bO, * ,a,,- I b., 2: m,so,s,,s2,s3,cin,an ,b ,,I aobo
times given are for complete verification, i.e., to construct the 3: cin,ao,bo, **,an-1b, ,m,so,s1,s2,s3 4: m,so,sl,s2,s3,cin,ao,* ,an.lbo, ***,b,
functions from both the circuit and the behavioral descriptions Fig. 11. ALU output graph sizes for different input orderings.
and to establish their equivalence. The final column shows the
size of the reduced graph for the A = B output. In all cases, describing the function to be computed, and then read in the
this was the largest graph generated. successive bits of the two data words starting with the least
As can be seen, the time required to verify these circuits is significant bits. Hence, our bit-serial computer analogy
quite reasonable, in part because the basic procedures are fast. presented in Section III guides us to the best solution. The next
Amortizing the time used for memory management, for the best case tested occurred with the ordering: m, sO, SI, S2, S3,
user interface, and for reducing the graphs, each call to the cin, an- , bn- 1, * * *, ao, bo, i.e., the same as before but with
evaluation routines Apply-step and Compose-step requires the data ordered with the most significant bit first. This
around 3 ms. For example, in verifying the 64-bit ALU, these ordering represents an alternative but often successful strat-
two procedures were called over 1.6 x 106 times. The total egy: order the bits in decreasing order of importance. The ith
verification time grows as the square of the word size. This is bit of the output word depends more strongly on the ith bits of
as good as can be expected: both the number of gates and the the input words than any lower order bits. As can be seen, this
sizes of the graphs being operated on grow linearly with the strategy also works quite well. The next case shown is for an
word size, and the total execution time grows as the product of ordering with the control inputs last: cin, ao, bo, .-.,
these two factors. This quadratic growth is far superior to the anb-bn- 1, m, SO, s, 2, s3. This ordering could be expected to
exponential growth that would be required for exhaustive produce a rather poor result, since the outputs depend strongly
analysis. For example, suppose that at the time the universe on the control inputs. However, the complexity of the graphs
first formed (about 20 billion years ago [16]) we started still grows linearly, due to the fact that the number of control
analyzing the 32-bit ALU exhaustively at a rate of one pattern inputs is a constant. To explain this linear growth in terms of
every microsecond. By now we would be about half way the bit-serial processor analogy, we could implement the ALU
through! For the 64-bit ALU, the advantage over exhaustive with- the control inputs read last by computing all 32 possible
analysis is even greater. ALU functions and then selecting the appropriate result once
These ALU circuits provide an interesting test case for the desired function is known. The final case shows what
evaluating different input orderings, because the successive happens if a poor ordering is chosen, in this case the ordering
bits of the function output word are functions of increasingly m, so, sl, s2, s3, cin, ao, * an-b, I , bn_ . This ordering
more variables. Fig. 11 shows how the sizes of these graphs requires the program to represent functions similar to the
depend on the ordering of circuit inputs. The best case was function xl x"+ 1 + * + xn X2n considered in Section III
obtained for the ordering: m, srv , s, -, 5s3, ciin, af, bh, * *, with the same exponential growth characteristics.
an- Ib, 1. This ordering is also what one would choose for a These experimental results indicate that our representation
bit-serial implementation of the ALU: first read in the bits works quite well for functions representing addition and

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 BRYANT: GRAPH-BASED ALGORITHMS 689
logical operations on words of data, as long as we choose an structure. With such a structure, we could enhance the
ordering in which the successive bits of the input words are performance of the Apply procedure by maintaining a table
interleaved. Our representation seems especially efficient containing entries of the form (vl, V2, (op), u) indicating that
when compared to other representations of Boolean functions. the result of applying operation (op) to graphs with roots v1
For example, a truth table representation would be totally and V2 was a graph with root u. In this way we would exploit
impractical for ALU's with word sizes greater than 8 bits. A the information generated by previous invocations of Apply as
reduced sum-of-products representation of the most significant well as by the current one. These savings in overall storage
bit in the sum of two n-bit numbers requires about 2n+2 requirements and algorithm efficiencies would be offset
product terms, and hence a reduced sum-of-products represen- somewhat by a more difficult memory management problem,
tation of this circuit would be equally impractical. however.
Akers also saves storage by representing functions in
VI. CONCLUSION decomposed form. That is, we can represent the function
We have shown that by taking a well-known graphical flxi=g in terms of f and g (which may themselves be
representation of Boolean functions and imposing a restriction represented in decomposed form). Unfortunately, a given
on the vertex labels, the minimum-size graph representing a function can be decomposed in many different ways, and
function becomes a canonical form. Furthermore, given any hence this technique would not lead to a canonical form.
graph representing a function, we can reduce it to a canonical However, as noted in Section IV-E, there are certain instances
form graph in nearly linear time. Thus our reduction algorithm in which functions f and g can be composed in a straightfor-
not only minimizes the amount of storage required to represent a ward way by simply replacing each vertex representing the
function and the time required to perform symbolic operations composition variable xi with the graph for g. For such
on the function, it also makes such tasks as testing for decompositions, functions could be stored in decomposed
equivalence, satisfiability, or tautology very simple. We have form and expanded into canonical form dynamically as
found this property valuable in many applications. operations are performed on them. In some instances, the
We have presented a set of algorithms for performing a storage savings could be considerable. For example the graph
variety of operations on Boolean functions represented by our for the function
data structure. Each of these algorithms obeys an important Xi * X2n + X2 * X2n- 1I+ ***+ Xn Xn + I
closure property-if the argument graphs satisfy our ordering
restrictions, so does the result graph. By combining concepts requires a total of 2 n+1 vertices. This function can be
from Boolean algebra with techniques from graph algorithms, decomposed as a series of functions where f, = xn x, , l:
we achieve "a high degree of efficiency. That is, the perform-
fi =(Xi X2n -i+ 1+ XZ+1) lxi+l1=fi+l1
ance is limited more by the sizes of the data structures rather
than by the algorithms that operate on them. for n > i 2 1, and fi equals the desired function. Each of
Akers [17] has devised a variety of coding techniques to these functions can be represented by graphs with 6 vertices. It
reduce the size of the binary decision diagrams representing is unclear, however, how often such decompositions occur,
the output functions of a system. For example, he can how easy they ate to find, and how they would affect the
represent the functions for all 8 outputs of the 74181 ALU efficiency of the algorithms.
slice by a total of 35 vertices, whereas our representation APPENDIX
requires 918. Several of these techniques could be applied to
our representation without violating the properties required by THE COMPLEXITY OF INTEGER MULTIPLICATION
our algorithms. We will discuss two such refinements briefly. In this appendix, we prove that the functions representing
Most digital systems contain multiple outputs. In our the outputs of an integer multiplier provide a difficult case for
current implementation we represent each output function by a our representation, i.e., the graph sizes grow exponentially in
separate graph, even though these function may be closely the word size regardless of the ordering of the input variables.
related and therefore have graphs containing isomorphic Given that there are (2n)! possible orderings of the input
subgraphs. Alternatively, we could represent a set of functions variables, we could not hope to derive this result experimen-
by a single graph with multiple roots (one for each function.) tally, and hence we must provide a detailed proof.
Our -reduction algorithm could be applied to such graphs to Our proof is based on principles similar to those used in
eliminate any duplicate subgraphs and to guarantee that the proving area-time lower bounds on multiplier circuits [18],
subgraph consisting of a root and all of its descendants is a [19]. However, we must show not just that a large amount of
canonical representation of the corresponding function. For information must be transferred from the set of inputs to the
example, we could represent the n + 1 functions for the set of outputs in performing multiplication, but that certain
addition of two n-bit numbers by a single graph containing 9n individual outputs require high information transfer.
- 1 vertices (assuming the inputs are ordered most significant Consider a multiplier with inputs al, , an and bl, ** , bn
bits first), whereas representing them by separate graphs corresponding to the binary encoding of integers a and b with
requires a total of 3n2 + 6n + 2 vertices. Taking this idea to a, and b, being the least significant bits. This circuit has 2n
an extreme, we could manage our entire set of graphs as a outputs corresponding to the binary encoding of the product
single shared data structure, using an extension of the a- b, described by functions muli(a,, * * , a,, bi, * * *, b,) for
reduction algorithm to merge a newly created graph into this 1 c i c 2n. For a permutation ir of { 1, * * *, 2n }, let G(i, ir)

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 690 IEEE TRANSACTIONS ON COMPUTERS, VOL. C-35, NO. 8, AUGUST 1986

be a graph which for inputs xi, * X2ndenotes

, the function two sequences xl, * x, and xl', * x' leading to the same
MUli(Xr(1 * **, Xr(2n)) - vertex in G(i, ir) such that for some value j, 7r(j ) E Fi and xj
Theorem 2: For any 7r there exists an i, 1 c i c 2n such X'. Now consider the sequences xn l,
x x2" and x,'
that G(i, -x) contains at least 2n/8 vertices. x2'2n defined as
Proof: Informally, our proof proceeds as follows. If one
input (the "control") to a multiplier is a power of 2 then the Xk XkX/={0'
=
k
7r(j)+ 7(k) i +n+ 1
circuit acts as a shifter, transferring the bits of the other input 0, else.
(the "data") to the output with some offset. For example, if b Note that xk and x' equal 1 for exactly one value of k. The
= 2i, then sequences xl, , x2n and xl', , x2" lead to the same
[a . b={ aiij j<icj+n terminal vertex in G(i, ir), but
[a*b]1= else.
muli (XT(1), Xxr(2n)) = Xi
Graph G(i, ir) must contain enough vertices to encode all
values of ai-j for which ai-j occurs in the first half of the input while
sequence while bj occurs in the second. Furthermore, we can mulj (x,, * X (2n))= xi' *xi.
show that for any ordering of input variables, we can choose
which input (a or b) is control and which is data such that for This contradiction forces us to conclude that graph G(i, ir)
some output i, this undesirable splitting occurs for at least n/8 must contain at least 2qi vertices.
values of j. To get the final result, we need only show that for some
More formally, for permutation 7r let value of i, q, 2 n/8. This involves a counting argument
expressed by the following lemma.
t=l{jlcjcn, w(j)<n}I Lemma 4: Suppose A, B C { 1, * *, n } each contain at
i.e, the number of bits of argument a occurring in the first half least n/2 elements. For 1 c i c 2n - 1 let
of the input sequence. If t 2 n/2 define sets F and L as
qj=1{(a, b)la E A, b E B, a+b=i+1}1.
F={r(j)j1cjcn, r(j)Cn} then there is some i such that q, > n/8.
L={r(j)|n+1<j.2n, ir(j)>n}. Proof: Observe that the sets A and B each contain at least
n/2 elements, there are at least n2/4 ordered pairs (a, b) -with
That is, F represents those indexes of argument a occurring in a G A, b GE B. Hence,
the first half of the input sequence, while L represents those
indexes of b (with n added to them) occurring in the second 2n-1 n2
half. If t < n/2 then define F and L as qj= --

j=l
F= {r(j)Il.j1n, ir(j)>n} For some value of i, qi must be at least as large as the average
L= {I7r(j)In+1.j.2n, ir(j).n}. value of the qj's:
That is, F represents those indexes of b (with n added to them) 1 n2 n
D
occurring in the first half while L represents those indexes of a 2n-1 4 8
occurring in the second. In either case, the sets F and L will
each contain at least n/2 elements. We will consider the This theorem shows that for any ordering, some multiplier
elements of F to be data inputs and those of L to be control. output will have a graph of exponential size. This leaves open
Since multiplication is commutative, we are free to choose the possibility that for each output, there could be some
which argument is considered the control input and which is ordering giving a polynomial size graph for this output. We
considered the data in our proof. conjecture, however, that this is not the case, namely that for
For 1 c i c 2n - 1 define the set Fi as certain outputs (e.g., output n), the graph for this function is
of exponential size regardless of the ordering. A proof of this
Fi= {ij3i E F, k E L(j+k=i+n +1)} conjecture would require something stronger than our simple
and let qi = IFiI. That is, for output i, Fi represents those shifter argument. Such a proof would also lead to an
indexes of the data input occurring in the first half of the- input interesting area-time lower bound on circuits computing single
sequence such that the corresponding bits of the control input bits in the product of two binary numbers.
occur in the second half.
Now consider the set of sequences REFERENCES
[1] C. Y. Lee, "Representation of switching circuits by binary-decision
Si {XI, x,jx=0
XnI if r(j) E Fi}. programs," Bell. Syst. Tech. J., vol. 38, pp. 985-999, July 1959.
[2] S. B. Akers, "Binary decision diagrams," IEEE Trans. Comput.,
This set contains 2qi possible values for the first n inputs. We vol. C-27, pp. 509-516, June 1978.
claim that G(i, ir) must contain a unique vertex for each [3] M. R. Garey and D. S. Johnson, Computers and Intractibility: A
Guide to the Theory of NP-Completeness. New York: Freeman,
element of Si. If this were not the case, then we could choose 1979.

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BRYANT: GRAPH-BASED ALGORITHMS 691

[4] F. J. Hill and G. R. Peterson, Introduction to Switching Theory and [17] S. B. Akers, "Functional testing with binary decision diagrams," in
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1977. Randal E. Bryant (S'78-M'81) received the B.S.
[10] R. Brayton et al., Logic Minimization Algorithms for VLSI Synthe- degree in applied mathematics from the University
sis. Hingham, MA: Kluwer, 1984. of Michigan, Ann Arbor, in 1973, and the S.M.,
[11] C. E. Shannon, "A symbolic analysis of relay and switching circuits," E.E., and Ph.D. degrees in electrical engineering
Trans. AiEE, vol. 57, pp. 713-723, 1938. and computer science from the Massachusetts Insti-
[12] C. S. Wallace, "A suggestion for a fast multiplier," IEEE Trans. tute of Technology, Cambridge, in 1977, 1978, and
Electron. Comput., vol. EC-13, pp. 14-17, Jan. 1964. 1981, respectively.
[13] A. V. Aho, J. E. Hopcroft, and J. D. Ullman, The Design and From June, 1981 to August, 1984 he was an
Analysis of Computer Algorithms. Reading, MA: Addison-Wes- Assistant Professor of Computer Science at the
ley, 1974. California Institute of Technology, Pasadena. Since
[14] J. S. Jephson, R. P. McQuarrie, and R. E. Vogelsberg, "A three-level September, 1984 he has been an Assistant Professor
design verification system," IBM Syst. J., vol. 8, no. 3, pp. 178-188, of Computer Science and of Electrical and Computer Engineering at
1969. Carnegie-Mellon University, Pittsburgh, PA. His research and teaching
[15] TTL Data Book, Texas Instruments, Dallas, TX, 1976. interests include VLSI design, verification, and testing, as well as algorithms
[16] M. Rowan- Robinson, Cosmology. London: Oxford University and computer architecture.
Press, 1977. Dr. Bryant is a member of the Association for Computing Machinery.

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