UNIT-IV

TRANSISTOR CHARACTERISTICS
The Junction Transistor:
A junction transistor consists of a Silicon (or Germanium) crystal in which a layer of N type
Silicon is Sand witched (Placed) between two layers of P type Silicon (or Germanium). This
type of transistor is known as PNP transistor. Similarly, a layer of P type Silicon is Sand
witched (placed) between two layers of N type Silicon (or Germanium). This type of
transistor is known as NPN transistor. The two types of Transistor with circuit symbols are
shown below.

A BJT can be represented by two diodes which are connected back to back. When two diodes
are connected as shown in the equivalent circuit. It will not work as a BJT because

(i) There is no bonding force in between the two diodes

(ii) The Base width will become very large so that no charge carriers will be reaching the
collector.
(iii) The Three portions of a transistor are known as Emitter, Base and Collector.

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Emitter: E heavily doped medium space

Base: B lightly doped smaller space

Collector: C moderate doped largest space

Bipolar junction transistor is a device having both Majority and Minority Carriers.
BJT is Invented by William Schokley (1947), Bartain and Barden.
BJT is a Current Controlled Device. It is a Low input resistance device.
It is a Noisy device due to the presence of minority carrier.
Leakage current passed through the transistor due to the presence of minority charge carriers.
Emitter is heavily doped to inject the majority charge carriers into the base. Base is lightly
doped to reduce the recombination. Transistor action takes place in the base. Base is provided
smallest area to reduce the transist time.
Transist time: Time taken by charge carriers to move from E to C.
Collector is moderating doped. Collector is provided with largest area to overcome heat
dissipation.
In NPN transistor current is predominantly (mainly) by the flow of electrons. In PNP
transistor current is mainly due to both.
NPN transistor is superior to PNP transistor because μn ¿ μ p.
In a transistor, arranging the doping level of E, B, C in ascending order to the current
sequence is B, C, E. In a transistor, arranging the physical dimension of E,B,C in the
descending order or decreasing order the current sequence is C,E,B.
Emitter: The main function of this region is to supply majority charge carriers to the base
and hence it is more heavily doped in comparison to other regions.
Base: The middle section of the transistor is known as base. This is lightly doped and is very
thin as compared to either emitter or collector. So that it may pass most of the injected charge
carriers from the emitter to the collector.

Collector: The main function of the collector is to collect majority charge carriers through
the base. This is moderately doped.

In the most of the transistors, the collector region is made physically larger than the emitter
region. This is due to the fact that collector has to dissipate much greater power. Due to this
reason, collector and emitter terminals are not interchangeable.

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It should be remembered that a transistor is just like two diodes. The junction between emitter
and base may be called as emitter base diode or simply emitter diode. Similarly, the junction
between base and collector may be called as collector base diode or simply collector diode.

Thus the two diodes connected back to back form a transistor. There will be two depletion
regions at the two junctions of a transistor. The width of the two depletion layers will be
different because the regions are doped at different levels. In general, the depletion region
penetrates more deeply in to lightly doped materials. This, the depletion region at emitter
junction penetrates less in heavily doped emitter and more in base region. Similarly, the
depletion region at collector junction penetrates less in heavily doped collector and more in
base region. Under normal working conditions, the emitter base junction is forward biased
and collector base junction is reverse biased. This, the resistance of the emitter base diode is
very small as compared to collector base diode.

OPERATION OF PNP TRANSISTOR:

Under normal working conditions, emitter base junction is forward biased and collector base
junction is reverse biased. The holes of P region (emitter) are repelled by the positive
terminal of battery V EE . The Potential barrier at emitter base junction is reduced as it is
forward bias and hence these holes cross this junction and penetrate in to N region (base).
This constitutes the emitter current I E .

The width of base region is very thin and it is lightly doped and hence a very few parent of
holes recombine with the free electrons in base region. This constitutes the base current I B .
The remaining holes cross the base from enter into collector region. They are swept up by the
negative collector voltageV CC . This constitutes the collector current I C. In this the collector
current is slightly less than the emitter current because a very few percent of holes are lost in
recombination with free electrons in base region. The collector current is a function of emitter
current (i.e.) with the decrease or increase in emitter current, a corresponding change in
collector current.

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According to the above figure, I E =¿ I B + I C

CURRENT COMPONENTS IN A TRANSISTOR:

The following figure shows the various current components which flow across the forward
biased emitter junction and the reverse biased collector junction in PNP transistor. The
emitter current I E consists of hole current I PE due to holes crossing from emitter to base and
electron current I nE due to electrons crossing from base to emitter.

∴ Total current I E = I PE + I nE

I PE
The ratio of hole to electron currents ( ) crossing the emitter junction is proportional to
I nE
the ratio of the conductivity of the P type material to that of N type material. In a commercial
transistor, the doping of the emitter is made much larger than the doping of the base. Thus the
emitter current consists of almost entirely of holes.

A few of holes crossing the emitter junction ( J E ) combine with the electrons in N type base
and rest of them cross the collector junction ( J C ) of I PC is the hole current reaches the
collector junction ( J C ) than the current I PE−I PC leaving the base as indicated below.

If the emitter is open circuited, So that I E = 0 than I PC would be zero under this condition,
the base and collector act as a reverse biased diode and the collector current I C equals to
reverse saturation collector current ( I CO ) .

∴ In general I C = I PC + I CO and I E = I B + I C.

In general I PC = α I E

According to the above equation, α is always less than unity.

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∴ I C = I PC + I CO = α I E + I CO.

In general I B is expressed in micro amps and I CO also expressed in micro amps.

IC
∴ IC = α IE → α = IE
where α is the forward current amplification factor in CB
configuration.

Transistor Circuit Configurations: There are three types of circuit configurations for
operating a transistor.

1. Common Base (CB) Configuration.

2. Common Emitter (CE) Configuration.
3. Common Collector (CC) Configuration.

The term ‘Common’ means the transistor lead which is common to the input and the output
circuits. Under normal working condition, regardless the circuit configuration, the emitter
base junction is forward biased and Collector base junction is reverse biased.

1. Common Base (CB) Configuration: In this Configuration, the input signal is applied
between emitter and base while the output is taken from collector and base. As base is
common to both input and output circuits, hence the name common base configuration. The
following figure represents common base PNP transistor circuit.

Forward Current Amplification Factor (α ): When no input signal is applied, the ratio
of change in collector current to emitter current is the dc alpha (α dc) of a transistor.

α dc = I c /I e
When signal is applied, the ratio of change in collector current to change in emitter
current at constant collector to base voltage is the ac alpha (α ac ) a transistor.

α ac = ∆ I c /∆ I e
In general, α dc= α ac= α and practical values range from 0.9 to 0.99.

Total collector current I c= α I E + I CBO

I CBO is the reverse saturation collector current when emitter is open circuited.

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Common emitter configuration: In this configuration, input signal is applied between
base and emitter while the output is taken from collector with respect to emitter. As emitter is
common to both input and output circuits, hence the name common emitter configuration.
The following fig. represents common emitter P N P transistor circuit.

Forward current amplification factor ( β ): When no signal is applied, the ratio of

collector current is called ac beta ( β dc) of a transistor.

β dc = I c /I b
When signal is applied, the ratio of charge in collector current, the ratio of charge in
collector current to change in base current is called ac beta ( β ac) of a transistor.

β ac = ∆ I c /∆ I b
∴ In general, β dc = β ac = β usually β ranges from 20 to 500.
Relation Between α and β :

We know that α =¿ I c /I e and β = I c /I b

But I E = IB + I C.
Divide by I C on both sides we get

IE IB β
IC
=¿
IC
+1 → 1/α = 1¿ β + 1 →α = 1+ β

α
1/ β=¿ 1/α −1 → β=¿
1−α

Total collector current is to be calculated as follows.

In general I C =¿ α I E + I CBO

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IC = α ( I B + I C) + I CBO → IC (1-α ) = α IB + I CBO

α 1
IC =( 1−α ) IB + ( 1−α ) I CBO
α 1
But 1−α
=¿ β and 1−α
=¿ 1+ β

∴ I C =¿ β I B + (1+ β ) I CBO

1
1+ β 1+ β
[ 1−
β = 1+ β−β = 1 = 1+ β ]
1+ β

Common collector configuration: In this configuration, the input is applied between

base and collector while output is taken from emitter with respect to collector. As collector is
common to both input and output circuits, hence the name common collector configuration.
The following fig. represents common collector P N P Transistor circuit.

Forward current amplification factor (γ ): When no signal is applied, the ratio of

emitter current to the base current is called as de gamma (γ dc ) of a transistor.

γ dc = I e /I b

When signal is applied, the ratio of change in emitter current to the charge in base current is
called as ac gamma (γ ac ) of a transistor.

γ ac = ∆ I e /∆ I b

In general γ dc =γ ac = γ

Relation between α , β∧γ :

We know that, α =¿ I c /I e , β = I c /I b ,γ = I e /I b

I E = I B + I C.

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 IB IC 1 1
1= IE
+ IE
→
γ = 1 -α → γ =¿
1−α

1 γ −1
α =¿ 1- γ
→ α =¿
γ

1 1
We know that 1 -α = 1+ β →
1−α = 1 +β = γ

∴γ =1 + β or β=γ−1
1
∴γ = 1−α =1+β

Total emitter current: I E = I B + I C

and I C =¿ α I E + I CBO → I e (1−α ) = I b + I CBO

1 1
I e =¿ Ib + I → I e =¿(1 + β ) I b + (1 + β ) I CBO
1−α 1−α CBO

Transistor as an Amplifier:
Following figure shows the basic circuit of a transistor amplifier. Here the weak signal to be
amplified is applied between emitter and base and the output is taken across the load resistor
R L connected in the collector circuit.

Let V EE is not connected in the circuit. During the negative half cycle of the input signal, the
emitter base junction will be reverse biased. This is not desirable for amplification purpose,
the emitter base junction must be forward biased. For this purpose, a battery V EE is

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connected such that the magnitude of input circuit is always forward biased regardless of the
polarity of the signal is connected.

A small voltage change∆ V i between emitter and base causes a relatively large emitter
current change ∆ I E because the input circuit has low resistance. Now due to transistor
action, the change in emitter current causes almost the same change in collector current.
When the collector current flows through the load resistor R L , a large voltage is developed
across it. In this way, a weak signal applied at the input circuit appears in the amplified form
across the load.

∆ Ic
α = ∆ IE
→ ∆ Ic =α ∆IE

The change in output voltage across the load is given by

∆V o = R L .∆ I c =α RL ∆ I E

∆Vo
∴ Voltage amplification = A =
∆Vi

But ∆ V i = re ∆ I E
Where r e is the dynamic resistance of the emitter junction.

∆ V o α RL ∆ I E α RL
∴ A= = =
∆Vi re ∆ I E re

α RL
A=
re

According to the above equation, ‘A’ is always greater than unity. Thus transistor acts as an
amplifier.

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Characteristics of Common Base Circuit:
The circuit diagram for determining the V-I characteristics of a PNP transistor in Common
Base Configuration is shown below.

Input Characteristics:

The Curve between emitter current ( I E ) and emitter base voltage ( V EB) at constant collector
base voltage (V CB ) represents the input characteristics. For plotting the input characteristics
the collector base voltage (V CB ) is kept fixed. The emitter base voltage (V CB ) is varied with

the help of potential divider R 1 and emitter current ( I E ) is noted for each value of V EB . A

graph of I E against V EB is drawn. The curve is known as input characteristics. The

experiment is repeated for other fixed values of V CB . When V CB is equal to zero and the
emitter base junction is forward biased as shown in the following characteristics, the junction
behaves as a forward biased diode so that emitter current increases rapidly with small
increase in emitter base voltage. (When V CB is increased keeping V EB constant, the width of

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base region decreases. This effect results in an increase of I E . Therefore, the curves shift
towards the left as V CB is increased.

Input Resistance:
The ratio of change in V EB to the resulting change in I E at constant V CB is known as input
resistance.

∆ V EB
∴ ri = at constant V CB
∆ IE

Output characteristics:
A graph between collector current ( I C ¿ and collector to base voltage (V CB ¿ at constant input
current ( I E ¿ represents the output characteristics. For plotting o/p characteristic, the input
current ( I E ¿ is fixed. The collector to base voltage (V CB ) is varied with the help of potential
divider (R2) and collector current ( I C ¿ is noted for each value of V CB . A graph of I C against
V CB is drawn. This graph is known as output characteristics. The experiment is repeated for
other fixed values of emitter current ( I E ¿ .

Following points are noted from the characteristics.

1) In the active region, the collector current is almost independent of collector to base voltage
and depends only on the emitter current. The magnitude of collector current is slightly less
than the emitter current.

2) In the cutoff region, a small amount of collector current flows even when emitter current is
zero. This is the reverse saturation collector current ( I CBO).

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3) In the saturation region, the collector current ( I C ¿ flows even when V CB = 0. Actually in
PNP transistor, V CBis slightly positive in this region .Due to this large change in collector
current ( I C ¿ with a small change in collector base voltage.

Output resistance:
The ratio of change in V CBto the resulting change in I C at constant emitter current (I ¿¿ E)¿
is known as output resistance.

∆ V CB
∴ r o =¿ At I E = constant
∆ Ic

Characteristics of Common Emitter Circuit:

The circuit diagram for determining the V-I characteristics of a PNP transistor in common
emitter configuration is shown below.

Input Characteristics:
The curve between base to emitter voltage ( V BE) and base current ( I B) at constant collector to
emitter voltage¿) represents the input characteristics. For plotting the input characteristics, the
collector to emitter voltage (V CE) is kept fixed. The base to emitter voltage is varied with the
help of potential divider R1 and base current is noted for each vale of V CE . A graph of I B
against V BE is drawn. This graph is known as input characteristics. The experiment is
repeated for other fixed values ofV CE . When V CE is equal to zero, the emitter base junction is
forward biased and the junction behaves as a forward biased diode. Hence, the input
characteristics for V CE = 0 is similar to that of a forward biased diode. When V CE is increased,
the width of the depletion region at the reverse biased collector base junction will increase.
Resultant, the effective base width will decrease. Hence, this effect causes a decrease in the
base current. So, to get same value of I B as that forV CE =0 , V BEshould be increased.
Therefore, the characteristic shifts to the right as V CE increases.

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Input Resistance:
∆ V BE
∴ ri = at constant V CE
∆ IB

In this case, I Bincreases less rapidly with V BE as compared to CB configuration. Thus the r i
of CE configuration is higher than that of input characteristics CB configuration.

Output characteristics:

The graph is drawn between collector current ( I C ¿ and collector to emitter voltage ( V CE ¿ at
constant base current ( I B ¿ represents the output characteristics. For plotting o/p
characteristic, base current ( I B ¿ is kept constant. The collector to emitter voltage (V CE ) is
varied with the help of potential divider (R2) and collector current ( I C ¿ is noted for each
value of V CE . A graph of I C against V CE is drawn. This graph is known as output
characteristics. The experiment is repeated for other fixed values of base current ( I B ¿.

Following points are noted from the characteristics.

1) In the active region, the effect of V CE over I C is very small for small values of base current
while this effect increases for large values of base current.

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2) When V CE has very low value, the transistor is said to be saturated and it’s operated in the
saturation region.

3) In the cutoff region, a small amount of collector current flows even when base current is
zero. This is called I CEO. Since the main collector current is zero, the transistor is said to be
cutoff.

Output resistance:
The ratio of change in V CBto the resulting change in I C at constant emitter current (I ¿¿ E)¿
is known as output resistance.

∆ V CE
∴ ro= at I B = constant
∆ Ic

Different Modes of Operation of a Transistor:

There are three possible ways of biasing a transistor. These are called as modes of operation
of a transistor.

1. ACTIVE REGON: In this mode of operation, emitter base junction is forward biased
and collector base junction is reverse biased as shown below.

In this region, transistor acts as an amplifier or an oscillator.

2. SATURATION REGION: In this mode of operation, emitter base junction and

collector base junction both are forward biased as shown below.

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In this region, transistor acts as a closed switch.

3. CUT OFF REGION: In this mode of operation, emitter base junctions as well as
collector base junction both are reverse biased as shown below.

In this region, transistor acts as an open switch

Early Effect (or) Base Width modulation (or) Punch through (or) reach through:
Under normal operation of a transistor, the collector base junction is reverse biased. As the
reverse voltage increases, the depletion layer at the collector base junction also increases.
Since base is lightly doped, most of the depletion region penetrated in to the base only.
Resultant, effective base width decreases. The variation of effective base width by the
collector to base voltage is known as base width modulation or early effect. The decrease in
base width by increasing collector to base voltage has three following effects.

1) It reduces the recombination of electrons with holes in the base region. Hence, the current
gain ‘α ’ increases with an increase in collector to base voltage.

2) The concentration gradient of minority charge carriers increases in the base region and
hence injected hole current I PE (0) at J E in a PNP transistor increases.

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3) For extremely large collector to base voltages, the effective base width reduces to zero
causing breakdown in the transistor. This phenomenon is known as punch through.

Field Effect Transistor (FET):

Field Effect Transistor has the following advantages over a conventional Transistor.

1). The FET is a Uni polar device (i.e.) its operation depends upon the flow of majority
charge carriers only. The conventional transistor is a bipolar device (i.e.) its operation
depends on both the majority and minority charge carriers.

2). FET has high input resistance. (Thus FET is a voltage controlled device. Where as BJT
has low input resistance. Thus BJT is a current controlled device.

3). FET is less noisy than Conventional Transistor (because no junctions are present like
BJT).

4). FET has better thermal stability.

5).In integrated form; FET occupies less space than BJT.

6). FET has smaller size, longer life and high efficiency.

The main disadvantage of FET is its relatively small gain bandwidth product in comparison
with a conventional transistor.

There are two types of Field Effect Transistors.

1). Junction Field Effect Transistor (JFET)

2).Metal Oxide Semiconductor FET (MOSFET) or Insulated gate FET (IGFET)

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The Junction Field Effect Transistor (JFET) or N Channel JFET:

Construction:
It consists of a lightly doped N type Silicon bar. Two heavily doped P type Silicon materials
are diffused on both sides of the N type Silicon bar by which PN junctions are formed. The
Two heavily doped materials are joined together and is called gate. The ohmic contacts are
made at the two ends of a Semiconductor bar namely Source and Drain. The Source and
Drain may be interchangeable.

Source (S): Source is the terminal through which majority charge carriers enter into the
semiconductor bar.

Drain (D): Drain is the terminal through which majority charge carriers leaving from the
Semiconductor bar.

Gate (G): The two heavily doped P type materials are joined together and is called Gate.

Channel: Channel is the space through which majority charge carriers flow from Source to
Drain.

The structure of N channel JFET is shown below.

Operation:
Let no potential is applied between gate and sources and a potential V DSis applied
between drain and source. Now a current I D flows from drain to source which is maximum
because the channel is widest.

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 Let the gate is reverse biased by applying a voltage between gate and source. Due to
this gate bias, increases the depletion regions and thereby decreases the channel width. Due to
the flow of drain current, there will be a uniform voltage drop going from drain to source.
Consider the two points A and B in the channel. Let V A and V B be potential drops at these
points ( V A ¿ V B). So due to the progressive voltage drop along the length of the channel, the
reverse biasing effect on PN junction is stronger near to drain than source. Due to this
reason, the penetration of depletion layer at A is more than at B. Due to the decrease of
channel width, the drain current I D decreases. When gate bias is increased further, a stage is
reached where the two depletion regions almost touch with each other and the drain current
becomes almost zero. The drain current is a function of gate to source voltage. Since, the gate
to source voltage controls the drain current, FET is a voltage controlled device.

Characterstics of JFET:

The circuit symbol and polarity connections for a JFET are indicated below. The direction of
the arrow at the gate of the JFET indicates the direction in which gate current would flow of
the gate junction were forward biased

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Two types of characteristics of JFET namely Drain characteristics and transfer
characteristics. The curves between drain current and drain to source voltage for different
values of gate to source voltage are known as drain characteristics.

The curves between drain current and gate to source voltage for different values of drain to
source voltage are known as transfer characteristics.

Drain characteristics:
The characteristics can be drawn between drain current and drain to source voltage with gate
to source voltage as the parameter. First set the gate to source voltage is zero. Now increase
V DS in suitable steps and record the corresponding values of drain current at each step. Now
draw a graph between V DS and I D for V GS = 0. A similar procedure is used for different
values of V GS .

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As V DSis increased, the electrons flow from source to drain through channel and the drain
current increases linearly up to a point A. This shows that FET behaves like an ordinary
resistor till point A is reached. With the increase of I D , ohmic voltage drop takes place in the
semiconductor bar. This voltage drop reverse biases the gate junction resulting decreasing the
channel width. As the drain to source voltage is increased further, the drain current I D from
point A increases to point B which is called pinch-off point. The voltage corresponding to
point B is known as pinch-off voltage and is denoted byV P. At this voltage the channel is more or
less blocked. Pinch off voltage is defined as the minimum drain to source voltage where the drain
current approaches constant value. Beyond pinch off voltage, the channel width cannot be reduced.

Transfer characteristics:
The characteristics can be drawn between drain current and gate to source voltage with drain
to source voltage as the parameter. First set the drain to source voltage of suitable value. Now
increase V GS in steps and record the corresponding values of drain current at each step. Now
draw a graph between I D and V GS for suitable value ofV DS. A similar procedure is used for
different values ofV DS.

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FET parameters:

Drain resistance (r d ): It may be defined as the ratio of change in drain to source voltage
to change in drain current at constant gate to source voltage.

∆ V DS
∴ r D =¿ When VGS is constant
∆ID

Transconductance ( gm):
It may be defined as the ratio of change in drain current to change in gate to source voltage at constant
drain to source voltage.

∆ ID
∴ gm = whenV DS is constant
∆V GS

Amplification factor ( μ):

It may be defined as the ratio of change in drain to source voltage to change in gate to source
voltage at constant drain current.

∆ V DS
∴μ= when I D is constant
∆V GS

∆ V DS ∆ V DS ∆ I D
μ= =¿ * = r D ¿ gm
∆V GS
∆I D
∆V GS

∴ μ = r D ¿ gm

N channel enhancement MOSFET:

Construction:

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The N channel MOSFET consists of a lightly doped P type substance into which two heavily
doped n type regions are diffused as shown above. These N type regions will act as source
and drain which are separated by some distance. Now a thin layer of insulting silicon dioxide
(SiO2) is grown over the surface of the structure and holes are cut into the oxide layer through
which metal contacts for the source and drain are made. On SiO 2 layer, a conducting layer of
Al is coated over the entire channel region between source and drain. This layer constitutes
the gate.

Operation:
The metal area of the gate, the dielectric material SiO 2 and the semiconductor material (p type
substrate) form a parallel plate capacitor. When positive potential is applied to the gate with
respect to source, negative charges are induced on semiconductor side. These negative
charges induced on p type substrate form an inversion layer as shown below. This inversion
layer forms an effective N type channel. When the positive potential at the gate is increased,
the magnitude of the induced negative charges in the semiconductor increases. Thus, for a

22
constant drain to source voltage, the drain current has been enhanced by the application of
gate to source voltage. For this reason the MOSFET is termed as enhancement MOSFET.

Characteristics:
The following figures a and b represents the static drain characteristics and transfer
characteristics of n channel enhancement MOSFET.

Fig (a):- Static Drain Characteristics

Depletion MOSFET (N channel):

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Construction:

The N channel depletion MOSFET consists of a lightly doped p type substrate into which two
heavily doped N type regions are diffused as shown above. One more heavily doped N type
semiconductor is diffused in between two N type semiconductors as shown above. Now a
thin layer of insulating silicon dioxide (Sio 2) is grown over the surface of the structure and
holes are cut into the oxide layer through which metal contacts for the source and drain are
made on Sio2 layer, a conducting layer of Al is coated over the entire channel region between
source and drain. This layer constitutes the gate.

Operation:
The metal area of the gate, the dielectric material Sio 2 and the semiconductor channel (N
type) form a parallel plate capacitor. For the depletion mode, the gate is maintained at
negative potential while the drain is maintained positive potential.

When voltage between gate and source is zero, a significant amount of drain current flows for
a given amount of V DS like JFET. Let a negative voltage applied to the gate. In this case,
positive charges are induced in the channel due to capacitive effect. The induced positive

24
charges make the channel less conductive and the drain current drops as V GS is made more
negative.

A MOSFET of the depletion type may also be operated in an enhancement mode. It is only
necessary to apply a positive gate voltage so that negative charges are induced into the N type
channel. In this manner, the conductivity of the channel increases and the current rises above
I DSS .

Characteristics:
The following figures (a) and (b) represents Drain characteristics and Transfer characteristics of N
Channel Depletion MOSFET.

Figure (a): Drain Characteristics

Figure (b): Transfer Characteristics

Comparison between JFET and MOSFET:

 JFET gate is not insulated from channel. MOSFET gate is insulated from the channel.
 Channel and gate forms two PN junctions in JFET. Channel and gate forms a parallel
plate capacitor in MOSFET.
 JFET is having three leads where as MOSFET is having four leads.

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  JFET is operated in Depletion mode only where as MOSFET is operated in both
Depletion and Enhancement modes.
 JFET input impedance is high where as MOSFET input impedance is very high.
 JFET fabrication is complex and costly whereas MOSFET is easy to fabricate and
cheap.

Silicon Controlled Rectifier (SCR):

Construction: It is four layers, three junctions and three terminal device. The four layers are
alternate of P type and N type silicon. The three junctions are J1, J2 and J3. The three
terminals are Anode, Cathode and Gate. The function of Gate is switching of SCR. It
conducts in only one direction (i.e.) from anode to cathode and hence SCR is a unidirectional
device. As reverse saturation current in silicon is very small compared to Germanium, SCRs
are made up of Silicon instead of Germanium.
Operation: First no voltage applied at the Gate. If negative voltage applied at the anode and
positive voltage applied at the cathode then junctions J1 and J3 are reverse biased and
junction J2 is forward biased. Due to reverse biased junctions of J1 and J3, a very small
amount of current due to minority charge carriers flows through SCR and hence SCR is
cutoff. So SCR cannot conduct in reverse direction.
If positive voltage applied at the anode and negative voltage applied at the cathode then
junctions J1 and J3 are forward biased and junction J2 is reverse biased. Due to reverse
biased junction of J2, a very small amount current due to minority charge carriers flows
through SCR and hence SCR is cutoff. However when the anode voltage is increased to
Forward Break over Voltage (V FBO) then the junction J2 breaks down. Now SCR conducts
heavily and is said to be in ON state. Here SCR offers very small forward resistance. So,
voltage across it drops to a low value. Now the current flowing through SCR is limited only
by the power supply.
SCR can conduct in only forward direction and not conduct in reverse direction. Therefore,
SCR is a unidirectional device.
Two transistor representation of SCR: The operation of SCR may be explained by
dividing it into two transistors. PNP transistor Q 1 and NPN transistor Q2 as shown below.
From the figure that collector of each transistor is connected to base of other transistor.
A small gate voltage is applied such that gate is positive with respect to cathode. Due to this,
a small gate current flows through the base of Q 2. This increases its collector current. As the

26
collector current of Q2 is the base current of Q 1, the collector current of Q 1 also increases.
Now base current of Q2 increases. Therefore an increase in current of one transistor causes an
increase of current in the other transistor. This process is cumulative and both the transistors
are driven into saturation. Now heavy current flows through the SCR and hence SCR is in
ON condition.
Characteristics of SCR: A graph is drawn between anode voltage (V AK ) and anode current (
I A) at constant gate current ( I G). The V-I characteristics of SCR for I G=0 is shown below.
When the anode is positive with respect to cathode, the characteristic is known as forward
characteristic. When the supply voltage is increased from zero, a point A is reached where
SCR starts conducting. The voltage corresponding to point A is known as Forward break over
voltage (V FBO). At this voltage, junction J2 breaks and SCR conducts into ON state. Once
SCR starts conducting, the voltage across SCR suddenly drops as shown by dotted curve AB.
The current corresponding to point B is denoted by I H and is known as Holding current.
Holding current is the minimum current passing through the SCR at which SCR is turned off
from ON condition. Above holding current, SCR is in ON state and the current increases as
anode voltage increases.
When anode is negative with respect to cathode, the characteristic is known as reverse
characteristic. When the supply voltage is increased further from zero, at first the anode
current is small but at a particular voltage D, avalanche break down occurs and SCR starts
conducting in reverse direction. The voltage corresponding to the point D is known as
reverse break down voltage. SCR never works in reverse direction. Hence, SCR is a
unidirectional device.

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Unijunction Transistor (UJT):
The unijunction transistor consists of a lightly doped n-type silicon bar with a small piece of
heavily doped p-type material joined to one side. The concept is illustrated in Fig.17-l(a). The
end terminals of the bar are designated as base 1 and base 2 and the p-type region is termed
as emitter (E). Since the silicon bar is lightly doped it has a high resistance, and it can be
represented as two resistors, R B 1and R B 2. The sum of R B 1 and R B 2 is designated as R BB .The
p-type emitter forms a PN junction with the n-type silicon bar and this is represented by a
diode in the equivalent circuit.
.

28
With a voltage V BB applied as shown, the voltage at the junction of R B 1 and R B 2 is given by

If the emitter terminal is grounded, the PN junction is reverse biased and a small reverse
saturation emitter current I EO flows order of micro amps. According to the following
equation, I EO will be reduced when the emitter input voltage ( V EB 1) increased slowly from
zero.
I Eo=(V ¿ ¿ 1−V EB 1)/R D ¿ Where R D represents reverse biased diode resistance order of
mega ohms. No reverse or forward current will flow when equal voltage levels appears on
each side of the diode, With a further increase in V EB 1 , the PN junction becomes forward
biased and a forward emitter current I E begins to flow from the emitter terminal into the N
type Silicon bar. When this occurs, charge carriers are injected into the R B 1 region of the
semiconductor bar. Since the resistance of a semiconductor material is dependent upon
doping; the additional charge carriers cause the resistance of the R B 1 region to rapidly
decrease. With decrease in resistance, the voltage drop across R B 1 also decreases, causing the
PN junction to be more heavily forward biased. This results in a greater forward emitter
current and consequently more charge carriers are injected causing still further reduction in
the resistance of the R B 1 region as shown below.
I E =(V EB 1−V 1 )/R D Where R D represents forward biased diode resistance order of ohms.
As the emitter current increases, emitter to base1 voltage decreases according to the
following equation. V EB 1=V D +V 1
Due to increase of emitter current, voltage drop across R B 1 region decreases and resultant
V EB 1also decreases according to the above equation. Here Emitter current increases and V EB 1
decreases. Resultant UJT enters into negative resistance region. The circuit symbol for a UJT
is shown below. The arrowhead points in the conventional current direction for a forward
biased PN junction. In this case it points from the P type emitter to the N type semiconductor
bar.

29
 Circuit Symbol

Interbase Resistance: Total resistance of the semiconductor bar when emitter is open.
R BB=R B 1+ R B 2

Intrinsic Standoff ratio: It may be defined as ratio of R B 1 resistance to interbase

resistance. It is denoted by eta.
eta=R B 1 / RBB Its value is always lies between 0.56 and 0.75

UJT Characteristics: A graph is drawn between emitter current and emitter to base1
voltage
keeping V B 1 B 2 constant. When V B 1 B 2 equals to 20 V and V EB 1= 0, the emitter junction is
reverse biased and the reverse saturation emitter current I Eoflows as shown at point 1 on the
characteristics. As V EB 1 increases, the reverse saturation emitter current I Eo decreases. No
reverse saturation emitter current or forward current flows when V EB 1= V 1. This give point 2
on the characteristic. At the peak point where V EB 1=V D +V 1,the junction is just forward
biased and a very small forward emitter current I E flows through the diode. This is termed as
peak current. Up to this point, UJT is said to be operating in the cutoff region. When I E
increases beyond peak current, the device enters into negative resistance region. In which the
resistance of R B 1 region decreases rapidly and V EB 1falls to the valley voltage. At this point,
emitter current equals to the valley current. A further increase of emitter current causes the
device enters into the saturation region.

30
UJT as a Relaxation Oscillator:
The relaxation Oscillator using UJT which is meant for generating sawtooth waveform is
shown in figure. It consists of a UJT and a capacitor C E which is charged through R E as the
supply voltage V BB is switched ON. The voltage across the capacitor incereases exponentially
and when the capacitor voltage reaches the peak point voltage V P, the UJT starts conducting
and the capacitor voltage is discharged rapidly through EB1 and R1. After the peak point
voltage of UJT is reached, it provides negative resistance to the discharge path which is
useful in the working of the relaxation oscillator. As the capacitor voltage reaches to zero, the
device then cuts off and capacitor C E starts to charge again. This cycle is repeated
continuously generating a saw tooth wave acrossC E .

31
1) In most transistors, the collector region is made physically large than the emitter region
[A]
a) For dissipating heat b) to distinguish it from other regions
c) As it is sensitive to ultraviolet rays d) to reduce resistance in the path of flow of electrons
2) In a PNP transistor with normal bias, the emitter junction [C]
a) is always reverse biased b) Offers very high resistance
c) offers a low resistance d) remains open
3) The arrow head on a transistor symbol indicates [A]
a) Direction of electron current in the emitter b) Direction of hole current in the emitter
c) Diffusion current in the emitter d) Drift current in the emitter
4) The common emitter transistor circuit has [A]
a) High gain b) Low gain c) Negligible gain d) Zero gain
5) In a PNP transistor, the electrons flow into the transistor at the [D]
a) Collector only b) Emitter only c) Emitter and base d) Collector and base
6) The region in which both the collector junction & emitter junction are forward biased is
_________ [A]
a) Saturation region b) Cut off region c) Active region d) None of these
7) As the magnitude of the reverse collector junction voltage increases, the effective base
width_______ [B]
a) Increases b) decreases c) remain unaffected d) zero
8) What is the order of doping, from heavily to lightly doped, for each region? [B]
A) base, collector, emitter B) emitter, collector, base
C) emitter, base, collector D) collector, emitter, base
9) What is the ratio of I c ¿ I e? [D]

A) B) C) D) both b and c
10) In a transistor amplifier, the __________ junction is reverse biased. [A]
A) Collector base B) Emitter base C) CE base D) None of these
11) A transistor series voltage regulator is called emitter follower regulator because the
emitter of the pass transistor follows the ________________________ voltage. [B]
a) Output. b) Input. c) Base d) collector
12) In a bipolar junction transistor, the base region is made very thin so that [A]
a) Recombination in base region is minimum b) Electric field gradient in base is high.
c) Base can be easily fabricated. d) Base can be easily biased.

32
13) In which mode of BJT operation, both junctions are forward biased [B]
a) Active. b) Saturation. c) Cut off. d) Reverse active.
14) In CB configuration, the output V-I characteristics of a transistor are drawn by taking
[A]
a) VCB versus IC for constant IE. b) VCB versus IB for constant IE
c) VCE versus IC for constant IE. d) VCB versus IB for constant IE.
15) The β of a transistor may be determined directly from the curve plotted between [A]
a) VCE and IC for constant IB. b) VCE and IC for constant IE.
c) VCE and IE for constant IB. d) VBE and IE for constant VCE.
16) The emitter electric current in a junction with normal bias [B]
a) is almost equal to the base current. b) is equal to the sum of IB and IC.
c) changes greatly by a small changes in collector bias voltage. d) is equal to ICBO.
17) The arrowhead on the transistor symbol points in the direction of [D]
a) electron flow in the emitter region. b) minority carrier flow in the emitter region. c)
majority carrier flow in the emitter region. d) conventional electric current flow in the emitter
region.
18) The silicon transistors are more widely used than germanium transistors because [A]
a) they have smaller leakage current. b) they have better ability to dissipate heat.
c) they have smaller depletion layer. d) they have larger electric current carrying capacity.
19) For an NPN transistor in normal bias [D]
a) only holes cross the collector junction. b) only majority carriers cross the collector
junction. c) the emitter junction has high resistance. d) Je is forward biased and Jc is reverse
biased.
20) The most commonly used transistor circuit arrangement is [B]
a) Common base. b) Common emitter. c) Common collector. d) None of the above.
21) The emitter of a transistor is doped [A]
a) heavily. b) lightly. c) moderately. d) none of these
22) For a transistor action [D]
a) the base region must be very thin and lightly doped. b) Je must be forward biased and Jc
should be reverse biased. c) the emitter should be heavily doped. d) all of these.
23) The magnitude of electric current ICBO [C]

33
a) depends largely upon the emitter doping. b) depends largely upon emitter-base junction
base potential. c) increases with the increase in temperature. d) is generally greater in silicon
than in germanium transistor.
24) The electric current ICBO flows in the [B]
a) Emitter and Base leads. b) Collector and Base leads. c) Emitter and Collector leads. d)
None of them.
25) An electric current ratio of IC / IE is usually less than one and is called [C]
a) β. b) θ. c) α. d) ω.
26) In CE configuration, the input V-I characteristics are drawn by taking [D]
a) VCE versus IC for constant value of IE. b) VBE versus IE for constant value of VCE.
c) VBE versus IB for constant value of IC. d) VBE versus IB for constant value of VCE.
27) Leakage electric current in CE configuration is [A]
a) very high. b) very small. c) normal. d) not present.
28).The DC electric current gain in common collector configuration is given by [B]
a) α. b) β + 1 c) β d) α - 1
29) The leakage electric current ICBO flows in [D]
a) the emitter, base and collector leads. b) the emitter and base leads.
c) the emitter and collector leads. d) the base and collector leads.
30) Early effect in BJT refers to [C]
a) Avalanche breakdown. b) Thermal breakdown c) base narrowing d) Zener breakdown.
31) The emitter of the transistor is generally doped the heaviest because it [B]
a) has to dissipate maximum power. b) has to supply the charge carriers.
c) is the first region of transistor d) must possess low resistance.
32) In a properly biased NPN transistor most of the electrons from the emitter [C]
a) recombine with holes in the base. b) recombine in the emitter its self.
c) pass through the base to the collector. d) are stopped by the junction barrier.
33) The following relationship between α and β are correct except [B]
a) β = α / (1 - α). b) α = β / (1 - β). c) α = β / (1 + β). d) 1 - α = 1 / (1 + β).
34) Which of the following transistor configuration circuit is much less temperature
dependent? [C]
a) Common base. b) Common emitter. c) Common collector. d) None of the above.
35) The collector characteristics of a CE connected transistor may be used to find its [C]
a) input resistance. b) base current. c) output resistance d) voltage gain

34
36) The value of total collector electric current in a CB circuit is [B]
a) IC = αIE. b) IC = αIE + ICO. c) IC = αIE - ICO. d) IC = βIE.
37) In a transistor amplifier, the reverse saturation electric current ICO [A]
a) Double for every 10° rise in temperature. b) Double for every 1° rise in temperature.
c) Double for every 5° rise in temperature. d) Increase linearly with the temperature.
38) The CE amplifier circuit is preferred over CB amplifier circuit because they have [B]
a) Lower amplification factor. b) Larger amplification factor.
c) High input resistance and low output resistance. d) None of these.
39) A transistor has how many PN junctions? [B]
a) 1 b) 2 c) 3 d) 4
40) What is one important thing transistors do? [A]
a) Amplify weak signals. b) Rectify line voltage. c) Step - down voltage. d) Emit light.
41) In an NPN transistor, the majority charge carriers in the emitter are [A]
a) Free electrons. b) Holes. c) Neither. d) Both.
In an NPN transistor, the majority current carriers are electrons. In a PNP transistor, the
majority current carriers are holes.
42) The emitter diode is usually [A]
a) Forward biased. b) Reverse biased. c) Non conducting. d) Operating in the breakdown
region.
43) For normal operation of a transistor, the collector diode has to be [B]
a) forward biased. b) Reverse biased. c) Non conducting d) operating in the breakdown
region.
44) The base of an NPN transistor is thin and [B]
a) heavily doped. b) lightly doped. c) metallic. d) doped by a pentavalent material.
45) Most of the electrons in the base of an NPN transistor flow [B]
a) out of the base lead b) into the collector. c) into the emitter. d) into the base supply.
46) Most of the electrons in the base of an NPN transistor do not recombine because they
[A]
a) have a long lifetime. b) have a negative charge.
c) must flow through the base. d) flow out of the base.
47) The β of a transistor is the ratio of the
a) Collector current to Emitter current. b) Collector current to base current.
c) Base current to Collector current. d) Emitter current to Collector current.
48) Increasing the collector supply voltage will increase [D]
35
a) Base current. b) Collector current. c) Emitter current. d) None of these
49) The fact that there are many free electrons in a transistor emitter region means the emitter
is B]
a) Lightly doped. b) Heavily doped. c) Undoped. d) None of the above.
50) In a normally biased NPN transistor, the electrons in the emitter have enough energy to
overcome the barrier potential of the [A]
a) Base - Emitter junction. b) Base - collector junction
c) Collector - Base junction. d) Recombination path.
51) What is the most important fact about the collector current? [D]
a) It is measured in milli amperes. b) It equals the base current divided by the current gain.
c) It is small. d) It approximately equals the emitter current.
52) In a pnp transistor, the majority charge carriers in the emitter are [B]
a) Free electrons. b) Holes. c) Neither. d) Both.
53) If the current gain is 100 and the collector current is 10 mA, the base current is [B]
a) 10 μA. b) 100 μA. c) 1amp. d) 10 A.
54) The collector - emitter voltage is usually [A]
a) less than the collector supply voltage. b) Equal to the collector supply voltage.
c) more than the collector supply voltage. d) None of these.
55) The power dissipated by a transistor approximately equals the collector current times
[B]
a) Base - Emitter voltage. b) Collector - Emitter voltage. c) Base supply voltage. d) 0.7 V.
56) In the active region, the collector current is not changed significantly by [A]
a) Base supply voltage. b) Base current. c) Current gain. d) Collector resistance.
57) The current gain of a CB transistor is defined as the ratio of the collector current to the
[B]
a) Base current. b) Emitter current. c) Supply current. d) Collector current

58) ____________________________ (β +1)

59) To bias the transistor in saturation region, the emitter-base junction is ___________
biased and the collector-base junction is _____________ biased. (Forward, forward)
60) In common-base configuration of a transistor, when the reverse bias voltage is increased,
the width of the depletion region also increases. This is called
_____________________. (Early effect (or) Base Width Modulation)

36
61) ____________________ configuration is widely used amongst three transistor
configurations. (Common Emitter)
62) Field effect transistor (FET) operates on [A]
A) Majority charge carriers only. B) Minority carries only. C) Positive charged ions only. D)
On both majority and minority carriers
63) How will electrons flow through a p-channel JFET? [D]
A) From source to drain. B) From source to gate.
C) From drain to gate. D) From drain to source.
64) When VGS = 0 V, a JFET is [C]
A) An analog device. B) Cut off. C) Saturated. D) An open switch
65) When the JFET is no longer able to control the current, this region is called the [A]
A) Breakdown region. B) Depletion region. C) Saturated point. D) pinch-off region.
66) A JFET has disadvantage of [B]
A) being noisy. B) Having small gain-bandwidth product.
C) Possessing positive temperature coefficient. D) Having low input impedance.
67) A JEFT can operate in [B]
A) Enhancement mode only. B) Depletion mode only.
C) Depletion and enhancement mode only. D) None of these.
68) For a JEFT, when VDS is increased beyond the pinch-off voltage, the drain electric current
[C]
A) Increased. B) Decreases. C) remains constant. D) First increase and then decreased.
69) In N channel JFET, if the gate voltage Vgs is made more negative, then [D]
A) Channel conductivity increases. B) Depletion region decreases.
C) Channel electric current increases. D) None of the above
70) When a reverse bias is applied to gate of JFET the depletion region width [B]
A) is uniform in the channel. B) is wider near the drain and tapers near source.
C) is wider near the source and tapers near the drain. D) None of the above.
71) The gate controls [D]
A) The width of the channel. B) The drain current. C) The gate voltage. D) all of them.
72) Which of following is not an essential element of a DC power supply? [D]
A) Rectifier. B) Voltage regulator. C) Filter. D) Voltage amplifier.
73) Input impedance of MOSFET is [B]
A) less than of FET but more than BJT. B) More than that of FET and BJT.
C) more than that of FET but less than BJT. D) less than that of FET and BJT.
37
74) Which of following is the fastest switching device? [C]
A) JFET. B) Triode. C) MOSFET. D) BJT.
75) A D - MOSFET can operate in the [C]
A) Depletion - mode only. B) Enhancement - mode only.
C) Depletion - mode or enhancement - mode. D) Low - impedance.
76) CMOS stands for [D]
A) Common MOS. B) Active - load switching.
C) P - channel and n - channel devices. D) Complementary MOS.
77) Which of the following is expected to have highest input impedance? [A]
A) MOSFET. B) JEFT amplifier C) CE bipolar transistor. D) Common collector bipolar
transistor.

38