Coding and Error Control

Chapter 8
Coping with Data Transmission
Errors
n Error detection codes
n Detects the presence of an error
n Automatic repeat request (ARQ) protocols
n Block of data with error is discarded
n Transmitter retransmits that block of data
n Error correction codes, or forward
correction codes (FEC)
n Designed to detect and correct errors
Error Detection Probabilities
n Definitions
n Pb : Probability of single bit error (BER)
n P1 : Probability that a frame arrives with no bit
errors
n P2 : While using error detection, the probability that
a frame arrives with one or more undetected errors
n P3 : While using error detection, the probability that
a frame arrives with one or more detected bit errors
but no undetected bit errors
Error Detection Probabilities
n With no error detection

P1 = (1 - Pb )
F

P2 = 1 - P1
P3 = 0
n F = Number of bits per frame
Example
n BER=10-6
n Frame length 1000-bit on a continuously used 64Kbps
communication channel
n User requires that the there can be a maximum of 1 frame
error per day. Can this line be used?
n 64000*60*60*24/1000=5.529*106 packets / day
n Probability of 1 packet being faulty
n P2=1/5.529*106 = 0.18 * 10-6
n requirement we need to meet
n Since Pb =10-6 , then P1= (1- Pb)F = 0.999
n P2= 1- P1 = 10-3
n offered by the system
Finding and Fixing Errors
n The main purpose of error detection and
correction is to create ”redundant bits" in
the data to improve transmission
performance.
n Redundant bits increase the amount of data
sent and thus increase the bandwidth
requirement.
n Reduces bandwidth efficiency for high SNR
n Provides very good communication
performance for low SNR
Error Detection Process
n Transmitter
n For a given frame, an error-detecting code (check bits)
is calculated from data bits
n Check bits are appended to data bits
n Receiver
n Separates incoming frame into data bits and check bits
n Calculates check bits from received data bits
n Compares calculated check bits against received check
bits
n Detected error occurs if mismatch
Error Detection Process
Parity Check
n Parity bit appended to a block of data
n Even parity
n Added bit ensures an even number of 1s
n Odd parity
n Added bit ensures an odd number of 1s
n Example, 7-bit character [1110001]
n Even parity [11100010]
n Odd parity [11100011]
n Cannot find the error if there are 2
erroneous bits
Cyclic Redundancy Check (CRC)
n Transmitter
n For a k-bit block, transmitter generates an (n-k)-
bit frame check sequence (FCS)
n Resulting frame of n bits is exactly divisible by
predetermined number
n Receiver
n Divides incoming frame by predetermined
number
n If no remainder, assumes no error
Modulo 2 Arithmetic
n Addition (XOR process)
(X) 10110100
(Y) 00101010 +
(Z) 10011110
CRC using Modulo 2 Arithmetic
n Exclusive-OR (XOR) operation
n Parameters:
n T = n-bit frame to be transmitted
n D = k-bit block of data; the first k bits of T
n F = (n – k)-bit FCS; the last (n – k) bits of T
n P = pattern of n–k+1 bits; this is the predetermined
divisor
n Q = Quotient
n R = Remainder
CRC using Modulo 2 Arithmetic
n For T/P to have no remainder, start with
n-k
T =2 D+F
n Divide 2n-kD by P gives quotient and
remainder
n-k
2 D R
=Q+
P P
n Use remainder as FCS
n-k
T =2 D+R
CRC using Modulo 2 Arithmetic
n Does R cause T/P have no remainder?
T 2n-k D + R 2n-k D R
= = +
P P P P
n Substituting,
T R R R+R
=Q+ + =Q+ =Q
P P P P
n No remainder, so T is exactly divisible by P
Example
n Message D = 1010001101 (10-bit)
n Pattern P = 110101 (6-bit)
n FCS R = ?
n Since P is 6-bit, R must be 5-bit. n =
15, k = 10 and ( n-k ) = 5
n First, the message is multiplied by D 25
n 100000 x 1010001101 = 101000110100000
CRC using Polynomials
n All values expressed as polynomials
n Dummy variable X with binary coefficients

X n - k D( X ) R( X )
= Q( X ) +
P( X ) P( X )
T ( X ) = X n - k D( X ) + R( X )
Example
n Message D = 1010001101 à
(x)=x9+x7+x3+x2+1
n Pattern P = 110101 à
P(x)=x5+x4+x2+1
n FCS R = 01110 à R(x)=x3+x2+x
CRC using Polynomials
n Widely used versions of P(X)
n CRC–12
n X12 + X11 + X3 + X2 + X + 1
n CRC–16
n X16 + X15 + X2 + 1
n CRC – CCITT
n X16 + X12 + X5 + 1
n CRC – 32
n X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10 + X8 + X7 + X5 +
X4 + X2 + X + 1
CRC using Digital Logic
n Dividing circuit consisting of:
n XOR gates
n Up to n – k XOR gates
n Presence of a gate corresponds to the presence of a
term in the divisor polynomial P(X)
n A shift register
n String of 1-bit storage devices
n Register contains n – k bits, equal to the length of
the FCS
Digital Logic CRC
Wireless Transmission Errors
n Error detection requires retransmission
n Detection inadequate for wireless
applications
n Error rate on wireless link can be high, results
in a large number of retransmissions
n Long propagation delay compared to
transmission time
Block Error Correction Codes
n Transmitter
n Forward error correction (FEC) encoder maps
each k-bit block into an n-bit block codeword
n Codeword is transmitted; analog for wireless
transmission
n Receiver
n Incoming signal is demodulated
n Block passed through an FEC decoder
Forward Error Correction Process
FEC Decoder Outcomes
n No errors present
n Codeword produced by decoder matches
original codeword
n Decoder detects and corrects bit errors
n Decoder detects but cannot correct bit
errors; reports uncorrectable error
n Decoder detects no bit errors, though errors
are present
Block Code Principles
n Hamming distance – for 2 n-bit binary sequences,
the number of different bits
n E.g., v1=011011; v2=110001; d(v1, v2)=3
n Redundancy – ratio of redundant bits to data bits
n Code rate – ratio of data bits to total bits
n Coding gain – the reduction in the required Eb/N0
to achieve a specified BER of an error-correcting
coded system
Block Code Principles
n For k = 2 and n = 5 the following mapping can be made
Data Block Code Block
00 00000
01 00111
10 11001
11 11110

n The bit sequence received by the receiver is 00100

n Can this error be fixed?
Block Code Principles
n There are 28 invalid codes
Hamming Code
n Designed to correct single bit errors
n Family of (n, k) block error-correcting codes with
parameters:
n Block length: n = 2m – 1
n Number of data bits: k = 2m – m – 1
n Number of check bits: n – k = m
n Minimum distance: dmin = 3
n Single-error-correcting (SEC) code
n SEC double-error-detecting (SEC-DED) code
Hamming Code Process
n Encoding: k data bits + (n -k) check bits
n Check bits are placed in bit positions that are
the power of 2 in the frame.
n Decoding: compares received (n -k) bits
with calculated (n -k) bits using XOR
n Resulting (n -k) bits called syndrome word
n Syndrome range is between 0 and 2(n-k)-1
n Each bit of syndrome indicates a match (0) or
conflict (1) in that bit position
Example
Example
Block Interleaving
n Data written to and read from memory in different
orders
n Data bits and corresponding check bits are
interspersed with bits from other blocks
n At receiver, data are deinterleaved to recover
original order
n A burst error that may occur is spread out over a
number of blocks, making error correction
possible
Block Interleaving
Automatic Repeat Request
n Mechanism used in data link control and
transport protocols
n Relies on use of an error detection code
(such as CRC)
n Flow Control
n Error Control
Flow Control
n Assures that transmitting entity does not
overwhelm a receiving entity with data
n Protocols with flow control mechanism allow
multiple PDUs in transit at the same time
n PDUs arrive in same order they’re sent
n Sliding-window flow control
n Transmitter maintains list (window) of sequence
numbers allowed to send
n Receiver maintains list allowed to receive
Flow Control
n Reasons for breaking up a block of data
before transmitting:
n Limited buffer size of receiver
n Retransmission of PDU due to error requires
smaller amounts of data to be retransmitted
n On shared medium, larger PDUs occupy
medium for extended period, causing delays at
other sending stations
Flow Control
Error Control
n Mechanisms to detect and correct
transmission errors
n Types of errors:
n Lost PDU : a PDU fails to arrive
n Damaged PDU : PDU arrives with errors
Error Control Requirements
n Error detection
n Receiver detects errors and discards PDUs
n Positive acknowledgement
n Destination returns acknowledgment of received, error-
free PDUs
n Retransmission after timeout
n Source retransmits unacknowledged PDU
n Negative acknowledgement and retransmission
n Destination returns negative acknowledgment to PDUs
in error