Functional Coverage in System Verilog
Functional Coverage in System Verilog
Verification
Faisal Manzoor
[email protected]
2025
Introduction
This document expands upon the concept of coverage in design verification by diving into
advanced topics like bin creation, instance coverage, transition coverage, cross coverage,
and filters in cross coverage. Real-world analogies and examples are provided for better
understanding.
Functional coverage ensures not just code execution, but that key features and scenarios
are actually exercised. It includes:
Analogy
Coverpoint is like noting down which single students raised their hand. Cross cov-
erage checks who raised hands together. Transition coverage observes the sequence
of who raised hands. Instance coverage checks which student groups (e.g., different
classes) participated.
1
2 Types of Bin Creation
In SystemVerilog, bins determine how values are grouped and monitored in coverage.
3 Instance Coverage
Instance coverage keeps coverage results separate for each covergroup instantiation. This
is essential when covergroups are used in different blocks or modules.
Listing 2: Per-instance Coverage Example
class env ;
covergroup cg @ ( posedge clk );
coverpoint data ;
endgroup
cg cg_inst1 , cg_inst2 ;
function new ;
cg_inst1 = new ();
cg_inst2 = new ();
endfunction
endclass
Transition bins monitor specific sequences of values. They’re useful to validate protocols
and FSM state changes.
Listing 3: Transition Coverage Example
coverpoint state {
bins idle_to_busy = (0 = > 1);
bins full_seq = (0 = > 1 = > 2);
}
Analogy
Think of transition bins like a traffic light sequence. You want to confirm the
system goes from RED to GREEN to YELLOW in order.
5 Cross Coverage
Cross coverage tracks all combinations of two or more coverpoints. This is crucial when
the interaction between multiple variables is significant.
Listing 4: Cross Coverage Example
covergroup cg ;
coverpoint a ;
coverpoint b ;
cross a , b ;
endgroup
Sometimes, not all combinations in a cross are valid or important. Filters like ‘ignoreb ins‘and‘illegalb ins‘
• illegal bins: Marks illegal value pairs — if hit, they flag a verification error.
cross a , b {
ignore_bins ignore01 = binsof ( a ) intersect {1} && binsof ( b ) intersect {0}
Conclusion
Advanced coverage techniques are essential to achieve high-quality verification and ensure
that both design functionality and corner cases are exhaustively validated.