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Imp Questions DCS

The document outlines a series of questions and tasks related to Digital Circuits and Systems, covering topics such as binary number conversion, Boolean algebra simplification, circuit design, and various types of flip-flops and counters. It includes exercises for implementing functions using NAND and NOR gates, designing combinational circuits, and understanding digital logic families. Additionally, it addresses the need for analog to digital converters and the use of HDL in circuit design.

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P Kumar
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6 views4 pages

Imp Questions DCS

The document outlines a series of questions and tasks related to Digital Circuits and Systems, covering topics such as binary number conversion, Boolean algebra simplification, circuit design, and various types of flip-flops and counters. It includes exercises for implementing functions using NAND and NOR gates, designing combinational circuits, and understanding digital logic families. Additionally, it addresses the need for analog to digital converters and the use of HDL in circuit design.

Uploaded by

P Kumar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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IPS Academy

Institute of Engineering and Science, Indore


(A UGC Autonomous Institute, Affiliated to RGPV Bhopal)
Department of Electronics & Communication Engineering

Sub: Digital Circuits & System

Unit 1

Q.1 Express the following unsigned decimal numbers in binary, octal, and hexadecimal: 225.5,
67.25, 49, 10.1, 0.2

Q.2 Simplify the following Boolean function to (1) a sum of products form (2) a product of sums
form:
f1(A, B, C, D) = ABC + ABD + BCD

Q.3 Explain Duality and Demorgan’s theorem in brief.

Q.4 Implement y=AB’+CD’ with the help of NAND and NOR gate.

Q.5 Perform 11101010-1101 using 1’s and 2’s complement method.

Q.6 Simplify the following Boolean Function by using the tabulation/ Quine Mc-Cluskey
method
F(A, B, C, D)= ∑(0,1,2,8,10,11,14,15)

Q.7 Implement the following function with NAND gate and NOR gate.
F(x, y, z) = ∑m( 0, 3,7)

Q.8 Prove the universality of NAND and NOR gate.

Q.9 Simplify the following Boolean Function by using the K-map


F(A, B, C, D)=p M(3,4,5,6,7,9,12,13)

Q.10 Draw truth tables for the following


a) Excess-3 code b) BCD code c) Gray code d) Binary code

Unit 2

given by S = A ⊕ B ⊕ C, with a carry of C = AB + BC + CA.


Q.1 Show that if A, B, C are three binary variables that need to be added, the sum of the three is
Q.2 Design a combinational circuit with three inputs, x, y, z, and three outputs, A, B, C. When
the binary input is 4, 5, 6, or 7, the binary output is 2 less than the binary input. When the binary
input is 0, 1, 2, or 3, the output is 4 more than the binary input.

Q.3 Design a full adder using two half adders and a OR gate.

Q.4 Design a BCD to excess-3 code converter circuit and draw the logic diagram

Q.5 Using 4X1 MUX implement f(A,B,C)=∑(1,3,5,6)

Q.6 Implement a full subtractor circuit with a decoder.

Q.7 Simplify the Boolean Function F = A'B'CD + AB'CD'+ A'BCD + AB'C' D' +
ABCD+A'B'C'D'
using a suitable decoder.

Q.8 Implement the following function with suitable 4:1multiplexer


F(x, y, z) = ∑m( 0, 6,7)

Q.9 Draw and explain 4:2 priority encoder in brief.

Q.10 Design a full adder circuit using 8;1 multiplexer

Q.11 Explain 4 bit parallel adder with look ahead carry generator.

Q.12 Explain 4 bit parallel adder/ subtractor circuit.

Q. 13 Design a BCD adder.

Unit 3

Q.1 Draw a neat diagram of master slave JK flip flop. Explain how race around condition is
avoided using master slave JK flip flop. (CO3, PO1)

Q.2 Design a conversion logic to convert JK flip flop to a D flip flop. (CO3, PO1)

Q.3 Explain the operation of BCD counter. (CO3, PO1)

Q.4 Design a 4-bit bidirectional shift register with parallel load. (CO3, PO1)
Q.5 The content of 4-bit shift register is initially 1001. The register is shifted 6 times to right
with serial input being 101101. What is the content of the register after each shift? Justify your
answer. (CO3, PO1)

Q.6 Design a asynchronous decade counter with T flip flop. (CO3, PO1)

Q.7 Design a 3 bit asynchronous up down counter. (CO3, PO1)

Q.8 Design a Mod 12 asynchronous up counter. (CO3, PO1)

Q.9 Design a counter for the following using JK flip flop. Avoid lock out condition.
0→2→4→6→7→0 (CO3, PO1)

Q.10 Design 3 bit synchronous up down counter. (CO3, PO1)

Unit 4

Q. 1 What are the advantages of TTL circuits? Draw a circuit diagram of a two input TTL
NAND gate and explain its operation.

Q. 2 What are the advantages and disadvantages of CMOS logic family?

Q. 3 Explain the architecture of FPGA.

Q. 4 What is the difference between RAM and ROM

Q. 5 Differentiate static and dynamic RAM.

Q. 6 Define all characteristics of digital ICs.

Q.7 Design the basic gate of RTL, DTL, TTL, ECL and CMOS logic families and explain its
working.

Q.8 Write a short note on the concept of PAL, PLA and PROM

Q.9 what is a programmable logic device? What is the advantage of using PLDs in the design of
digital syatem

Q.10 what is the architectural difference between PAL, PLA and PROM

Q.11 State advantages of semiconductor memories

Q.12 Explain the internal organization of RAM

Unit 5
Q. 1 What is the need of analog to digital converter and digital to analog converter?

Q.2 Discuss 3 bit analog to digital Flash type converter.

Q.3 Explain HDL. What are the advantages HDL.

Q.4 Write a VHDL program for a 3 bit full adder circuit.

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