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Unit IO-2b

The document discusses I/O basics, including modes of data transfer between the CPU and I/O devices: Programmed I/O, Interrupt-driven I/O, and Direct Memory Access (DMA). It explains how each mode operates, with Programmed I/O relying on continuous CPU monitoring, Interrupt-driven I/O using interrupts for efficient communication, and DMA allowing direct data transfer between peripherals and memory without CPU intervention. Additionally, it covers the evolution of data transfer methods and lists various external interconnection standards.

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10 views13 pages

Unit IO-2b

The document discusses I/O basics, including modes of data transfer between the CPU and I/O devices: Programmed I/O, Interrupt-driven I/O, and Direct Memory Access (DMA). It explains how each mode operates, with Programmed I/O relying on continuous CPU monitoring, Interrupt-driven I/O using interrupts for efficient communication, and DMA allowing direct data transfer between peripherals and memory without CPU intervention. Additionally, it covers the evolution of data transfer methods and lists various external interconnection standards.

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shivamgdrive158
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IO

Unit-II: I/O Basics: I/O Modules, Concept of


Programmed I/O, Interrupt driven I/O, and Direct
Memory Access. I/O Channels and Processors,
External interconnection standards.
Modes of Transfer

• Data Transfer between the central computer and I/O


devices may be handled in a variety of modes.
• Some modes use CPU as an intermediate path,
others transfer the data directly to and from the
memory unit.
• Data transfer to and from peripherals may be
handled in one of THREE possible modes.
1. Programmed IO
2. Interrupt-initiated IO
3. Direct memory access (DMA)
1 Programmed I/O
Programmed I/O
• Data Transfer is the result of I/O instructions
written in the computer program.
• Hence, the CPU is in the continuous
monitoring of the interface.
• Input instruction is used to transfer data from
I/O to CPU, store instruction is used to transfer
data from CPU to memory and output
instruction is used to transfer data from CPU to
I/O device.
•This technique is generally used in very slow
speed computer and is not an efficient method
Here, the responsibility of monitoring the status of an I/O
operation lies with
1 Programmed I/O
Algorithm for Programmed IO data transfer
1. Read the status register.
2. Check the status of the flag bit and branch
to step 1 if not set or to step 3 if set.
3. Read the data register.
2 Interrupt Initiated I/O

Interrupt-driven I/O
• Polling takes valuable CPU time
• Open communication only when some data has to be
passed -> Interrupt
• I/O interface, instead of the CPU, monitors the I/O
device
• When the interface determines that the I/O device is
ready for data transfer, it generates an Interrupt
Request to the CPU
• Upon detecting an interrupt, CPU stops momentarily
the task it is doing, branches to the service routine to
process the data transfer, and then returns to the task
it was performing
2 Interrupt Initiated I/O
2 Interrupt Processing from CPU viewpoint
3 Direct Memory Access (DMA)
The transfer of data between the peripheral and memory
without the interaction of CPU and letting the peripheral
device manage the memory bus directly is termed as Direct
Memory Access (DMA).

• Large blocks of data transferred at a high speed to or from


high speed devices, magnetic drums, disks, tapes, etc.
• DMA controller Interface that provides I/O transfer of data
directly to and from the memory and the I/O device
• CPU initializes the DMA controller by sending a memory
address and the number of words to be transferred
• Actual transfer of data is done directly between the device
and memory through DMA controller -> Freeing CPU for other
tasks
I/O Channels or IO Processor
Evolution of Data Transfer between IO and CPU
1. The CPU directly controls a peripheral device.
2. A controller or I/O module is added. The CPU uses programmed
I/O
3. The same configuration as in step 2 is used, but now interrupts are
employed.
4. The I/O module is given direct access to memory via DMA.
5. The I/O module is enhanced to become a processor in its own
right, with a specialized instruction set tailored for I/O. –
IO Channel
6. The I/O module has a local memory of its own and is, in fact, a
computer in its own right. With this architecture, a large set of I/O
devices can be controlled, with minimal CPU involvement. -
IO Processor
Interconnection of IOP
EXTERNAL INTERCONNECTION STANDARDS

• Universal Serial Bus (USB)


• FireWire Serial Bus
• Small Computer System Interface (SCSI)
• Thunderbolt
• InfiniBand
• PCI Express (Peripheral Component Interconnect Express),
• SATA
• Ethernet Interface Card (NIC)
• Wi-Fi

Reference Morris Mano book


(Section 8.8, pp 302-305)
END OF UNIT 2

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