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Chapter 1 Basic Organization Von Neumann Computer 2

The document provides an overview of the basic organization of the Von Neumann computer architecture, detailing its major components such as the CPU, memory, and I/O devices. It explains the functionality of the CPU, including the arithmetic logic unit (ALU) and control unit, as well as the significance of memory operations like fetch and store. Additionally, it discusses the role of buses in data transfer and the characteristics of various memory types and measurements.
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0% found this document useful (0 votes)
5 views47 pages

Chapter 1 Basic Organization Von Neumann Computer 2

The document provides an overview of the basic organization of the Von Neumann computer architecture, detailing its major components such as the CPU, memory, and I/O devices. It explains the functionality of the CPU, including the arithmetic logic unit (ALU) and control unit, as well as the significance of memory operations like fetch and store. Additionally, it discusses the role of buses in data transfer and the characteristics of various memory types and measurements.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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CSSE4205/ITSE305

Computer Architecture &


Organization
Chapter 1
BASIC ORGANIZATION OF VON
NEUMANN COMPUTER
Objectives
1. Recognize the basic organization of the
classical Von Neumann machine.
2. Explain the major functional units of CPU.
3. Discuss the CPU operating modes.
4. Analyze the memory widths used in
computers.
5. Analyze the significance of Von Neumann
processor architecture.
John von Neumann and the IAS
computer, 1945

Source: https://codepen.io/petersandor/pen/mOWbgZ
Institute for Advanced Study, Princeton, New Jersey
Von Neumann Architecture
• In 1945, the mathematician John von Neumann
formalized processor methods developed at the
University of Pennsylvania.
• These methods, known as the von Neumann
architecture and stored program concept, still
form the foundation for modern day computers.
Von Neumann Architecture
Features of Von Neumann Architecture
• Uses stored program machine, one machine run
many programs.
• Separate central processing unit (CPU) and
random-access memory (RAM).
• Both instructions and data stored in RAM are
fetched in sequence to be executed by CPU.
• Data to be processed is transferred from RAM to
CPU, and results are transferred back to RAM
Features of Von Neumann Architecture
• Results of execution are stored in Registers first,
later written back to the memory.
• Von Neumann computer system consists of
three major components (CPU, Memory and I/O
devices), connected together by a bus.
• The most prominent items within the CPU are
the registers: they can be manipulated directly
by a computer program.
• A bus is a bundle of wires allowing control
signals to flow from one unit to another
Bus
The parts are connected to one another by a collection
of wires called a bus
BUS

• Control Bus
• Data Bus
• Address Bus
BUS
• Control Bus
– The control bus carries the signals relating to the
control and co-ordination of the various activities
across the computer from the control unit .
– Different architectures result in differing number of
lines of wire within the control bus, as each line is
used to perform a specific task like read, write and
reset requests.
BUS
• Data Bus
– This is used for the exchange of data between the
processor, memory and peripherals, and is bi-
directional
– The number of wires used in the data bus
(sometimes known as the 'width') can differ. Each
wire is used for the transfer of signals corresponding
to a single bit of binary data.
BUS
• Address Bus
– The address bus contains the connections between
the microprocessor and memory that carry the
signals relating to the addresses which the CPU is
processing at that time.
– The width of the address bus corresponds to the
maximum addressing capacity of the bus, or the
largest address within memory that the bus can work
with.
– The addresses are transferred in binary format, with
each line of the address bus carrying a single binary
digit. Therefore the maximum address capacity is
equal to two to the power of the number of lines
present (2lines).
Memory unit
• Memory is a
collection of
numbered cells,
each contains a
block of bits
• The size of a cell
is normally a
power of 2,
typically a byte
today.
Memory unit
• Memory is where the computer stores
instructions and data in groups of bits called
words
• Different computers use different cell sizes, but a
common value is 8 bits, often called one Byte or
Octet.
Memory unit
• The number of a cell is called its address. This is a
fixed-size unsigned integer. If an address on your
computer has “n” bits, your computer can refer
to possible distinct 2n addresses. This is known as
the address space of the computer. ( For 16 bit
addressing , 216 addresses can be referred).
• Each word in memory is assigned an address
from 0 to 2n –1, where n is the number of
address lines
Memory unit
Memory Width (W) - Number of
bits in each cell (8 Bits)
Address Width (N) - Number of
bits used to represent each address
N
Address Space (2 ) - Number of
uniquely identifiable Memory
Locations
Key Operations on Memory
• Fetch (address)
• Store (address, value)
Key Operations on Memory
• Fetch (address)
– Fetch reads a copy of the value at the given
address, without changing the value stored at that
address.
– Fetch(addr)
• Put addr into MAR
• Tell memory to load
• Memory copies data into MDR
Key Operations on Memory
• Store (address, value)
– Store writes a new value into the cell at the given
address, replacing the previous value.
– Store(addr, new value)
• Put addr into MAR
• Put new value into MDR
• Tell memory to store
• Memory stores data from MDR to memory cell
Key Operations on Memory
• These operations (Fetch and Store) use a
memory address register (MAR) to indicate
which address they want, and a memory data
register (MDR) to get/put the value at that
address.
Key Operations on Memory
• Cache memory: The basic idea is that
fetch/store operations in a typical memory
take longer than do processing operations.
Thus we keep a "snapshot" of some of the
memory in a faster (but smaller) memory,
called a cache.
How does the memory unit work?

Trace the following operation:


f
Fetch data D from memory location 1. 1 D

D
How does the memory unit work?

Trace the following operation:


s

Store data D in memory location 0. 000 DD


D

D
Memory Measurements
• 1 Bit = Binary Digit
• 2 Bits = 1 Crumb
• 4 Bits = 1 Nibble or Half Byte
• 8 Bits = 1 Byte
• 2 Bytes = 1 Word
• 4 Bytes = 1 Double Word
• 8 Bytes = 1 Quad Word (64 Bits)
• 1024 Bytes (210 Bytes) = 1 KB (Kilo Byte)
• 1024 KB (210 KB) = 1 MB (Mega Byte)
• 1024 MB (210 MB) = 1 GB (Giga Byte)
• 1024 GB (210 GB) = 1 TB (Terra Byte)
• 1024 TB (210 TB) = 1 PB (Peta Byte)
• 1024 PB (210 PB) = 1 EB (Exa Byte)
• 1024 EB (210 EB) = 1 ZB (Zetta Byte)
• 1024 ZB (210 ZB) = 1 YB (Yotta Byte)
• 1024 YB (210 YB) = 1 (Bronto Byte)
• 1024 Brontobyte (210 BB) = 1 (Geop Byte)
Memory Measurements
Sample Problem:
How many files of size 18 MB can be stored to a
flash drive of size 32 GB?
Register
• Data can be moved into and out of registers
faster than from memory.
• If we could replace all of memory with
registers, we could produce a very, very fast
computer.
• But, the price would be terribly prohibitive.
• Most computers have quite a few registers
that serve different purposes.
Registers of various lengths
The 8086 CPUs provide several general-purpose
registers for application use.
• 32-bit registers (E-extended) : EAX, EBX, ECX,
EDX, ESI, EDI, EBP, and ESP
• 16-bit registers: AX, BX, CX, DX, SI, DI, BP, and
SP
• 8-bit registers: AL, AH, BL, BH, CL, CH, DL, and
DH
Registers of various lengths
Unfortunately, these are not all separate
registers. That is, the 80x86 does not provide 24
independent registers. Instead, the 80x86
overlays the 32-bit registers with the 16-bit
registers and it overlays the 16-bit registers with
the 8-bit registers.
Registers of various lengths
Arithmetic and Logic unit (ALU)
Arithmetic and Logic unit (ALU)
• An arithmetic logic unit (ALU) is a major
component of the central processing unit of a
computer system.
• It does all processes related to arithmetic and
logic operations that need to be done on
instruction words.
• As the operations become more complex, the
ALU also becomes more expensive, takes up
more space.
ALU’s basic operations
• Logical Operations: These include AND, OR,
NOT, XOR, NOR, NAND, etc.
• Bit-Shifting Operations: This pertains to
shifting the positions of the bits by a certain
number of places to the right or left, which is
considered a multiplication operation.
• Arithmetic Operations: This refers to bit
addition and subtraction. Addition can be
used to substitute for multiplication and
subtraction for division.
Control Unit

• The control unit is a complicated part of CPU, and


responsible for controlling much of the operation
by sending signal to the rest of the processor.
Control Unit

• Three main elements of the control unit are as


follows:

– Decoder
– Timer or clock
– Control logic circuits
Control Unit
 Decoder
– This is used to decode the instructions that make up a
program when they are being processed, and to
determine what actions must be taken in order to
process them.
– These decisions are normally taken by looking at the
opcode of the instruction, together with the
addressing mode used.
Control Unit
 Timer or clock
– The timer or clock ensures that all processes and
instructions are carried out and completed at the
right time.
– Pulses are sent to the other areas of the CPU at
regular intervals and actions only occur when a pulse
is detected.
– Indicates the operations of the CPU are synchronized.
Control Unit
 Control logic circuits
– The control logic circuits are used to create the
control signals themselves, which are then sent
around the processor.
– These signals inform the arithmetic and logic unit and
the register array what actions and steps they should
be performing, what data they should be using to
perform the said actions, and what should be done
with the results.
Fetch-Decode-Execute
Processor Speed
• Speed is measured in hertz(Hz)
• A hertz is equal to one cycle per second
• Example 1: a processor with 3.8 GHz (Gigahertz)
runs 3.8 billion cycles per second
• Example 2: a processor with 1 MHz (Megahertz)
runs 1 million cycles per second
Input/Output Unit
• There are many different types of devices: Hard
disks, tapes, network cards, printers, displays,
mice, keyboards, etc.
• Some are persistent storage (e.g., disks, tapes);
these let you save things when the power is off.
Memory, by contrast, goes dead and forgets
when the power is cut (volatile). Others are
transient, like displays mice, keyboards, etc.
Input/Output Unit
• They all have different access characteristics;
some are random access (like disks), others are
sequential access (like tapes), some are read-
only (like CD-ROM's), and still others are
"stream" devices like network cards.
Input/Output Unit
• Because I/O devices are so slow, you don't
want the main processor to have to wait. So in
many devices, the processor sends a command
to the I/O controller along the bus, and then
continues its work. The I/O controller does its
thing, and when it's done, it "interrupts" the
CPU to let it know the operation is complete.
IN X

s
X D

D
IN X

D
OUT X

f
X D

D
OUT X

D
Intel D8086 chip
Self-Study

1.Harvard Architecture
2.Processor Operating Modes
References

1. Computer Fundamentals: Architecture &


Organization, B. Ram
2. Fundamentals of Computer Organization
and Architecture, Mostafa Abd-El-Barr

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