UNIT 3

Instruction Codes:
A computer instruction is a binary code that determines the micro-operations in a sequence for
a computer. They are saved in the memory along with the information. Each computer has its
specific group of instructions.
They can be categorized into two elements as Operation codes (Opcodes) and Address.
Opcodes specify the operation for specific instructions. An address determines the registers or
the areas that can be used for that operation. Operands are definite elements of computer
instruction that show what information is to be operated on.
It consists of 12 bits of memory that are required to define the address as the memory includes
4096 words. The 15th bit of the instruction determines the addressing mode (where direct
addressing corresponds to 0, indirect addressing corresponds to 1). Therefore, the instruction
format includes 12 bits of address and 1 bit for the addressing mode, 3 bits are left for
Opcodes.
The following block diagram shows the instruction format for a basic computer.

There are three parts of the Instruction Format which are as follows −
1. Addressing Modes
Instructions that define the address of a definite memory location are known as memory
reference instructions. The method in which a target address or effective address is recognized
within the instruction is known as addressing mode.
The address field for instruction can be represented in two different ways are as follows −
 Direct Addressing − It uses the address of the operand.
 Indirect Addressing − It facilitates the address as a pointer to the operand.
The address of the operand or the target address is called the effective address.

2. Opcodes
An opcode is a collection of bits that represents the basic operations including add, subtract,
multiply, complement, and shift. The total number of operations provided through the
computer determines the number of bits needed for the opcode.

3. Address
The address is represented as the location where a specific instruction is constructed in the
memory. The address bits of an instruction code is used as an operand and not as an address. In
such methods, the instruction has an immediate operand. If the second part has an address, the
instruction is referred to have a direct address.

Computer registers
Computer registers are high-speed memory storing units. It is an element of the computer
processor. It can carry any type of information including a bit sequence or single data.
A register is a very small amount of very fast memory that is built into the CPU (central
processing unit). Contents can be accessed at extremely high speeds. Registers are
used to store data temporarily during the execution of a program. Different
processors have different register sizes.
Registers are normally measured by the number of bits they can hold, for example, an
8-bit register means it can store 8 bits of data or a 32-bit register means it can store 32
bit of data.
The figure shows the registers with their memories. The memory addresses are saved in
multiple registers. These requirements certainly state the use for registers in a computer.
 The following table shows the registers and their functions.

Register Symbol Number of Bits Register Name Function

OUTR 8 Output register It holds output character.

INPR 8 Input register It holds input character.

PC 12 Program Counter It holds the address of the instruction.

AR 12 Address Register It holds an address for memory.

DR 16 Data Register It holds memory operand.

AC 16 Accumulator It’s a processor register.

IR 16 Instruction Register It holds an instruction code.

TR 16 Temporary Register It holds temporary data.

 ACCUMULATOR (AC): The processor register AC consists of 16-bits. It is used to hold

the results or partial results of arithmetic and logical operations. An accumulator is a
register in which intermediate arithmetic and logic results are stored.

 DATA REGISTER (DR): The register DR consists of 16-bits and it is used to hold memory
operands (data). This register contains the data to be written into memory or receives
the data read from memory.

 TEMPORARY REGISTER (TR): Temporary register have 16-bits and it provides temporary
storage of variables or results.

 INSTRUCTION REGISTER (IR): The instruction register consists of 16-bits. The purpose of
the instruction register is to hold a copy of the instruction which the processor is to
execute. In our basic computer, instruction register (IR) holds instruction code which is
read from memory.

 ADDRESS REGISTER (AR): This register specifies the address in memory for next read or
writes operations. The address register consists of 12-bits.
 PROGRAM COUNTER (PC): Program counter has 12-bits and it holds the address of the
next instruction to be read from memory after the current execution is executed. The
instructions are read sequentially because the program counter automatically
increments after fetching the current instruction.
 INPUT REGISTER (INPR): Input register has 8-bits. INPR register receives a character
from an input device and delivers it to the AC.
 OUTPUT REGISTER (OUTR): Output register has 8-bits. The output register receives
information from AC and transfer it to the output device.
Functions of Registers:
1. Data Storage: Registers are used to store data or instructions temporarily while a program is
being run. They are mostly employed to temporarily store data so that the CPU may access it
fast.
2. Data Processing: With the use of a register, we are able to carry out a number of logical and
mathematical operations and the information from these instructions is kept in the
accumulator register.
3. Addressing: Memory addresses are kept in registers, which can also hold the address of the
instruction or the data that the CPU wishes to read from or write to.
4. Data Transfer: Between the CPU and memory, data is transferred through registers. Some of
them save the information that's read from or stored in memory.

Computer Instructions
Computer instructions are commands given to a computer to perform specific tasks. These
instructions are typically divided into three categories:-
1. Data Transfer Instructions: Move data between memory and registers (e.g., Load, Store).
2. Arithmetic and Logic Instructions: Perform math or logic operations (e.g., Add, Subtract,
AND, OR).
3. Control Instructions: Guide the flow of the program (e.g., Jump, Branch, Call).

1. Data Transfer Instructions: These instructions deal with moving data from one location
to another within the computer. Think of it as copying or transferring information
between various components like memory, registers, or storage. Common Data
Transfer Instructions:
 Load: Copies data from memory to a register (temporary storage inside the CPU).

 Store: Transfers data from a register to memory.

 Move: Transfers data from one register to another.
2. Arithmetic and Logic Instructions: These instructions are used to perform mathematical
and logical operations. They enable computers to handle calculations and make decisions
based on certain conditions.
Arithmetic Instructions:
 Add: Adds two numbers.
 Subtract: Subtracts one number from another.
 Multiply: Multiplies two numbers.
 Divide: Divides one number by another.
Logic Instructions:
 AND: Compares two bits and returns 1 if both are 1; otherwise, returns 0.
 OR: Compares two bits and returns 1 if at least one is 1.
 NOT: Inverts a bit (1 becomes 0, and 0 becomes 1).
 XOR (Exclusive OR): Returns 1 if the bits are different, 0 if they are the same.

3. Control Instructions: Control instructions determine the flow of execution in a program. They
guide the computer on which instruction to execute next, allowing flexibility in decision-making
and repeated actions. Common Control Instructions:
 Jump (JMP): Directs the program to execute a specific instruction elsewhere in the code.
 Conditional Branch: Jumps to another instruction only if a specific condition is
true. Example: Branch if zero (BZ) or branch if not zero (BNZ).
 Call: Transfers control to a subroutine (a set of instructions performing a specific task)
and returns afterward.
 Return: Brings back control to the main program after a subroutine is executed.
Types of Computer Instruction
1. Memory Reference Instructions: In computer organization, the memory reference
instructions are used for manipulation of data stored in the computer memory. Memory
reference instructions enable the computer's CPU to access and process the data stored in a
specific memory address.
Therefore, memory reference instructions provide a mean for writing data to memory or
reading data from memory. These instructions allow the processor to communicate with the
computer's memory system.
The format of memory reference instruction consists of three parts namely, opcode (operation
code), operands, and addressing mode. Where, opcode represents the operation to be
performed, while the operand represents the memory address where the data is stored.
A memory reference instruction typically uses 12 bits to specify a memory address, 3 bits to
specify the opcode, and 1 bit to identify the addressing mode.

Hence, memory reference instructions are very important for many computing tasks like data
processing, file handling, database operations, etc., as these computer instructions allow for
accessing and manipulation data stored in the computer memory.
2. Register Reference Instructions: It is a computer instruction that operates on the data
stored in the registers instead of memory addresses. Hence, the register reference instructions
are primarily used for manipulation of data stored in the registers of the processors of a
computer.
Similar to memory reference instructions, register reference instructions can also perform
operation like data manipulation, arithmetic operations, logical operations, etc. on the data
stored in registers. In comparison to memory reference instructions, the register reference
instructions are faster in execution.
Register reference instruction consists of two parts namely, opcode, and register operation.
The opcode (operational code) represents the operation to be performed.

In computer organization, the register reference instructions are determined by their opcode
111 with a 0 at the left most of the instruction. In the case of register reference instructions,
there is no need of an operand from memory because it uses additional 12 bits to identify the
operation to be implemented.

3. Input/Output Instructions: Those computer instructions that provide a mean for

communication between a computer system and its I/O peripherals are called input-output
instructions.
Therefore, the input-output instructions enable the data transfer from and to input and
output devices like keyboard, memory disks, monitor, etc. With the help of input-output
instructions, the computer system receives data input from users and sends output to users.
Hence, input-output instructions act as the communication interface between CPU and
peripheral devices of the computer system.

Similar to register reference instructions, the input-output instructions also do not require a
memory reference. It is identified by the opcode 111 with a 1 at the leftmost of the
instruction. The rest 12-bits are used to represent the type of input/output operation to be
performed.
Uses of Computer Instructions
 Data manipulation: Basic computer instructions are used to handle data in the
computer system, including moving data between memory and the CPU.
 Control flow: Basic instructions guide the flow of a program by branching to different
parts based on conditions.
 Input/output operations: Instructions are used to transfer data between the computer
and external devices like keyboards, printers, or monitors.
 Program execution: They load programs into memory and control their execution by
moving data in and out of the program.
 System maintenance: These instructions handle tasks like memory allocation, interrupt
management, error detection and correction.

Instruction Formats
The set of instructions that manages the operation codes is called the format of instruction. A
computer instruction refers to a binary code that controls how a computer performs micro-
operations in a series. They, together with the information, are saved in the memory. Every
computer has its own set of instructions. Operation codes or Opcodes and Addresses are the
two elements that they are divided into.
A computer’s instructions can be any length and have any number of addresses. The
arrangement of a computer’s registers determines the different address fields in the instruction
format. The instruction can be classified as three, two, and one address instruction or zero
address instruction, depending on the number of address fields.

1. Three Address Instructions: The instruction format in which the instruction uses the
three address fields is called the three address instruction format. It has three operands.
A three-address instruction has the following general format: source 1 operation, source 2
operation, source 3 operation, destination
ADD X, Y, Z
Here, X, Y, and Z seem to be the three variables that are each assigned to a distinct memory
location. The operation implemented on operands is ‘ADD.’ The source operands are ‘X’ and ‘Y,’
while the destination operand is ‘Z.’
In order to determine the three operands, bits are required. To determine one operand, n bits
are required (one memory address). In the same way, 3n bits are required to define three
operands (or three memory addresses). To identify the ADD operation, bits are also required.
2. Two Address Instructions: The instruction format in which the instruction uses only two
address fields is called the two address instruction format. This type of instruction format has two
operands.

A two-address instruction has the following general format: source and destination of the
operation
ADD X, Y
Here X and Y are the two variables that have been assigned to a specific memory address. The
operation performed on the operands is ‘ADD.’ This command combines the contents of
variables X and Y and stores the result in variable Y. The source operand is ‘A,’ while ‘B’ is used
as both a source and a destination operand.
The two operands must be determined using bits. To define one operand, n bits are required
(one memory address). To determine two operands, 2n bits are required (two memory
addresses). The ADD operation also necessitates the use of bits.

3. One Address Instructions: The instruction format in which the instruction uses only one
address field is called the one address instruction format.
 In this type of instruction format, one operand is in the accumulator and the other is in
the memory location.
 It has only one operand.
 It has two special instructions LOAD and STORE.
One address instruction has the following general format: operation source
INCLUDE X
Here X refers to the variable that has access to a specific memory region. The operation
performed on operand A is ‘ADD.’ This instruction adds the value of variable A to the
accumulator and then saves the result inside the accumulator by restoring the accumulator’s
contents.

4. Zero Address Instructions: These instructions use a structure called a pushdown stack
to hold operands. The instruction format in which there is no address field is called zero address
instruction.
 In zero address instruction format, stacks are used.
 In zero order instruction format, there is no operand.
Example of format of Instruction:
1. Zero Address Instruction examples:
 Assembly language instruction – PUSH A, PUSH B etc.
 Stack transfer operation – TOS <- A, TOS <- B etc.
2. One Address Instruction examples:
 Assembly language instruction – LOAD C, ADD B, STORE T etc.
 Operation Register instruction – AC <- M[T], AC <- M[C] etc.

3. Two Address Instruction examples:

 Assembly language instruction – MOV R1, A; ADD R1, B etc.
 Operation Register instruction – R1 <- M[A], R2 <- M[C] etc.

4. Three Address Instruction examples:

 Assembly language instruction – ADD R1, A, B etc.
 Operation Register instruction – R1 <- M[A] + M[B] etc.

Parts of Instruction Format: The parts of the instruction format are:

1. Addressing Mode: The data is represented in the instruction format with the help of
addressing mode. The addressing mode is the first part of the instruction format.
The data can either be stored in the memory of a computer or it can be located in the register
of the CPU.
2. Operation Code( OPCODE): The operation code gives instructions to the processor to
perform the specific Operation. The operation code is the second part of the instruction format.
3. OPERAND: It is the part of the instruction format that specifies the data or the address of the
data. Depending upon the processor of the computer the instruction format contains zero to
three operands.

Instruction Cycle
The instruction cycle in computer architecture is the fundamental process by which a
computer retrieves, decodes, and executes instructions from memory. This cycle is the heart
of the CPU's operation, and it ensures that a program runs correctly.
A program consisting of the memory unit of the computer includes a series of instructions. The
program is implemented on the computer by going through a cycle for each instruction. The
instruction cycle, also known as the fetch-decode-execute cycle, is the fundamental process by
which a computer's central processing unit (CPU) executes instructions. It involves fetching an
instruction from memory, decoding it to determine the required operation, and then executing
that operation.
 Phases of the Instruction Cycle:
1. Fetch:
Purpose: Retrieve the next instruction from memory.
The fetch step is the first step in the instruction cycle, where the CPU retrieves an instruction
from memory. The instruction is typically located at the address pointed to by the program
counter (PC), which is a register that keeps track of the next instruction to be executed.

2. Decode:
Purpose: Interpret the fetched instruction.
The fetched instruction is decoded by the CPU's control unit to identify the operation to be
performed and the operands involved. This involves identifying the opcode (operation code)
and any data addresses needed for the instruction.

3. Read Effective Address: In some cases, especially for memory-reference instructions,

the effective address of the operand needs to be determined. This address may be directly
specified in the instruction or calculated based on the instruction's addressing mode.

4. Execute:
Purpose: Carry out the operation.
The CPU carries out the operation specified by the instruction. This may involve reading or
writing data from or to memory, performing arithmetic or logic operations on data, or
controlling the flow of execution.
In the basic computer, each instruction cycle includes the following procedures −
 It can fetch instruction from memory.
 It is used to decode the instruction.
 It can read the effective address from memory if the instruction has an indirect address.
 It can execute the instruction.
After the following four procedures are done, the control switches back to the first step and
repeats the similar process for the next instruction. Therefore, the cycle continues until
a Halt condition is met. The figure shows the phases contained in the instruction cycle.
Instruction Cycle Example:
Let’s say the instruction is: LOAD R1, 500
Meaning: Load the data from memory address 500 into register R1.
Cycle:
1. Fetch the instruction LOAD R1, 500.
2. Decode: Understand it's a load instruction.
3. Execute: CPU prepares to access memory.
4. Memory Access: Fetch data from address 500.
5. Write Back: Store the fetched data into R1.

Flowchart of Instruction Cycle:

The entire procedure is divided into following three phases-
1. Fetch Phase
2. Decode Phase
3. Execute Phase

1. Fetch Phase: Fetch phase refers to the extraction of a new instruction from memory to the
Instruction Register (IR). For this to occur, the memory address of the instruction is transfered
into Program Counter (PC) by the control unit. PC then transfers the address to Address
Register (AR). AR now explores the memory and extracts the instruction. The extracted
instruction is transfered to IR and PC gets an increment of 1. Increment of PC refers to the
subsequent pointing towards the next instruction in memory. Consider the following RTL
notations-

2. Decode Phase: Decode phase starts after instruction is stored in IR. The first thing to
decode is Mode Bit. It is transfered in a separate flip-flop I. Next is to decode the 3-bit Opcode
which is done using a 3 to 8 decoder. D7output of the decoder is- when 1, denotes that the
opcode was 111. Thus the decoder output along with I flip-flop determine whether the
instruction was a Memory Ref. Instruction or not. In concurrence, the 12 bit Operand address
is transfered into AR so that the operand can be fetched out of memory. Consider the RTL
notations-
3. Execute Phase: Execute phase starts after the instruction is decoded completely. The
operand is fetched out from memory during this phase and rest of the process is accomplished
by arithmetic and logic circuits. Fetching of operands depend upon the mode of address being
used in the instruction.

Flowchart showing Instruction Cycle:

Common Bus System

In computer organization, a system bus is a set of electronic cables that connect key computer
components, such as the CPU, memory, and input/output (I/O) devices. It serves as a communication
pathway for transferring data and signals between these parts.

The system bus is typically divided into three main categories: data bus, address bus, and
control bus. The data bus carries the actual data being transferred, the address bus identifies
the location of the data, and the control bus manages the timing and direction of data flow. The
efficiency of the system bus plays a crucial role in overall system performance. A faster, more
reliable bus allows for quicker communication between components, enhancing the overall
speed and responsiveness of the computer.
Organization What is a Bus Structure in Computer?
A bus structure in a computer organization is essentially a shared communication pathway that
connects multiple components of the computer system. It enables the exchange of information
between parts such as the central processing unit (CPU), memory, and input/output devices.
The bus provides a framework for transmitting data, memory addresses, and control signals. It
is a crucial component of the computer's internal architecture, allowing the various parts of the
system to interact efficiently and ensuring smooth operation.
The bus is typically
divided into three
categories based on
the types of signals
it carries:
1. Data bus
2. Address bus
3. Control bus

What are the components of a bus:

A bus in computer architecture is made up of several components, each of which plays a
specific role in data transfer and communication. These components can be categorized into:
1. Data Bus: The data bus is responsible for carrying the actual data between the CPU, memory,
and peripherals. The data bus is bidirectional, meaning it can carry data in both directions
from the CPU to memory or an I/O device, and vice versa. This allows for the transfer of both
read and write operations.
2. Address Bus: The address bus is
responsible for carrying the
addresses of memory locations or
I/O devices where data is to be read.
It helps the CPU identify the location of the data in memory. The address bus is unidirectional,
meaning data only flows in one direction from the CPU to memory or an I/O device.
3. Control Bus: The control bus carries control signals that synchronize the actions of all
components in the system. It acts as a coordination mechanism for different devices, ensuring
that data is transferred at the right time and that the CPU and other components are working in
harmony without conflicts.
 Addressing Modes
Addressing modes in computer architecture are methods that specify how to locate the
operands (data) for an instruction. They determine how the CPU accesses data in memory,
registers, or directly within the instruction itself. Different modes provide flexibility in
accessing data and can influence the speed and efficiency of instruction execution.
Addressing modes determine how the CPU calculates the effective address of an operand in
memory.
For example, if we wanted to add the numbers 1 and 2 and get a result, mathematically we
would likely write this as 1 +2. In this case, our operator is (+), or the addition, and our
operands are the numbers 1 and 2.
In a microprocessor, the machine needs to be told how to get the operands to perform the
operation. The effective address is a term that describes the address of an operand that is
stored in memory. There are several methods to designate the effective address of those
operands or get them directly from the register. These methods are known as addressing
modes.

Types of Addressing Modes:

1. Implied Addressing Modes:
Implied addressing mode is an addressing mode where the operand is implied by the
instruction itself, and no explicit address or register specification is required. It is also called
as implicit addressing mode.
Examples- The instruction “Complement Accumulator” is an implied mode instruction.
In a stack organized computer, Zero Address Instructions are implied mode instructions.
(since operands are always implied to be present on the top of the stack)

2. Stack Addressing Mode:

Stack addressing mode is an addressing mode that uses a stack data structure to store and
retrieve operands. In this addressing mode, the operand is contained at the top of the stack.
Operations:
1. PUSH: Adds an operand to the top of the stack.
2. POP: Removes the top operand from the stack.
Example- ADD
 This instruction simply pops out two symbols contained at the top of the stack.
 The addition of those two operands is performed.
 The result so obtained after addition is pushed again at the top of the stack.

3. Immediate Addressing Mode:

Immediate addressing mode is an addressing mode where the operand is specified directly in
the instruction itself.
 Instead of address field, an operand field is present that contains the operand.
 The immediate-mode instructions help initialize registers to a certain constant value.

Examples-
 ADD 10 will increment the value stored in the accumulator by 10.

 MOV R #20 initializes register R to a constant value 20.

4. Direct Addressing Mode:
Direct addressing mode is an addressing mode where the memory address of the operand is
specified directly in the instruction. In this addressing mode,
 The address field of the instruction contains the effective address of the operand.
 Only one reference to memory is required to fetch the operand.
 The operand would reside in memory, and the address here is given directly by the
instruction’s address field.
 It is also called as absolute addressing mode.

Example- ADD X will increment the value stored in the accumulator by the value stored at
memory location X.
AC ← AC + [X]

5. Indirect Addressing Mode:

Indirect addressing mode is an addressing mode where the memory address of the operand is
stored in a register or memory location, and the instruction specifies the register or memory
location that holds the address.
In an indirect address mode, the address field of an available instruction gives that address in
which the effective address gets stored in memory. The control fetches the instruction available
in the memory and then uses its address part in order to (again) access memory to read its
effective address.

Example- ADD X will increment the value stored in the accumulator by the value stored at
memory location specified by X.
AC ← AC + [[X]]
6. Register Direct Addressing Mode:
Register direct addressing mode is an addressing mode where the operand is stored in a
register specified by the instruction. In this addressing mode,
 The operand is contained in a register set.
 The address field of the instruction refers to a CPU register that contains the operand.
 No reference to memory is required to fetch the operand.

Example: ADD R will increment the value stored in the accumulator by the content of register R.
AC ← AC + [R]
NOTE: This addressing mode is similar to direct addressing mode.
 The only difference is address field of the instruction refers to a CPU register instead of
main memory.

7. Register Indirect Addressing Mode:

Register indirect addressing mode is an addressing mode where the register specified by the
instruction contains the memory address of the operand.
In this addressing mode:
 The address field of the instruction refers to a CPU register that contains the effective
address of the operand.
 Only one reference to memory is required to fetch the operand.

Example- ADD R will increment the value stored in the accumulator by the content of memory
location specified in register R.
AC ← AC + [[R]]
 NOTE- This addressing mode is similar to indirect addressing mode.
The only difference is address field of the instruction refers to a CPU register.

8. Relative Addressing Mode:

Relative addressing mode is an addressing mode where the memory address of the operand is
calculated relative to the current instruction address or a base address.In this addressing mode,
 Effective address of the operand is obtained by adding the content of program counter
with the address part of the instruction.

Effective Address= Content of Program Counter + Address part of the instruction

NOTE- Program counter (PC) always contains the address of the next instruction to be
executed.
 After fetching the address of the instruction, the value of program counter immediately
increases.
 The value increases irrespective of whether the fetched instruction has completely
executed or not.

9. Indexed Addressing Mode:

In the indexed addressing mode, the content of a given index register gets added to an
instruction's address part so as to obtain the effective address.
 Here, the index register refers to a special CPU register that consists of an index value.
An instruction's address field defines the beginning address of any data array present
in memory Indexed addressing mode is an addressing mode where the memory address
of the operand is calculated by adding an index value to a base address.

Effective Address = Content of Index Register + Address part of the instruction

In this addressing mode, Effective address of the operand is obtained by adding the content of
index register with the address part of the instruction.

10. Base Register Addressing Mode:

 Base register addressing mode is an addressing mode where a base register holds a
base address, and an offset or index value is added to the base address to calculate
the memory address of the operand.

Effective Address= Content of Base Register + Address part of the instruction

In this addressing mode: Effective address of the operand is obtained by adding the content of
base register with the address part of the instruction.

11. Auto-Increment Addressing Mode:

Auto increment addressing mode is an addressing mode where the address of the operand is
automatically incremented after each access, allowing for efficient sequential access to
memory locations.
In this addressing mode,
 After accessing the operand, the content of the register is automatically incremented by
step size ‘d’.
 Step size ‘d’ depends on the size of operand accessed.
 Only one reference to memory is required to fetch the operand.
 Effective Address of the Operand = Content of Register

Example-

Assume operand size = 2 bytes. Here,

 After fetching the operand 6B, the instruction register RAUTO will be automatically
incremented by 2.
 Then, updated value of RAUTO will be 3300 + 2 = 3302.
 At memory address 3302, the next operand will be found.

NOTE: In auto-increment addressing mode,

 First, the operand value is fetched.
 Then, the instruction register RAUTO value is incremented by step size ‘d’.

12. Auto-Decrement Addressing Mode:

Auto decrement addressing mode is an addressing mode where the address of the operand is
automatically decremented before each access, allowing for efficient sequential access to
memory locations in reverse order.
 This addressing mode is a special case of Register Indirect Addressing Mode where-

Effective Address of the Operand = Content of Register – Step Size

In this addressing mode:

 First, the content of the register is decremented by step size ‘d’.
 Step size ‘d’ depends on the size of operand accessed.
 After decrementing, the operand is read.
 Only one reference to memory is required to fetch the operand.
 Example-

Assume operand size = 2 bytes. Here,

 First, the instruction register RAUTO will be decremented by 2.
 Then, updated value of RAUTO will be 3302 – 2 = 3300.
 At memory address 3300, the operand will be found.

NOTE- In auto-decrement addressing mode,

 First, the instruction register RAUTO value is decremented by step size ‘d’.
 Then, the operand value is fetched.

Applications of Addressing Modes:

Addressing Modes Applications

Immediate Addressing Mode  To initialize registers to a constant value

Direct Addressing Mode and  To access static data

Register Direct Addressing Mode  To implement variables
Indirect Addressing Mode and  To implement pointers because pointers are memory
Register Indirect Addressing Mode locations that store the address of another variable
 To pass array as a parameter because array name is the base
address and pointer is needed to point the address
Relative Addressing Mode  For program relocation at run time i.e. for position
independent code
 To change the normal sequence of execution of instructions
 For branch type instructions since it directly updates the
program counter
Index Addressing Mode  For array implementation or array addressing
 For records implementation
Base Register Addressing Mode  For writing relocatable code i.e. for relocation of program in
memory even at run time
 For handling recursive procedures
Auto-increment Addressing Mode  For implementing loops
And Auto-decrement Addressing Mode  For stepping through arrays in a loop
 For implementing a stack as push and pop
 Central Processing Unit
CPU stands for Central Processing Unit; it is also known as "the brain of the computer". A CPU
is a primary component of a computer that performs most of the processing and controls the
operation of all components running inside a computer.
A CPU executes instructions by fetching them from memory, decodes them, and then executes
them. So, it plays a vital role in fetch-decode-execute instructions.

The CPU interacts with the main memory and input/output devices. The CPU reads and writes
data to and from the memory system and transfers data to and from the I/O devices.
Execution cycle in the CPU can be defined as follows:
 The CPU fetches the instruction to be implemented from the main memory and saves it
in the Instruction Register (IR).
 The instruction is decoded.
 The operands are fetched from the memory system and stored in the CPU registers.
 The instructions are then executed.
 The results are transferred from the CPU registers to the memory system.
Functions of the CPU
The CPU’s main job is to process instructions from programs. It does this through a process
called the Fetch-Decode-Execute-Store cycle:
This cycle happens billions of times a second, letting the CPU handle tons of tasks super fast!
 Fetch: the first CPU gets the instruction. That means binary numbers that are passed
from RAM to CPU.
 Decode: When the instruction is entered into the CPU, it needs to decode the
instructions. with the help of ALU(Arithmetic Logic Unit), the process of decoding
begins.
 Execute: After the decode step the instructions are ready to execute.
 Store: After the execute step the instructions are ready to store in the memory.
Components of CPU: The key components of a CPU are the Control Unit, ALU and Memory.
 Control Unit (CU)
 ALU (Arithmetic Logic Unit)
 Memory or Storage Unit
 Registers
1. Control Unit: It fetches the instructions from the main memory, decodes the instructions,
and then executes them.
As its name implies, a control unit acts as the "brain" of the CPU. A major role of a control unit
is to manage and execute instructions to perform the tasks specified by a computer program.
Functions of Control Unit
 Instruction Fetch − A CU fetches instructions from RAM (Random Access Memory).
 Instruction Decoding − It decodes the fetched instructions to operate.
 Instruction Execution − A CU sends control signals to perform operations like ALU for
arithmetic and logical operations.
 Control Flow Management − It controls flow by updating the program counter.
 Exception Handling − A control unit effectively manages exceptions and interruptions
like hardware failures, system calls, and external events, by appropriately diverting the
control flow of the CPU to the planned procedure for managing such exceptions.
 Synchronization − A CU plays a crucial role in facilitating the coordination of instruction
execution across several cores.
2. Arithmetic Logic Unit (ALU): ALU stands for Arithmetic Logic Unit. An ALU is a key component
of the CPU which performs arithmetic and logical operations. It can perform billions of operations per
second. It is commonly built to execute operations speedily. It works in conjunction with other
CPU components, such as registers, memory, and control units, to execute complex
instructions.

Functions of an ALU
 Arithmetic Operations − The ALU can perform basic arithmetic operations.
 Logic Operations − The ALU can also perform logical operations like AND, OR, NOT, XOR,
and bit-shifting operations.
3. Memory Unit: A memory is a hardware component which is used to store and access the
data whenever required. Computer Memory is categorised into two parts:
Primary Memory (RAM) and Secondary Memory (Hard Disk). RAM is used for short-term, fast
data access and is essential for active program execution. On the other hand, storage or
secondary memory provides permanent data storage.
Functions of memory:
 Primary Memory RAM is also known as primary or temporary memory; it is a type of
volatile memory used for temporarily storing data. The contents inside the RAM are
erased when the computers power gets off or restarted.
 RAM is actively used for program or instruction execution.
 Once we start the computer; system necessary files, programs and
operating system files are loaded into the RAM for the smooth
running of the computer.
 The more RAM a computer has, the better it can handle multitasking and the faster it
can run applications since data can be accessed more quickly.
Secondary Memory(Hard Drives, SSDs, Flash Drives, etc.)
 Storage devices are used to store the data permanently, even when the computer is
powered off.
 They are non-volatile; the data remains intact even when the power is turned off or the
system restarts.
 The most popular and commonly used storage devices are
Hard disks (HDs), Solid-State Drives (SSDs), USB flash drives,
and optical disks (e.g., DVDs), pen drives.
 The data storage capacity of these devices in gigabytes (GB)
to terabytes (TB) and more, depending on the type and size of the storage device.
In computer organization, an instruction cycle, also known as a fetch-decode-execute cycle, is
the basic operation performed by a central processing unit (CPU) to execute an instruction. The
instruction cycle consists of several steps, each of which performs a specific function in the
execution of the instruction.
The major steps in the instruction cycle are:
Fetch: In the fetch cycle, the CPU retrieves the instruction from memory. The instruction is
typically stored at the address specified by the program counter (PC). The PC is then
incremented to point to the next instruction in memory.
Decode: In the decode cycle, the CPU interprets the instruction and determines what operation
needs to be performed. This involves identifying the opcode and any operands that are needed
to execute the instruction.
Execute: In the execute cycle, the CPU performs the operation specified by the instruction. This
may involve reading or writing data from or to memory, performing arithmetic or logic
operations on data, or manipulating the control flow of the program.
There are also some additional steps that may be performed during the instruction cycle,
depending on the CPU architecture and instruction set:
Fetch operands: In some CPUs, the operands needed for an instruction are fetched during a
separate cycle before the execute cycle. This is called the fetch operands cycle.
Store results: In some CPUs, the results of an instruction are stored during a separate cycle
after the execute cycle. This is called the store results cycle.
Interrupt handling: In some CPUs, interrupt handling may occur during any cycle of the
instruction cycle. An interrupt is a signal that the CPU receives from an external device or
software that requires immediate attention.
When an interrupt occurs, the CPU suspends the current instruction and executes an interrupt
handler to service the interrupt. These cycles are the basic building blocks of the CPU's
operation and are performed for every instruction executed by the CPU. By optimizing these
cycles, CPU designers can improve the performance and efficiency of the CPU, allowing it to
execute instructions faster and more efficiently.

What is Data Path?

Suppose that the CPU needs to carry out any data processing action, such as copying data
from memory to a register and vice versa, moving register content from one register to
another, or adding two numbers in the ALU. Therefore, whenever a data processing action
takes place in the CPU, the data involved for that operation follows a particular path, or data
path.
Data paths are made up of various functional components, such as multipliers or arithmetic
logic units. Data path is required to do data processing operations.

Establishing required data paths:

Establishing required data paths in CPU design involves defining the physical circuitry for data
movement and processing within the CPU. This includes components like the Arithmetic Logic
Unit (ALU), registers, and multiplexers, all interconnected to allow data to flow between
different functional units. Key aspects of establishing data paths:
1. Component Selection and Arrangement:
 ALU: Performs arithmetic and logical operations.
 Registers: Store data temporarily.
  Multiplexers: Select data from different sources for the ALU or other components.
 Buses: Provide communication pathways between components.
 Internal Buses: Connect components within the CPU.
 Memory Buses: Connect the CPU to external memory.
2. Data Path Organization:
 Single Bus: The simplest organization, where all data flows through a single bus.
 Multi-Bus: Uses multiple buses for more efficient and parallel data transfer.
3. Control Unit Integration:
 The control unit directs the flow of data through the data path.
 Control signals manage the selection of data, operation selection within the ALU, and
register operations.
4. Component Duplication and Sharing:
 Some components may be duplicated to handle multiple instructions simultaneously.
 Other components can be shared by using multiplexers and control signals to select the
appropriate input.
Components Associated with Data Path
To execute the proper operation of a computing system, the function units of the data path
play a crucial role. Below are the primary function units that are part of data path design:

1. Arithmetic Logic Unit (ALU): It is one of the fundamental components of the data path. ALU
performs logical arithmetic operations on data like addition, subtraction, division,
multiplication, comparisons, and bitwise operations. ALU primarily takes input data from the
register and performs an operation on the data to produce the necessary output. It operates on
binary data, manipulating bits based on the control signals received from the control unit.

2. Registers: These are small storage elements in a processor known for their high speed. While
processing data, it stores the data temporarily. These data can be either intermediate results,
operands, or program counters.

3. BUS: It is a communication system that transfers data between various components of a

computer or between two computers. BUS is a collection of hardware components, including
optical fibers and wire. It also has software components, like communication protocols. It
allows data and instructions movement between memory, registers, and other peripherals.
ALU, registers, and various BUS together are termed as data paths.

4. Multiplexers: A data path also has multiplexers. These are required to select data from
multiple sources and route these to an appropriate destination. Multiplexers are essential for
the movement of data within a processor—these help in selecting from different inputs along
with directing them to the component on the focal point.

5. Control Unit: Any data path interacts with the control unit. This unit generates control signals
that coordinate the data path component’s activities.