CS3691 - EMBEDDED SYSTEMS AND INTERNET OF THINGS

Unit I
8-BIT EMBEDDED PROCESSOR

1. Introduction to Embedded System

An embedded system is nearly any computing system other than a desktop computer.
An embedded system is a dedicated system which performs the desired function upon
power up, repeatedly.
Embedded systems are found in a variety of common electronic devices such as
consumer electronics ex. Cell phones, pagers, digital cameras, VCD players, portable
Video games, calculators, etc.,
Embedded systems are found in a variety of common electronic devices, such as:
(a) consumer electronics -- cell phones, pagers, digital cameras, camcorders,
videocassette recorders, portable video games, calculators, and personal digital
assistants;
(b) home appliances -- microwave ovens, answering machines, thermostat, home
security, washing machines, and lighting systems;
(c) office automation -- fax machines, copiers, printers, and scanners;
(d) business equipment -- cash registers, curbside check-in, alarm systems, card
readers, product scanners, and automated teller machines;
(e) automobiles --transmission control, cruise control, fuel injection, anti-lock
brakes, and active suspension
1.1 Classifications of Embedded systems
1. Small Scale Embedded Systems: These systems are designed with a single 8- or 16-
bit microcontroller; they have little hardware and software complexities and involve
board- level design. They may even be battery operated. When developing embedded
software for these, an editor, assembler and cross assembler, specific to the
microcontroller or processor used, are the main programming tools. Usually, C
programming is used for developing these systems. C program compilation is done into
the assembly, and executable codes are then appropriately located in the system
memory. The software has to fit within the memory available and keep in view the
 need to limit power dissipation when system is running continuously.
2. Medium Scale Embedded Systems: These systems are usually designed with a single
or few 16- or 32-bit microcontrollers or DSPs or Reduced Instruction Set Computers
(RISCs). These have both hardware and software complexities. For complex software
design, there are the following programming tools: RTOS, Source code engineering
tool, Simulator, Debugger and Integrated DevelopmentEnvironment (IDE). Software
tools also provide the solutions to the hardware complexities. An assembler is of little
use as a programming tool. These systems may also employ the readily available ASSPs
and IPs (explained later) for the various functions—for example, for the bus interfacing,
encrypting, deciphering, discrete cosine transformation and inverse transformation,
TCP/IP protocol stacking and network connecting functions.
3. Sophisticated Embedded Systems: Sophisticated embedded systems have enormous
hardware and software complexities and may need scalable processors or configurable
processors and programmable logic arrays. They are used for cutting edgeapplications
that need hardware and software co-design and integration in the final system; however,
they are constrained by the processing speeds available in their hardware units. Certain
software functions such as encryption and deciphering algorithms, discrete cosine
transformation and inverse transformation algorithms, TCP/IP protocol stacking and
network driver functions are implemented in the hardware to obtain additional speeds
by saving time. Some of the functions of the hardware resources in the system are also
implemented by the software. Development tools for these systems may not be readily
available at a reasonable cost or may not be available at all. In some cases, a compiler
or retarget able compiler might have to be developed for these.
The processing units of the embedded system
1. Processor in an Embedded System A processor is an important unit in the embedded
system hardware. A microcontroller is an integrated chip that has the processor,
memory and several other hardware units in it; these form the microcomputer part of
the embedded system. An embedded processor is a processor with special features that
allow it to be embedded into a system. A digital signal processor (DSP) is a processor
meant for applications that process digital signals.
2. Commonly used microprocessors, microcontrollers and DSPs in the small-, medium-
and large scale embedded systems
 3. A recently introduced technology that additionally incorporates the application-
specific system processors (ASSPs) in the embedded systems.
4. Multiple processors in a system.
Embedded systems are a combination of hardware and software as well as other
components that we bring together inti products such as cell phones, music player, a
network router, or an aircraft guidance system. They are a system within another system
as we see in Figure 1.1

Figure 1.1: A simple embedded system

1.3 Building an embedded system
We embed 3 basic kinds of computing engines into our systems: microprocessor,
microcomputer and microcontrollers. The microcomputer and other hardware are connected
via A system bus is a single computer bus that connects the major components of a
computer system. The technique was developed to reduce costs and improve modularity. It
combines the functions of a data bus to carry information, an address bus to determine where
it should be sent, and a control bus to determine its operation.
The system bus is further classified int address, data and control bus. The
microprocessor controls the whole system by executing a set of instructions call firmware
that is stored in ROM. An instruction set, or instruction set architecture (ISA), is the part of
the computer architecture related to programming, including the native data types,
instructions, registers, addressing modes, memory architecture, interrupt and exception
handling, and external I/O. An ISA includes a specification of the set of opcodes (machine
language), and the native commands implemented by a particular processor. To run the
application, when power is first turned ON, the microprocessor addresses a predefined
location and fetches, decodes, and executes the instruction one after the other. The
implementation of a microprocessor based embedded system combines the individual
pieces into an integrated whole as shown in Figure 1.2, which represents the architecture
for a typical embedded system and identifies the minimal set of necessary components.

Figure 1.2: A Microprocessor based embedded system

2. Embedded design and development process

Figure1.3 shows a high level flow through the development process and
identifies the major elements of the development life cycle.

Figure 1.3 Embedded system life cycle

The traditional design approach has been traverse the two sides of the
accompanying diagram separately, that is,
● Design the hardware components
● Design the software components.
 ● Bring the two together.
● Spend time testing and debugging the system.
The major areas of the design process are
● Ensuring a sound software and hardware specification.
● Formulating the architecture for the system to be designed.
● Partitioning the h/w and s/w.
● Providing an iterative approach to the design of h/w and s/w.
The important steps in developing an embedded system are
● Requirement definition.
● System specification.
● Functional design
● Architectural design
● Prototyping
The major aspects in the development of embedded applications are
● Digital hardware and software architecture
● Formal design, development, and optimization process.
● Safety and reliability.
● Digital hardware and software/firmware design.
● The interface to physical world analog and digital signals.
● Debug, troubleshooting and test of our design.

Figure 1.4: Interfacing to the outside world

Embedded applications are intended to work with the physical world, sensing
various analog and digital signals while controlling, manipulating or responding to others.
The study of the interface to the external world extends the I/O portion of the von-Neumann
machine as shown in figure 1.4 with a study of buses, their constitutes and their timing
considerations.

3. System Model-Exemplary applications of each type of embedded system

Embedded systems have very diversified applications. A few select application areas
of embedded systems are Telecom, Smart Cards, Missiles and Satellites, Computer
Networking, Digital Consumer Electronics, and Automotive. Figure 1.9 shows the
applications of embedded systems in these areas.

Figure 1.9 Applications of embedded systems

 8051 MICROCONTROLLER
INTRODUCTION:
− The 8051 is an 8-bit microcontroller with 8 bit data bus and 16-bit address bus.
− The 16 bit address bus can address a 64K( 216) byte code memory space
and a separate 64K byte of data memory space.
− The 8051 has 4K on-chip read only code memory and 128 bytes of internal
Random Access Memory(RAM)
− Besides internal RAM, the 8051 has various Special Function Registers
(SFR) such as the Accumulator, the B register, and many other control
registers.
− 34 8-bit general purpose registers in total.
− The ALU performs one 8-bit operation at a time.
− Two 16 bit /Counter timers
− 3 internal interrupts (one serial), 2 external interrupts.
− Four 8-bit I/O ports
− Some 8051 chips come with UART for serial communication and ADC for
analog to digital Conversion

Comparisons of Microcontroller and Microprocessor:

Microprocessor Microcontroller

A microprocessor is a general purpose A microcontroller is a dedicated chip which

device which is called a CPU is also called single chip computer.
A microprocessor do not contain on chip A microcontroller includes RAM, ROM, serial
I/O Ports, Timers, Memories etc. and parallel interface, timers, interrupt circuitry
(in addition to CPU) in a
single chip.
Microprocessors are most commonly Microcontrollers are used in small,
used as the CPU in microcomputer minimum component designs performing
systems. control-oriented applications.
Microprocessor instructions are mainly Microcontroller instructions are both bit
addressable as well as byte addressable.
nibble or byte addressable.
Microprocessor based system design is Microcontroller based system design is

complex and expensive rather simple and cost effective

The instruction set of a Microcontroller is very
The Instruction set of microprocessor is
simple with less number of instructions. For,
complex with large number of
ex: PIC microcontrollers
instructions.
have only 35 instructions.

A microprocessor has zero status flag. A microcontroller has no zero flag.

PIN DIAGRAM OF 8051

Pin out Description:
Pins 1-8: Port 1 Each of these pins can be
configured as an input or an output.
Pin 9: RST A logic one on this pin disables
the microcontroller and clears the contents
of most registers. In other words, the
positive voltage on this pin resets the
microcontroller. By applying logic zero to
this pin, the program starts execution from
the beginning.
Pins10-17: Port 3 Similar to port 1, each of
these pins can serve as general input or
output. Besides, all of them have alternative
functions:
Pin10: RXD Serial asynchronous
communication input or Serial synchronous
communication output.
Pin11: TXD Serial asynchronous
communication output or Serial
synchronous communication clock output.
Pin 12: INT0 Interrupt 0 inputs.
Pin 13: INT1
Interrupt 1 input.
Pin 14: T0 Counter
0 clock input. Pin
15: T1 Counter 1
clock input.
Pin 16: WR Write to external (additional) RAM.
Pin 17: RD Read from external RAM.
Pin 18, 19: XTAL2/XTALI is for oscillator input
Pin 20: GND-Ground.
Pin 21-28: Port 2- If there is no intention to use external memory then these port pins are
configured as general inputs/outputs. In case external memory is used, the higher address
byte, i.e. addresses A8-A15 will appear on this port. Even though memory with capacity of
64Kb is not used, which means that not all eight port bits are used for its addressing, the rest
of them are not available as inputs/outputs.
Pin 29: PSEN’- Program Store Enable. If external ROM is used for storing
program, then a logic zero(0) appears on it every time the microcontroller reads a
byte from memory.
Pin 30: ALE – Address latch
enable 1 – Address on AD 0 to
AD7
0 – Data on AD 0 to AD 7
Pin 31: EA’ – it indicates the presence of external memory
Pin 32-39: Port 0 Similar to P2.
Pin 40: VCC → +5V power supply.

FUNCTIONAL BLOCK DIAGRAM OF 8051 MICROCONTROLLER

1. Internal ROM and RAM

2. I/O Ports with programmable Pins
3. ALU Working Registers
4. Clock Circuits
5. Timers and Counters
 6. Serial Data Communication

Figure 2: Block Diagram of 8051 Specific Features

CENTRAL PROCESSING UNIT

⮚ The CPU is the brain of the microcontrollers expected task reading user's
programs and executing the as per instructions stored there in.

⮚ Its primary elements are an Accumulator (AC), Stack Pointer (SP) Program
Counter (PC), Program Status Word (PSW), Data Pointer (DTPR) and few
more 8-bit register.
ARITHMETIC LOGIC UNIT (ALU)

⮚ The arithmetic / logic unit performs the computing functions; it includes

the accumulator, temporary register, arithmetic and logic circuits.

⮚ The temporary register is used to hold data during an arithmetic / logic operation.
⮚ The result is stored in the accumulator register.
ACCUMULATOR

⮚ The accumulator register (ACC or A) act as an operand register, in case

of some instructions.

⮚ This may either be implicit or specified in the instruction.

⮚ The ACC register has been allotted on address in the on-chip special
function register bank
 Figure 3: Architecture of 8051

Types of Registers In 8051 Microcontroller

8051 microcontrollers mainly contain two types of registers:

1. General-purpose registers (Byte addressable registers)
2. Special function registers (Bit addressable registers)

General Purpose Registers

We know that a register is a storage element that can be store bits of information.
8051 microcontroller has 4 registers bank . These are B0, B1, B2, and B3 stand for Bank0,
Bank1, Bank2, Bank3 respectively and each bank contains eight general purpose registers
ranging from ‘R0’ to ‘R7’.
These are 32 general purpose registers address from 00h to 1Fh.
• The address range of Register Bank 0 ( 00 h to 07 h)
• The address range of Register Bank 1 ( 08 h to F h)
• The address range of Register Bank 2 ( 10 h to 17 h)
 • The address range of Register Bank 3 ( 18 h to 1F h)

These Register Banks are selected with the help of PSW (Program Status Word)Register bits
i.e. RS0, RS1.

General Purpose Registers

Banks and Registers

Categories of 8051 Microcontroller Special Function Registers

There are many ways to categorize these 21 Special Function Registers but I find thefollowing
way as an appropriate one. The 21 Special Function Registers of 8051 Microcontroller are
categorized in to seven groups. They are:

Math or CPU Registers: A and B

Status Register: PSW (Program Status Word)

Pointer Registers: DPTR (Data Pointer – DPL, DPH) and SP (Stack Pointer)

I/O Port Latches: P0 (Port 0), P1 (Port 1), P2 (Port 2) and P3 (Port 3)

Peripheral Control Registers: PCON, SCON, TCON, TMOD, IE and IP

Peripheral Data Registers: TL0, TH0, TL1, TH1 and SBUF

All the 21 8051 Microcontroller Special Function Registers (SFRs) along with their
functions and Internal RAM Address is given in the following table.
CPU or Math Registers A
or Accumulator (ACC)
The Accumulator or Register A is the most important and most used 8051 Microcontroller
SFRs. The Register A is located at the address E0H in the SFR memory space. The
Accumulator is used to hold the data for almost all the ALU Operations.
Some of the operations where the Accumulator is used are:
• Arithmetic Operations like Addition, Subtraction, Multiplication etc.
• Logical Operations like AND, OR, NOT etc.
• Data Transfer Operations (between 8051 and External Memory)
The name “Accumulator” came from the fact this register is used to accumulate (or store) the
result of all Arithmetic and most of the Logical Operations.

B (Register B)
The B Register is used along with the ACC in Multiplication and Division operations. These
two operations are performed on data that are stored only in Registers A and B. During
Multiplication Operation, one of the operand (multiplier or multiplicand) is stores in B
Register and also the higher byte of the result.
In case of Division Operation, the B Register holds the divisor and also the remainder of the
result. It can also be used as a General Purpose Register for normal operations and is often used
as an Auxiliary Register by Programmers to store temporary results.
Register B is located at the address F0H of the SFR Address Space.

Program Status Word (PSW)

The PSW or Program Status Word Register is also called as Flag Register and is one of the
important SFRs. The PSW Register consists of Flag Bits, which help the programmer in
checking the condition of the result and also make decisions.
Flags are 1-bit storage elements that store and indicate the nature of the result that isgenerated
by execution of certain instructions. The following image shows the contents of the PSW
Register.

The following table describes the function of each flag.

Pointer Registers
Data Pointer (DPTR – DPL and DPH)
The Data Pointer is a 16-bit Register and is physically the combination of DPL (Data Pointer
Low) and DPH (Data Pointer High) SFRs. The Data Pointer can be used as a single 16-bit
register (as DPTR) or two 8-bit registers (as DPL and DPH).
− DPTR doesn’t have a physical Memory Address but the DPL (Lower Byte of DPTR)
and DPH (Higher Byte of DPTR) have separate addresses in the SFR Memory Space.
DPL = 82H and DPH = 83H.
− The DPTR Register is used by the programmer addressing external memory (Program
– ROM or Data – RAM).

Stack Pointer (SP)

SP or Stack Pointer points out to the top of the Stack and it indicates the next data to be
accessed. Stack Pointer can be accesses using PUSH, POP, CALL and RET Instructions. The
Stack Pointer is an 8-bit register and upon reset, the Stack Pointer is initialized with 07H.
When writing a new data byte into the stack, the SP (Stack Pointer) is automatically
incremented by 1 and the new data is written at an address SP+1. When reading data from
stack, the data is retrieved from the Address in SP and after that the SP is decremented by 1
(SP-1).
I/O Port Registers (P0, P1, P2 and P3)

The 8051 Microcontroller four Ports which can be used as Input and/or Output. These four
ports are P0, P1, P2 and P3. Each Port has a corresponding register with same names (the
Port Registers are also P0, P1, P2 and P3). The addresses of the Port Registers are as follows:
P0 – 80H, P1 – 90H, P2 – A0H and P2 – B0H.
Each bit in these SFRs corresponds to one physical Pin in the 8051 Microcontroller. All these
Port Registers are both Bit Addressable and Byte Addressable. Writing 1 or 0 on a Port Register
Bit will reflect as an appropriate voltage (5V and 0V) on the corresponding Pin.
If a Port Bit is SET (declared as 1), the corresponding Port Pin will be configured as Input and
similarly if a Port Bit is CLEARED (declared as 0), the corresponding Port Pin is configured
as Output. Upon reset, all the Port Bits are SET (1) and hence, all the Port Pins are configured
as Inputs.

Peripheral Control Registers

PCON (Power Control)

The PCON or Power Control register, as the name suggests is used to control the 8051
Microcontroller’s Power Modes and is located at 87H of the SFR Memory Space. Using two
bits in the PCON Register, the microcontroller can be set to Idle Mode and Power Down Mode.
NOTE: PCON register is not bit addressable.
− During Idle Mode, the Microcontroller will stop the Clock Signal to the ALU (CPU)
but it is given to other peripherals like Timer, Serial, Interrupts, etc. In order to
terminate the Idle Mode, you have to use an Interrupt or Hardware Reset.
− In the Power Down Mode, the oscillator will be stopped and the power will be reduced
to 2V. To terminate the Power Down Mode, you have to use the Hardware Reset.
− Apart from these two, the PCON Register can also be used for few additional purposes.
The SMOD Bit in the PCON Register is used to control the Baud Rate of the Serial
Port.
There are two general purpose Flag Bits in the PCON Register, which can be used by the
programmer during execution.

The following table describes the function of each bit in the PCON Register.
Bit Symbol Description Additional Info
7 SMOD Serial Comm. Baud Rate Modify Bit If 1, doubles the baud
rate using Timer 1. If 0,
normal timer 1 baud
rate.
6–4 —- —
3 GF1 General Purpose User Flag (Bit 1)
2 GF0 General Purpose User Flag (Bit 0)
1 PD Power Down Bit To enter Power Down
Mode, set to 1
0 IDL Idle Mode Bit To enter Idle Down
Mode, set to 1

SCON (Serial Control)

The Serial Control or SCON SFR is used to control the 8051 Microcontroller’s Serial Port. It
is located as an address of 98H. Using SCON, you can control the Operation Modes of the
Serial Port, Baud Rate of the Serial Port and Send or Receive Data using Serial Port.
SCON Register also consists of bits that are automatically SET when a byte of data is
transmitted or received.

The following table describes the function of each bit in the SCON Register.

Bit Symbol Description

7 SM0 Serial Port Mode Selection Bit 0
6 SM1 Multiprocessor Comm. Bit
5 SM2 Receive Enable Bit
4 REN
3 TB8 Transmitted Bit 8
2 RB8 Received Bit 8
1 TI Transmit Interrupt Flag
0 RI Receive Interrupt Flag
The Serial Port Mode Selection Bits (SM0 and SM1) determine the mode of UART and also
the baud rate. The following table gives an overview of how the Serial Port Mode Selection
Bits can be used to configure Serial Port (UART) of 8051.
Serial Port Mode Selection Bits
SM0 SM1 Mode Description Baud Rate
0 0 0 8-Bit Synchronous Shift Fixed Baud Rate
Register Mode (Frequency of oscillator / 12)
0 1 1 8-bit Standard UART Variable Baud Rate (Can be set by Timer
mode 1)

1 0 2 9-bit Multiprocessor Comm. Fixed Baud Rate

Mode (Frequency of oscillator / 32 or
Frequency of oscillator / 64
1 1 3 9-bit Multiprocessor Comm. Variable Baud Rate (Can be set by Timer
Mode 1)
TCON (Timer Control)
Timer Control or TCON Register is used to start or stop the Timers of 8051 Microcontroller.
It also contains bits to indicate if the Timers has overflowed. The TCON SFR also consists of
Interrupt related bits.

The following table gives the description of each bit in the TCON SFR.
Bit Symbol Description Additional Info
7 TF1 Timer 1 Overflow Flag Set when Timer 1 overflows (all 1s to 0).
Cleared when processor executes ISR at 001BH.

6 TR1 Timer 1 Run Control Bit To enable Timer/Counter, set to 1. Clear to halt
the timer.
5 TF0 Timer 0 Overflow Flag Set when Timer 0 overflows (all 1s to 0).
Cleared when processor executes ISR at 000BH.

4 TR0 Timer 0 Run Control Bit To enable Timer/Counter, set to 1. Clear to halt
the timer.
3 IE1 Ext. Interrupt 1 Edge Flag Set when HIGH to LOW is received on INT1
(P3.3). Cleared when processor executes ISR at
0013H.
2 IT1 Ext. Interrupt 1 Type If 1, Interrupt 1 occurs on falling edge. If 0,
Control Bit Interrupt 1 occurs on low level.
1 IE0 Ext. Interrupt 0 Edge Flag Set to 1 when HIGH to LOW is received on
INT0 (P3.2). Cleared when processor executes
ISR at 0003H.
0 IT0 Ext. Interrupt 0 Type If 1, Interrupt 0 occurs on falling edge. If 0,
Control Bit Interrupt 0 occurs on low level.

TMOD (Timer Mode)

The TMOD or Timer Mode register or SFR is used to set the Operating Modes of the Timers
T0 and T1. The lower four bits are used to configure Timer0 and the higher four bits are used
to configure Timer1.
The following table gives a brief description of each bit in the TMOD SFR.
Bit Symbol Description
7/3 Gate OR Gate Enable Bit
6/2 C/Tx Select Timer or Counter Mode
5/1 TxM1 Timer / Counter Operating Mode
Select Bit 1
4/0 TxM0 Timer / Counter Operating Mode
Select Bit 0

The Gatex bit is used to operate the Timerx with respect to the INTx pin or regardless of the
INTx pin.
• GATE1 = 1 ==> Timer1 is operated only if TR1 (in TCON) is SET and Signal on
INT1 is HIGH.
• GATE1 = 0 ==> Timer1 is operated irrespective of Signal on INT1 pin but TR1 (in
TCON) must be SET.
• GATE0 = 1 ==> Timer0 is operated only if TR0 (in TCON) is SET and Signal on
INT0 is HIGH.
•
GATE0 = 0 ==> Timer0 is operated irrespective of Signal on INT0 pin but TR0 (in
TCON) must be SET.
The C/Tx bit is used selects the source of pulses for the Timer to count.
• C/T1 = 1 ==> Timer1 counts pulses from Pin T1 (P3.5) (Counter Mode)
• C/T1 = 0 ==> Timer1 counts pulses from internal oscillator (Timer Mode)
• C/T0 = 1 ==> Timer0 counts pulses from Pin T0 (P3.4) (Counter Mode)
• C/T0 = 0 ==> Timer0 counts pulses from internal oscillator (Timer Mode)

TxM0 TxM1 Mode Description

0 0 0 13-bit Timer Mode (THx – 8-bit and TLx – 5-bit)
0 1 1 16-bit Timer Mode
1 0 2 8-bit Auto Reload Timer Mode
1 1 3 Two 8-bit Timer Mode or Split Timer Mode
NOTE: x = 0 for Timer 0 and x = 1 for Timer 1.
IE (Interrupt Enable)
The IE or Interrupt Enable Register is used to enable or disable individual interrupts. If a bit
is SET, the corresponding interrupt is enabled and if the bit is cleared, the interrupt is disabled.
The Bit7 of the IE register i.e., EA bit is used to enable or disable all the interrupts.

The following table describes the functions of each bit in the IE Register.
Bit Symbol Description Additional Info
7 EA Global Interrupt Enable Bit. If set to 1, individual interrupts can
be enabled. If set to 0, all interrupts
are disabled.
6 — —
5 ET2 Reserved
4 ES Serial Port Interrupt Enable If set to 1, Serial Port interrupt is
Bit enabled. If set to 0, Serial Port
interrupt is disabled.
3 ET1 Timer 1 Overflow Interrupt If set to 1, Timer 1 Overflow
Enable Bit interrupt is enabled. If set to 0,
Timer 1 Overflow interrupt is
disabled.
2 EX1 Ext. Interrupt 1 Enable Bit If set to 1, Ext. Interrupt 1 is
enabled. If set to 0, Ext. Interrupt 1
is disabled.
1 ET0 Timer 0 Overflow Interrupt If set to 1, Timer 0 Overflow
Enable Bit interrupt is enabled. If set to 0,
Timer 0 Overflow interrupt is
disabled.
0 EX0 Ext. Interrupt 0 Enable Bit If set to 1, Ext. Interrupt 0 is
enabled. If set to 0, Ext. Interrupt 0
is disabled.
NOTE: The Interrupt Enable (IE) SFR is bit addressable.

IP (Interrupt Priority)
The IP or Interrupt Priority Register is used to set the priority of the interrupt as High or Low.
If a bit is CLEARED, the corresponding interrupt is assigned low priority and if the bit is SET,
the interrupt is assigned high priority.
The following table describes the functions of each bit in the IP Register.
Bit Symbol Description
7 — —
6 — —
5 PT2 Reserved
4 PS Priority of Serial Port Interrupt
3 PT1 Priority of Timer 1 Overflow Interrupt
2 PX1 Priority of Ext. Interrupt 1
1 PT0 Priority of Timer 0 Overflow Interrupt
0 PX0 Priority of Ext. Interrupt 0
NOTE: The Interrupt Priority (IP) SFR is bit addressable.

Peripheral Data Registers

SBUF (Serial Data Buffer)
The Serial Buffer or SBUF register is used to hold the serial data while transmission or
reception.

TL0/TH0 (Timer 0 Low/High)

The Timer 0 consists of two SFRs: TL0 and TH0. The TL0 is the lower byte and the TH0 is
the higher byte and together they form a 16-bit Timer0 Register.
TL1/TH1 (Timer 1 Low/High)
The TL1 and TH1 are the lower and higher bytes of the Timer 0.

In this tutorial, we have seen the 8051 Microcontroller Special Function Registers (SFRs), their
addresses, structures, reset values etc.

8051 Addressing Modes

What is an Addressing Mode?

An Addressing Mode is a way to locate a target Data, which is also called as Operand. The
8051 Family of Microcontrollers allows five types of Addressing Modes for addressing the
Operands. They are:
• Immediate Addressing
• Register Addressing
 • Direct Addressing
• Register – Indirect Addressing
• Indexed Addressing

Immediate Addressing
In Immediate Addressing mode, the operand, which follows the Opcode, is a constant data of
either 8 or 16 bits. The name Immediate Addressing came from the fact that the constant data
to be stored in the memory immediately follows the Opcode.
The constant value to be stored is specified in the instruction itself rather than taking from a
register. The destination register to which the constant data must be copied should be the
same size as the operand mentioned in the instruction.
Example: MOV A, #030H
Here, the Accumulator is loaded with 30 (hexadecimal). The # in the operand indicates that it
is a data and not the address of a Register.
Immediate Addressing is very fast as the data to be loaded is given in the instruction itself.

Register Addressing
In the 8051 Microcontroller Memory Organization Tutorial, we have seen the organization of
RAM and four banks of Working Registers with eight Registers in each bank.
In Register Addressing mode, one of the eight registers (R0 – R7) is specified as Operand in
the Instruction.
It is important to select the appropriate Bank with the help of PSW Register. Let us see a
example of Register Addressing assuming that Bank0 is selected.
Example: MOV A, R5
Here, the 8-bit content of the Register R5 of Bank0 is moved to the Accumulator.

Direct Addressing
In Direct Addressing Mode, the address of the data is specified as the Operand in the
instruction. Using Direct Addressing Mode, we can access any register or on-chip variable.
This includes general purpose RAM, SFRs, I/O Ports, Control registers.
Example: MOV A, 47H
Here, the data in the RAM location 47H is moved to the Accumulator.

Register Indirect Addressing

In the Indirect Addressing Mode or Register Indirect Addressing Mode, the address of the
Operand is specified as the content of a Register. This will be clearer with an example.
Example: MOV A, @R1
The @ symbol indicates that the addressing mode is indirect. If the contents of R1 is 56H, for
example, then the operand is in the internal RAM location 56H. If the contents of the RAM
location 56H is 24H, then 24H is moved into accumulator.
Only R0 and R1 are allowed in Indirect Addressing Mode. These register in the indirect
addressing mode are called as Pointer registers.
Indexed Addressing Mode
With Indexed Addressing Mode, the effective address of the Operand is the sum of a base
register and an offset register. The Base Register can be either Data Pointer (DPTR) or
Program Counter (PC) while the Offset register is the Accumulator (A).
In Indexed Addressing Mode, only MOVC and JMP instructions can be used. Indexed
Addressing Mode is useful when retrieving data from look-up tables.
Example: MOVC A, @A+DPTR
Here, the address for the operand is the sum of contents of DPTR and Accumulator.

8051 Microcontroller Instruction Set

The following table shows the 8051 Instruction Groups and Instructions in each group. There
are 49 Instruction Mnemonics in the 8051 Microcontroller Instruction Set and these 49
Mnemonics are divided into five groups.

DATA ARITHMETIC LOGICAL BOOLEAN PROGRAM

TRANSFER BRANCHING
MOV ADD ANL CLR LJMP
MOVC ADDC ORL SETB AJMP
MOVX SUBB XRL MOV SJMP
PUSH INC CLR JC JZ
POP DEC CPL JNC JNZ
XCH MUL RL JB CJNE
XCHD DIV RLC JNB DJNZ
DA A RR JBC NOP
RRC ANL LCALL
SWAP ORL ACALL
CPL RET
RETI
JMP

Data Transfer Instructions

The Data Transfer Instructions are associated with transfer of data between registers or
external program memory or external data memory. The Mnemonics associated with Data
Transfer are given below.
Mnemonic Description
MOV Move Data
MOVC Move Code
MOVX Move External Data
PUSH Move Data to Stack
 POP Copy Data from Stack
XCH Exchange Data between two
Registers
XCHD Exchange Lower Order Data
between two Registers
The following table lists out all the possible data transfer instructions along with other details
like addressing mode, size occupied and number machine cycles it takes.
Arithmetic Instructions
Using Arithmetic Instructions, you can perform addition, subtraction, multiplication and
division. The arithmetic instructions also include increment by one, decrement by one and a
special instruction called Decimal Adjust Accumulator.
The Mnemonics associated with the Arithmetic Instructions of the 8051 Microcontroller
Instruction Set are:

Mnemonic

ADD Addition without Carry

ADDC Addition with Carry

SUBB Subtract with Carry

INC Increment by 1

DEC Decrement by 1

MUL Multiply

DIV Divide

DA A Decimal Adjust the Accumulator (A Register)

The arithmetic instructions have no knowledge about the data format i.e., signed, unsigned,
ASCII, BCD, etc. Also, the operations performed by the arithmetic instructions affect flags
like carry, overflow, zero, etc. in the PSW Register.
All the possible Mnemonics associated with Arithmetic Instructions are mentioned in the
following table.
Logical Instructions
The next group of instructions are the Logical Instructions, which perform logical operations
like AND, OR, XOR, NOT, Rotate, Clear and Swap. Logical Instruction are performed on
Bytes of data on a bit-by-bit basis.
Mnemonics associated with Logical Instructions are as follows:
•

Mnemonic Description

ANL Logical AND

ORL Logical OR

XRL Ex-OR

CLR Clear Register

CPL Complement the Register

RL Rotate a Byte to Left

RLC Rotate a Byte and Carry Bit to Left

RR Rotate a Byte to Right

RRC Rotate a Byte and Carry Bit to Right

SWAP Exchange lower and higher nibbles in a Byte

The following table shows all the possible Mnemonics of the Logical Instructions.
Boolean or Bit Manipulation Instructions
As the name suggests, Boolean or Bit Manipulation Instructions deal with bit variables. We
know that there is a special bit-addressable area in the RAM and some of the Special
Function Registers (SFRs) are also bit addressable.
The Mnemonics corresponding to the Boolean or Bit Manipulation instructions are:

Mnemonic Description

CLR Clear a Bit (Reset to 0)

SETB Set a Bit (Set to 1)

MOV Move a Bit

JC Jump if Carry Flag is Set

JNC Jump if Carry Flag is Not Set

JB Jump if specified Bit is Set

JNB Jump if specified Bit is Not Set

JBC Jump if specified Bit is Set and also clear the Bit

ANL Bitwise AND

ORL Bitwise OR

CPL Complement the Bit

These instructions can perform set, clear, and, or, complement etc. at bit level. All the
possible mnemonics of the Boolean Instructions are specified in the following table.
Program Branching Instructions
The last group of instructions in the 8051 Microcontroller Instruction Set are the Program
Branching Instructions. These instructions control the flow of program logic. The mnemonics
of the Program Branching Instructions are as follows.
Mnemonic Description
LJMP Long Jump (Unconditional)
AJMP Absolute Jump (Unconditional)
SJMP Short Jump (Unconditional)
JZ Jump if A is equal to 0
JNZ Jump if A is not equal to 0
CJNE Compare and Jump if Not Equal
 DJNZ Decrement and Jump if Not Zero
NOP No Operation
LCALL Long Call to Subroutine
ACALL Absolute Call to Subroutine (Unconditional)
RET Return from Subroutine
RETI Return from Interrupt
JMP Jump to an Address (Unconditional)
All these instructions, except the NOP (No Operation) affect the Program Counter (PC) in
one way or other. Some of these instructions has decision making capability before
transferring control to other part of the program.
The following table shows all the mnemonics with respect to the program branching
instructions.
 Basic Programming in 8051

Statement 1: – exchange the content of FFh and FF00h

Solution: – here one is internal memory location and other is memory external location. so first

the content of ext memory location FF00h is loaded in acc. then the content of int memory

location FFh is saved first and then content of acc is transferred to FFh. now saved content of

FFh is loaded in acc and then it is transferred to FF00h.

Mov dptr, #0FF00h ; take the address in dptr

Movx a, @dptr ; get the content of 0050h in a
Mov r0, 0FFh ; save the content of 50h in r0

Mov 0FFh, a ; move a to 50h

Mov a, r0 ; get content of 50h in a

Movx @dptr, a ; move it to 0050h

RET

Duplication and Subtraction

Statement 2: – store the higher nibble of r7 in to both nibbles of r6

Solution: –first we shall get the upper nibble of r7 in r6. Then we swap nibbles of r7 and

make OR operation with r6 so the upper and lower nibbles are duplicated
Mov a, r7 ; get the content in acc

Anl a, #0F0h ; mask lower bit

Mov r6, a ; send it to r6

Swap a ; xchange upper and lower nibbles of acc

Orl a, r6 ; OR operation

Mov r6, a ; finally load content in r6

RET
Statement 3: – treat r6-r7 and r4-r5 as two 16 bit registers. Perform subtraction between

them. Store the result in 20h (lower byte) and 21h (higher byte).
Solution: – first we shall clear the carry. Then subtract the lower bytes afterward then

subtract higher bytes.

Clr c ; clear carry

Mov a, r4 ; get first lower byte

Subb a, r6 ; subtract it with other

Mov 20h, a ; store the result

Mov a, r5 ; get the first higher byte

Subb a, r7 ; subtract from other

Mov 21h, a ; store the higher byte

RET

Division & Data Transfer

Statement 4: – divide the content of r0 by r1. Store the result in r2 (answer) and r3

(reminder). Then restore the original content of r0.

Solution:-after getting answer to restore original content we have to multiply answer with

divider and then add reminder in that.

Mov a, r0 ; get the content of r0 and r1

Mov b, r1 ; in register A and B

Div ab ; divide A by B

Mov r2, a ; store result in r2

Mov r3, b ; and reminder in r3

Mov b, r1 ; again get content of r1 in B

Mul ab ; multiply it by answer

Add a, r3 ; add reminder in new answer

Mov r0, a ; finally restore the content of r0

RET
Statement 5: – transfer the block of data from 20h to 30h to external location 1020h to

1030h.
Solution: – here we have to transfer 10 data bytes from internal to external RAM. So first,

we need one counter. Then we need two pointers one for source second for destination.
Mov r7, #0Ah ; initialize counter by 10d

Mov r0, #20h ; get initial source location

Mov dptr, #1020h ; get initial destination location

Nxt: Mov a, @r0 ; get first content in acc

Movx @dptr, a ; move it to external location

Inc r0 ; increment source location

Inc dptr ; increase destination location

Djnz r7, nxt ; decrease r7. if zero then over otherwise move next

RET

Various Comparison Programs

Statement 6: – find out how many equal bytes between two memory blocks 10h to 20h and

20h to 30h.

Solution: – here we shall compare each byte one by one from both blocks. Increase the count

every time when equal bytes are found

Mov r7, #0Ah ; initialize counter by 10d

Mov r0, #10h ; get initial location of block1

Mov r1, #20h ; get initial location of block2

Mov r6, #00h ; equal byte counter. Starts from zero

Nxt: Mov a, @r0 ; get content of block 1 in acc

Mov b, a ; move it to B

Mov a, @r1 ; get content of block 2 in acc

Cjne a, b, nomatch ; compare both if equal

Inc r6 ; increment the counter
Nomatch: inc r0 ; otherwise go for second number

Inc r1

djnz r7, nxt ; decrease r7. if zero then over otherwise move next
RET

Statement 7: – given block of 100h to 200h. Find out how many bytes from

this block are greater then the number in r2 and less then number in r3. Store
the count in r4.

Solution: – in this program, we shall take each byte one by one from given

block. Now here two limits are given higher limit in r3 and lower limit in r2.

So we check first higher limit andthen lower limit if the byte is in between

these limits then count will be incremented.

Mov dptr, #0100h ; get initial location

Mov r7, #0FFh ; counter

Mov r4, #00h ; number counter

Mov 20h, r2 ; get the upper and lower limits in

Mov 21h, r3 ; 20h and 21h

Nxt: Movx a, @dptr ; get the

content in acc Cjne a, 21h, lower

; check the upper limit first
Sjmp out ; if number is larger

Lower: jnc out ; jump out

Cjne a, 20h, limit ; check lower limit

Sjmp out ; if number is lower

Limit: jc out ; jump out

Inc r4 ; if number within limit increment count

Out: inc dptr ; get next location

 Djnz r7, nxt ; repeat
until block completesRET

1. I/O Programming

In 8051, I/O operations are done using four ports and 40 pins. The following pin diagram
shows the details of the 40 pins. I/O operation port reserves 32 pins where each port has 8 pins.
The other 8 pins are designated as Vcc, GND, XTAL1, XTAL2, RST, EA (bar), ALE/PROG (bar),
and PSEN (bar).It is a 40 Pin PDIP (Plastic Dual Inline Package)

I/O Ports and their Functions

The four ports P0, P1, P2, and P3, each use 8 pins, making them 8-bit ports. Upon RESET,
all the ports are configured as inputs, ready to be used as input ports. When the first 0 is written to
a port, it becomes an output. To reconfigure it as an input, a 1 must be sent to a port.
Port 0 (Pin No 32 – Pin No 39)

It has 8 pins (32 to 39). It can be used for input or output. Unlike P1, P2, and P3 ports, we
normally connect P0 to 10K-ohm pull-up resistors to use it as an input or output port being an open
drain.
It is also designated as AD0-AD7, allowing it to be used as both address and data. In case
of 8031 (i.e. ROMless Chip), when we need to access the external ROM, then P0 will be used for
both Address and Data Bus. ALE (Pin no 31) indicates if P0 has address or data. When ALE = 0,
it provides data D0-D7, but when ALE = 1, it has address A0-A7. In case no external memory
connection is available, P0 must be connected externally to a 10K-ohm pull-up resistor.

MOV A,#0FFH //(comments: A=FFH(Hexadecimal i.e. A=1111 1111)

MOV P0,A //(Port0 have 1's on every pin so that it works as Input)

Dual Role of Port 0

Port 0 is also designated as AD0–AD7, as it can be used for both data and address handling.
While connecting an 8051 to external memory, Port 0 can provide both address and data. The 8051
microcontroller then multiplexes the input as address or data in order to save pins.
Port 1 (Pin 1 through 8)

It is an 8-bit port (pin 1 through 8) and can be used either as input or output. It doesn't
require pull-up resistors because they are already connected internally. Upon reset, Port 1 is
configured as an input port. The following code can be used to send alternating values of 55H and
AAH to Port 1.
Toggle all bits of continuously
MOV A,#55
BACK: MOV P2,A
ACALL DELAY
CPL A //complement(invert) reg. A
SJMP BACK

If Port 1 is configured to be used as an output port, then to use it as an input port again, program it
by writing 1 to all of its bits as in the following code.
 MOV A ,#0FFH //A = FF hex
MOV P1,A //Make P1 an input port
MOV A,P1 //get data from P1
MOV R7,A //save it in Reg R7
ACALL DELAY //wait

Port 2 (Pins 21 through 28)

Port 2 occupies a total of 8 pins (pins 21 through 28) and can be used for both input and
output operations. Just as P1 (Port 1), P2 also doesn't require external Pull-up resistors because
they are already connected internally. It must be used along with P0 to provide the 16-bit address
for the external memory. So it is also designated as (A0–A7), as shown in the pin diagram. When
the 8051 is connected to an external memory, it provides path for upper 8-bits of 16-bits address,
and it cannot be used as I/O. Upon reset, Port 2 is configured as an input port. The following code
can be used to send alternating values of 55H and AAH to port 2.
//Toggle all bits of continuously
MOV A,#55
BACK: MOV P2,A
ACALL DELAY
CPL A // complement(invert) reg. A
SJMP BACK
If Port 2 is configured to be used as an output port, then to use it as an input port again, program it
by writing 1 to all of its bits as in the following code.
//Get a byte from P2 and send it to P1
MOV A,#0FFH //A = FF hex
MOV P2,A //make P2 an input port
BACK: MOV A,P2 //get data from P2
MOV P1,A //send it to Port 1
SJMP BACK //keep doing that
Dual role of Port 2
Besides working as I/O, Port P2 is also used to provide 16-bit address bus for external
memory along with Port 0. Port P2 is also designated as (A8– A15), while Port 0 provides the
lower 8-bits via A0–A7. In other words, we can say that when an 8051 is connected to an external
memory (ROM) which can be maximum up to 64KB and this is possible by 16 bit address bus
because we know 216 = 64KB. Port2 is used for the upper 8-bit of the 16 bits address, and it cannot
be used for I/O and this is the way any Program code of external ROM is addressed.
Port 3 (Pins 10 through 17)
It is also of 8 bits and can be used as Input/Output. This port provides some extremely
important signals. P3.0 and P3.1 are RxD (Receiver) and TxD (Transmitter) respectively and are
collectively used for Serial Communication. P3.2 and P3.3 pins are used for external interrupts.
P3.4 and P3.5 are used for timers T0 and T1 respectively. P3.6 and P3.7 are Write (WR) and Read
(RD) pins. These are active low pins, means they will be active when 0 is given to them and these
are used to provide Read and Write operations to External ROM in 8031 based systems.

2. 8051 Serial Communication

When a microcontroller communicates with the outside world, it provides the data in byte-
sized chunks. In some cases, such as printers, the information is simply taken from the 8-bit data
bus and presented to the 8-bit data bus of the printer. This can work only if the cable is not too
long, since long cables diminish and even distort signals. Furthermore, an 8-bit data path is
expensive. For these reasons, serial communication is used for transferring data between two
systems located at distances of hundreds of feet to millions of miles apart. Fig(1) shows serial
versus parallel data transfers. The fact that serial communication uses a single data line instead of
the 8-bit data line of parallel communication. For serial data communication to work, the byte
of data must be converted to serial bits using a parallel-in-serial-out shift register, then it can be
transmitted over a single data line. At the receiving end there must be a serial-in-parallel-out shift
register to receive the serial data and pack them into a byte.
When the distance is short, the digital signal can be transferred as it is on a simple wire and
requires no modulation. However, for long-distance data transfers, serial data communication
requires a modem to modulate (convert to 0s and 1s to audio tones) and demodulate (converting
from audio tones to 0s and 1s).
Serial data communication uses two methods, asynchronous and synchronous. The
synchronous method transfers a block of data(characters) at a time, while the asynchronous method
transfers a single byte at a time. There are special IC’s made by many manufacturers for serial data
communications. These chips are commonly referred to as UART (universal asynchronous
receiver transmitter) and USART (universal synchronous asynchronous receiver transmitter).

Fig(1)
 In data transmission if the data can be transmitted and received, it is a duplex transmission.
This is in contrast to simplex transmission such as with printers, in which the computer only sends
data. Duplex transmissions can be half or full duplex, depending on whether or not the data transfer
can be simultaneous. If data is transmitted one way at a time, it is referred to as half duplex. If the
data can go both ways at the same time, it is full duplex. Full duplex requires two wire conductors
for the data lines, one for transmission and one for reception, in order to transfer and receive data
simultaneously.

Asynchronous Serial Communication.

The data coming in at the receiving end of the data line in a serial data transfer is all 0s and
1s, it is difficult to make sense of the data unless the sender and receiver agree on a set of rules, a
protocol, on how the data is packed, how many bits constitute a character, and when the data begins
and ends.
Asynchronous serial data communication is widely used for character oriented
transmissions. In this method, each character is placed between start and stop bits. This is called
framing. In data framing for asynchronous communications, the data such as ASCII characters,
are packed between a start bit and stop bit. The start bit is always one bit, but the stop bit can be
one or two bits. The start bit is always a 0 (low) and the stop bit is 1(high). Look at below figure
in which the ASCII character “A” ( 8-bit binary 0100 0001) is framed between the start bit and a
stop bit. Notice that the LSB is sent out first.

Figure(2)
Data Transfer Rate

The rate of data transfer in serial data communication is stated in bps (bits per
second). Another widely used terminology for bps is baud rate. The baud rate is the modem
terminology and s defined as the number of signal changes per second.

8051 SERIAL PORT PROGRAMMING

Baud rate in the 8051

The 8051 transfers and receives data serially at many different baud rates. The baud
rate in the 8051 is programmable. This is done with the help of Timer 1. The relationship
between thecrystal frequency and the baud rate in the 8051 is shown below.
The 8051 divides the crystal frequency by 12 to get the machine cycle frequency. In
the case XTAL = 11.0592 MHz, the machine cycle frequency is 921.6 KHz (11.0592MHz/12
=
921.6 KHz). The 8051’s serial communication UART circuitry divides the machine cycle
frequency of 921.6kHz by 32 once more before it is used by Timer 1 to set the baud rate.
Therefore, 921.6 kHz divided by 32 gives 28,800 Hz.
SBUF REGISTER
SBUF is an 8-bit register used solely for serial communication in the 8051. For a byte
of data to be transferred via the TxD line, it must be placed in the SBUF register. Similarly,
SBUF holds the byte of data when it is received by the RxD line. SBUF can be accessed like
any other register in the 8051.
SCON (Serial Control) REGISTER
The SCON register is an 8-bit register used to program the start bit, stop bit, and
data bits of data framing, among other things.
Programming the 8051 to transfer data serially
In programming the 8051 to transfer character bytes serially, the following steps must be taken.
1. The TMOD register is loaded with the value 20H, indicating the use of Timer 1 in mode
2 to set the baud rate.
2. The TH1 is loaded with one of the values in Table (2) to set the baud rate for
serial datatransfer.
3. The SCON register is loaded wit the value 50H, indicating serial mode 1, where an
 8-bitdata is framed with start and stop bits.
4. TR1 is set to 1 to start Timer 1.
5. TI is cleared by the “CLR TI” instruction .
6. The character byte to be transferred serially is written into the SBUF register.
7. The TI flag bit is monitored with the use of the instruction “JNB TI, xx” to see
if thecharacter has been transferred completely.
8. To transfer the next character, go to Step 5.

Programming the 8051 to receive data serially

In programming the 8051 to transfer character bytes serially, the following steps must be taken.
1. The TMOD register is loaded with the value 20H, indicating the use of Timer 1 in
mode2 to set the baud rate.
2. TH1 is loaded with one of the values in Table(2) to set the baud rate.
3. The SCON register is loaded with the value 50H, indicating serial mode 1, where
8-bitdata is framed with start and stop bits and receive enable is turned on.
4. TR1 is set to 1 to start Timer 1.
5. RI is cleared with the “CLR RI” instruction.
6. The RI flag bit is monitored with the use of the instruction “JNB RI, xx” to see
if anentire character has been received yet.
7. When RI is raised, SBUF has the byte. Its contents are moved into safe place.
8. To receive the next character, go to Step 5.
3. PROGRAMMING 8051 TIMERS

The 8051 has two timers; timer 0, timer 1. They can be used either as timers or as event
counters. Both timer 0 and timer 1 are 16 bits wide. Since the 8051 has an 8-bit architecture , each 16
bit timer is accessed as two separate registers of low byte and high byte.

TIMER 0 registers

The 16 bit register of timer 0 is accessed as low byte and high byte. The low byte register is
called TL0 (timer 0 low byte) and the high byte register is referred to as TH0 ( timer 0 high byte).
These registers can be accessed like any other register, such as A, B, R0, R1, R2 etc. For example,
the instruction “ MOV TL0,#25H” loads the value 25H into TL0.

TIMER 1 registers

Timer 1 is also 16 bits, and its 16 bit register is split into two bytes, referred to as TL1(timer
1 low byte) and TH1 (timer 1 high byte). These registers are accessible in the same way as the registers
of timer 0.
 TMOD (Timer Mode) Register

Both timers 0 and 1 use the same register, called TMOD, to set th various timer operation
modes. TMOD is an 8-bit register in which the lower 4 bits are set aside for timer 0 and the
upper4 bits are set aside for timer 1. In each case, the lower 2 bits are used to set the timer mode and
the upper 2 bits to specify the operation. TMOD register is shown in fig(3).

GATE: The T MOD register of Fig(3) that both timers 0 and 1 have the GATE bit. Every
timerhas means of starting and stopping. Some timers do this by software, some by hardware, and
some both software and hardware controls. The timers in the 8051 have both. The start and stop of the
timer are controlled by way of software by the TR (timer start) bits TR0 and TR1. This is achieved
by the instructions “SETB TR1” and “CLR T R1” for timer 1 and “SETB TR0” and “CLR TR0”
for time 0. The SETB instruction starts it, and it is stopped by the CLR instruction. These instructions
start and stop the timers as long as GATE=0 in the TMOD register.
M1, M0: M0 and M1 select the timer mode. As show in the below Table, there are three modes;
0, 1, and 2. Mode 0 is a 13 bit timer, mode 1 is a 16 bit timer and mode 2 is an 8-bit timer.

M1 M2 MODE
0 0 0
0 1 1
1 0 2
1 1 3

C / T (Clock / Timer): This bit in the TMOD register is used to decide whether the timer is used as
a delay generator or an event counter. If C/T =0, it is used as a timer for time delay generation. The clock
source for the time delay is the crystal frequency of the 8051.
 Timer Programming
Mode 1 Programming

The following are the characteristics and operations of mode 1:

1. It is a 16-bit timer, therefore it allows values of 0000 to FFFFH to be loaded into the
timer’s registers TL and TH.
2. After TH and TL are loaded with a 16-bit initial value, the timer must be started. This is
done by “SETB TR0” for Timer 0 and “SETB TR1” for Timer 1.
3. After the timer is started, it starts to count up. It counts up until it reaches its limit of
FFFFH. When it rolls over from FFFFH to 0000, it sets high flag bit called TF (timer flag).
This timer flag can be monitered. When this timer flag is raised, one option would be to
stop the timer with the instructions “CLR TR0” for Timer 0 and “CLR TR1” for Timer 1.
Notice that each timer has its own timer flag: TF0 for Timer 0 and TF1 for Timer 1.
4. After the timer reaches its limit and rolls over, in order to repeat the process the registers
TH and TL must be reloaded with the original value, and TF must be reset to ‘0’.

Steps to Program in Mode 1

1. Load the TMOD value register indicating which timer (Timer 0 or Timer 1) is to be used
and which timer mode ( 0 or 1 ) is selected.
2. Load registers TL and TH with initial count values
3. Start the timer.
4. Keep monitoring the timer flag (TF). Get out of the loop when TF becomes high
5. Stop the timer.
6. Clear the TF flag for the next round.
7. Go back to Step 2 to load TH and TL again.
Example

MOV TMOD, #01 Time 0, mode 1 (16-bit mode)

HERE: MOV TL0, #F2H TL0 = F2H, the Low byte
MOV TH0, #FFH TH0 = FFH, the High byte
CPL P1.5
ACALL DELAY
SJMP HERE

Delay using Timer 0

DELAY:
SETB TR0 Start Timer 0
AGAIN: JNB TF0, AGAIN Monitor Timer 0 flag until ir rolls over
CLR TR0 Stop Timer 0
CLR TF0 Clear Timer 0 flag
RET
Mode 2 Programming
The following are the characteristics and operations of mode 2:

1. It is an 8-bit timer, therefore, it allows only values of 00 to FFH to be loaded into the
timer’s register TH.
2. After TH is loaded with the 8-bit value, the 8051 gives a copy of it to TL. Then the timer must
be started. This is done by the instruction “SETB TR0” for Timer 0 and “SETB TR1” for
Timer 1.
3. After the timer is started, it starts to count up by incrementing the TL register. It counts up
until it reaches its limit of FFH. When it rolls over from FFH to 00, it sets high the TF (Timer
Flag). If we are using Timer 0, TF0 goes high. If we are using Timer 1, TF1 is raised.
4. When the TL register rolls from FFH to 00 and TF is set to 1, TL is reloaded automatically
with the original value kept by the TH register. To repeat the process, we must simply clear
TF and let it go without any need by the programmer to reload the original value. This makes
mode 2 an auto-reload, in contrast with mode 1 in which the programmer has to reload TH
and TL
It must be emphasized that mode 2 is an 8-bit timer. However, it has an auto- reloading
capability. In auto-reload, TH is loaded with the initial count and a copy of it is given to TL.
This reloading leaves TH unchanged, still holding a copy of the original value. This mode has
many applications, including setting the baud rate in serial communication.

Steps to program in mode 2

To generate the time delay using the timer’s mode 2, take the following steps.

1. Load the TMOD value register indicating which timer (Timer 0 or Timer 1) is to be used,
and select the timer mode (mode 2)
2. Load the TH registers with the initial count value
3. Start the timer.
4. Keep monitoring the timer flag (TF) with the “JNB TF0, Target” or “JNB TF1, Target”
instruction to see whether it is raised. Get out of the loop when TF goes high.
5. Clear the TF flag.
6. Go back to step 4, since mode 2 is auto-reload.
Program: Assembly Language Program to generate the square on pin P1.0, assuming
XTAL = 11.0592 MHz.
MOV TMOD, #20H ; T1/ mode 2/ 8-bit/ auto-reload
MOV TH1, #05H ; TH1 = 05
SETB TR1 ; Start Timer 1
BACK: JNB TF1, BACK ; stay until timer rolls over
CPL P1.0 ; complement P1.0 to get high, low
CLR TF1 ; clear Timer 1 flag
SJMP BACK ; mode 2 is auto-reload
 COUNTER PROGRAMMING
The timer / counter of the 8051 is used to generate time delays. These timers can also be used
as counters counting events happening outside the 8051. As far as the use of a timer as an
event counter is concerned, everything that in programming the timer applies to programming
it as a counter, except tha source of the frequency. When the timer/counter is used as a timer,
the 8051’s crystal is used as the source of the frequency. When it is used as a counter, it is a
pulse outside the 8051 that increments the TH, TL register.

C/T bit in TMOD register

The C/T bit in the TMOD register decides the source of the clock for the timer. If C/T=0, the
timer gets pulses from the crystal. In contrast, when C/T = 1, the timer is used as a counter and
gets its pulses from outside the 8051. Therefore, when C/T = 1, the counter counters up as
pulses are fed from pins 14 and 15. These pins are called T0 (Timer 0 input) and T1 (Timer 1
input). These two pins belong to port 3. In the case of Timer 0, when C/T
= 1, pin P3.4 provides the clock pulse and the counter counts up for each clock pulse coming
from that pin. Similarly, for Timer 1, when C/T = 1 each clock pulse coming in from pin
P3.5 makes the counter count up.

Port 3 Pins Used For Timer 0 and Timer 1

Pin Port Pin Function Description
14 P3.4 T0 Timer / Counter 0 external input
15 P3.5 T1 Timer / Counter 1 external input

(MSB) (LSB)
GATE C/T M1 M2 GATE C/T M1 M2
Timer 1 Timer 0

Fig:TMOD register

TCON REGISTER

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

Fig : TCON register

TCON register is an 8-bit register. As shown in above figure the upper four bits are used to store
the TF and TR bits of both Timer 0 and Timer 1. The lower four bits are set aside for controlling
the interrupt bits. TCON is a bit addressable register.
4. INTERRUPTS
An interrupt is an internal or external event that interrupts the microcontroller to inform it
that a device needs its service. Whenever any device needs its service, the device notifies
the microcontroller by sending it as interrupt signal. Upon receiving an interrupt signal, the
microcontroller interrupts whatever it is doing and serves the device. The program which
is associated with the interrupt is called interrupt Service Routine (ISR). The
microcontroller can serve many devices based on the priority assigned to it.
Execution of an Interrupt
In order to use any interrupt, the following steps must be taken.
1. It finishes the instruction it is executing and saves the address of the next instruction
(PC) on the stack.
2. It also saves the current status of all the interrupts internally.
3. It jumps to a fixed location in memory called the interrupt vector or table that holds the
address of the Interrupt Service Routine (ISR).
4. The microcontroller gets the address of the ISR from the interrupt vector table and jumps
to it. It starts to execute the interrupt service subroutine until it reaches the last instruction
of the subroutine which is RET 1.
5. Upon executing RET 1 instruction, the microcontroller returns to the place where it was
interrupted. First it gets the program counter (PC) address from the stack by popping the
top two byes of the stack into the PC. Thenit startsto execute from that address.

Figure 4:Interrupt Structure

Interrupts in 8051
• Five interrupts are provided in the 805l.
• Three of these a regenerated by internal operations: Timer Flag 1 & 0, and the serial
port interrupt (RI or TI).
• Two interrupts are triggered by external signals provided by circuitry that is connected
to pin
INT0 and INT1 (port pins P3.2 and P3.3)

Types Interrupt Vector

Address
TF0 Timer flag 0 interrupt 000BH

Internal TF1 Timer flag 1 interrupt 001BH

RI/TI Serial port interrupt 0023H

INT0 External interrupt 0 0003H

External

INT1 External interrupt 1 0013H

Table 3: Interrupt Vector

a) Timer flag interrupts
• When a timer / counter overflows, the corresponding timer flag TF0 or TFI (location:
000B H or 001B H) is set to l.
• The flag is cleared to 0 when the
resulting interrupt generates a
program call to the appropriate
timer subroutine in memory.
b) External interrupts
• The external hardware interrupts
INT0 andINT1 are located on pins
P3.2 and P3.3.
• Inputs on these pins can set the
interrupt flags IE0 and IE1 in the
TCON register to 1 by level
triggering or edge-triggering.
• Fig. 4. Shows the activation of INT0 and Fig.5. shows the activation of INT1
c) Serial Port Interrupt
• In SCON, if RI = l, a data byte is received If TI = 1, a data byte has been transmitted.
• These are ORed together to provide a single interrupt to the processor.
• The interrupt bit in the IE register is used to both send and receive data.
• If IE.4 [ES- Enable serial port interrupt] is enabled, when RI or TI is raised and
8051gets interrupted and jumps to memory address location 0023H to execute the ISR.
• The Fig.6.Showsthe serial interrupt is invoke by TI or RI flags.

Figure 7: Serial Port Interrupt

INTERRUPTCONTROL
All interrupt functions are under the control of the program. The programmer is able to
alter control bits in the:
• Interrupt Enable Register (IE)
• Interrupt Priority Register (IP) and
• Timer Control Register (TCON).
Interrupt Enable Register (IE)
• The IE register holds the programmable bits that can enable or disable all the interrupts.
• Bit D7 of the IE register (EA) must be set high to allow the rest of the register to take
effect.
• If EA = l, interrupts are enabled and will be responded to if their corresponding bits in
IE are high.
• If EA = 0, no interrupt will be responded to, even if the associated bit in the EI register
is high.

Figure 8: IE Register

EA: Enable interrupts bits.

• Set to 1 to permit individual interrupts to be enabled by their enable bits.
• Cleared to 0 by program to disable all interrupts.
ES: Enable serial port interrupt.
• Set to 1 to enable by program.
• Cleared to 0 to disable serial port interrupt.
ET1: Enable/ disable the Timer 1 overflow interrupt.
EX1: Enable external interrupt 1.
• Set to 1 by program to enableINT1’interrupt.
• Clearedto 0 to disableINT1’interrupt.
ET0: Enable / disable the Timer 0 overflow interrupt.
EX0: Enable/ disable the external interrupt 0.
• Set to 1 by program to enable INT0’ interrupt.
• Clearedto 0 to disableINT0’ interrupt.

Interrupt Priority Register (IP)

• Interrupt priority (IP) register determines the interrupt priority.
• Bits in IP registers set to 1 give the accompanying interrupt a high priority; a 0 assigns a low
priority.
• Interrupts with a high priority can interrupt another interrupt with a lower priority and the lower
priority continues after the higher is finished.
• If two interrupts with the same priority occur at the same time, then they have the following
ranking:
1. IE0
2. TF0
3. IE1
4. TF1
5. RI/TI
• The bit addressable IP register is
shown in Fig.9. If the bit is 0, the
corresponding interrupts
has a lower priority, otherwise higher priority.