Module 4 8051 Serial Port Programming in Assembly and C, 8051 Interrupt Programming in Assembly and C. 16859035129450 PDF
Module 4 8051 Serial Port Programming in Assembly and C, 8051 Interrupt Programming in Assembly and C. 16859035129450 PDF
Regulation – 2018
MODULE - 4
MODULE – 4
8051 serial port programming in assembly and C: Basics of serial communication, 8051
connection to RS232, 8051 serial port programming in assembly, serial port programming in 8051
C.
8051 Interrupt programming in assembly and C: 8051 interrupts, Programming timer, external
hardware, serial communication interrupt, Interrupt priority in 8051/52, Interrupt programming
in C.
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Serial data communication uses two methods, asynchronous and synchronous. The synchronous
method transfers a block of data (characters) at a time, while the asynchronous method transfers a
single byte at a time. It is possible to write software to use either of these methods, but the
programs can be tedious and long. For this reason, there are special 1C chips made by many
manufacturers for serial data communications. These chips are commonly referred to as UART
(universal asynchronous receiver-transmitter) and USART (universal synchronous-asynchronous
receiver-transmitter).
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In data transmission if the data can be transmitted and received, it is a duplex transmission.
This is in contrast to simplex transmissions such as with printers, in which the computer
only sends data.
Duplex transmissions can be half or full duplex, depending on whether or not the data
transfer can be simultaneous. If data is transmitted one way at a time, it is referred to as half
duplex.
If the data can go both ways at the same time, it is full duplex. Of course, full duplex requires
two wire conductors for the data lines (in addition to the signal ground), one for
transmission and one for reception, in order to transfer and receive data simultaneously.
The data coming in at the receiving end of the data line in a serial data transfer is all 0’s and
1’s; it is difficult to make sense of the data unless the sender and receiver agree on a set of
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rules, a protocol, on how the data is packed, how many bits constitute a character, and when
the data begins and ends.
In the above fig shown that when there is no transfer, the signal is 1 (high), which is referred
to as mark. The 0 (low) is referred to as space. Notice that the transmission begins with a
start bit followed by DO, which is the LSB, then the rest of the bits until the MSB (D7), and
finally, the one stop bit indicating the end of the character “A”.
In asynchronous serial communications, peripheral chips and modems can be programmed
for data that is 7 or 8 bits wide. This is in addition to the number of stop bits, 1 or 2.
While in older systems ASCII characters were 7-bit, in recent years, due to the extended
ASCII characters, 8-bit data has become common. In some older systems, due to the
slowness of the receiving mechanical device, two stop bits were used to give the device
sufficient time to organize itself before transmission of the next byte.
In modern PCs however, the use of one stop bit is standard. Assuming that we are
transferring a text file of ASCII characters using 1 stop bit, we have a total of 10 bits for each
character: 8 bits for the ASCII code, and 1 bit each for the start and stop bits. Therefore, for
each 8-bit character there are an extra 2 bits, which gives 20% overhead.
In some systems, the parity bit of the character byte is included in the data frame in order to
maintain data integrity. This means that for each character (7- or 8-bit, depending on the
system) we have a single parity bit in addition to start and stop bits. The parity bit is odd or
even. In the case of an odd-parity bit the number of data bits, including the parity bit, has an
odd number of Is. Similarly, in an even-parity bit system the total number of bits, including
the parity bit, is even. For example, the ASCII character “A”, binary 0100 0001, has 0 for the
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even-parity bit. UART chips allow programming of the parity bit for odd-, even-, and no-
parity options.
The rate of data transfer in serial data communication is stated in bps (bits per second).
Another widely used terminology for bps is baud rate. However, the baud and bps rates are
not necessarily equal. This is due to the fact that baud rate is the modem terminology and is
defined as the number of signal changes per second. In modems a single change of signal,
sometimes transfers several bits of data. As far as the conductor wire is concerned, the baud
rate and bps are the same, and for this reason in this book we use the terms bps and baud
interchangeably.
The data transfer rate of a given computer system depends on communication ports
incorporated into that system. For example, the early IBM PC/XT could transfer data at the
rate of 100 to 9600 bps. In recent years, however, Pentium-based PCs transfer data at rates
as high as 56K bps. It must be noted that in asynchronous serial data communication, the
baud rate is generally limited to 100,000 bps.
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When DCE is turned on and has gone through the self-test, it assert DSR to indicate that it is ready
to communicate
RI (ring indicator)
An output from the modem and an input to a PC indicates that the telephone is ringing It goes on
and off in synchronous with the ringing sound
The 8051 has two pins that are used specifically for transferring and receiving data serially.
These two pins are called TxD and RxD and are part of the port 3 group (P3.0 and P3.1). Pin
11 of the 8051 (P3.1) is assigned to TxD and pin 10 (P3.0) is designated as RxD.
These pins are TTL compatible; therefore, they require a line driver to make them RS232
compatible. One such line driver is the MAX232 chip.
MAX232
Since the RS232 is not compatible with today’s microprocessors and microcontrollers, we
need a line driver (voltage converter) to convert the RS232′s signals to TTL voltage levels
that will be acceptable to the 8051 ‘s TxD and RxD pins.
One example of such a converter is MAX232 from Maxim Corp.
The MAX232 converts from RS232 voltage levels to TTL voltage levels, and vice versa. One
advantage of the MAX232 chip is that it uses a +5 V power source which, is the same as the
source voltage for the 8051.
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In other words, with a single +5 V power supply we can power both the 8051 and MAX232,
with no need for the dual power supplies that are common in many older systems.
The MAX232 has two sets of line drivers for transferring and receiving data, as shown in
Figure 10-7.
The line drivers used for TxD are called Tl and T2, while the line drivers for RxD are
designated as Rl and R2. In many applications only one of each is used. For example, Tl and Rl
are used together for TxD and RxD of the 8051, and the second set is left unused. Notice in
MAX232 that the Tl line driver has a designation of Tlin and Tlout on pin numbers 11 and 14,
respectively. The Tlin pin is the TTL side and is connected to TxD of the microcontroller,
while Tlout is the RS232 side that is connected to the RxD pin of the RS232 DB connector.
The Rl line driver has a designation of Rlin and Rlout on pin numbers 13 and 12, respectively.
The Rlin (pin 13) is the RS232 side that is connected to the TxD pin of the RS232 DB
connector, and Rlout (pin 12) is the TTL side that is connected to the RxD pin of the
microcontroller. See Figure 10-7. Notice the null modem connection where RxD for one is
TxD for the other.
MAX232 requires four capacitors ranging from 1 to 22 nF. The most widely used value for
these capacitors is 22 nF.
SCON is an 8-bit register used to program the start bit, stop bit, and data bits of data framing,
among other things
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The SCON SFR allows us to configure the Serial Port. Thus, well go through each bit and review its
function.
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SBUF
1. TMOD register is loaded with the value 20H, indicating the use of timer 1 in mode 2 (8-bit
auto-reload) to set baud rate
2. The TH1 is loaded with one of the values to set baud rate for serial data transfer
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3. The SCON register is loaded with the value 50H, indicating serial mode 1, where an 8- bit
data is framed with start and stop bits
4. TR1 is set to 1 to start timer 1
5. TI is cleared by CLR TI instruction
6. The character byte to be transferred serially is written into SBUF register
7. The TI flag bit is monitored with the use of instruction JNB TI,xx to see if the character has
been transferred completely
8. To transfer the next byte, go to step 5
WRITE A PROGRAM FOR THE 8051 TO TRANSFER LETTER “Y” SERIALLY AT 4800 BAUD,
CONTINUOUSLY
WRITE A PROGRAM FOR THE 8051 TO TRANSFER “VTU” SERIALLY AT 9600 BAUD, 8-BIT
DATA, 1 STOP BIT, DO THIS CONTINUOUSLY
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WRITE A PROGRAM FOR THE 8051 TO RECEIVE BYTES OF DATA SERIALLY, AND PUT THEM
IN P1, SET THE BAUD RATE AT 4800, 8-BIT DATA, AND 1 STOP BIT
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1. It receives the start bit Indicating that the next bit is the first bit of the character byte it is about
to receive
2. The 8-bit character is received one bit at time
3. The stop bit is received
When receiving the stop bit 8051 makes RI = 1, indicating that an entire character byte has
been received and must be picked up before it gets overwritten by an incoming character
4. By checking the RI flag bit when it is raised, we know that a character has been received and is
sitting in the SBUF register
We copy the SBUF contents to a safe place in some other register or memory before it is lost
5. After the SBUF contents are copied into a safe place, the RI flag bit must be forced to 0 by CLR RI
in order to allow the next received character byte to be placed in SBUF
ASSUME THAT A SWITCH IS CONNECTED TO PIN P2.0. WRITE A PROGRAM TO MONITOR THE
SWITCH AND PERFORM THE FOLLOWING:
(a) If SW = 0, send the message “Hello” to the Serial #0 port
(b) If SW = 1, send the message “Goodbye” to the Serial #1 port.
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SENDCOM2:
MOV SBUF1,A ;place value in buffer
HERE1: JNB TI1,HERE1 ;wait until transmitted
CLR TI1 ;clear
RET
MESS1: DB “Hello”,0
MESS2: DB “Goodbye”,0
END
WRITE A C PROGRAM FOR 8051 TO TRANSFER THE LETTER “A” SERIALLY AT 4800 BAUD
CONTINUOUSLY. USE 8-BIT DATA AND 1 STOP BIT.
#include <reg51.h>
void main(void)
{
TMOD=0x20; //use Timer 1, mode 2
TH1=0xFA; //4800 baud rate
SCON=0x50;
TR1=1;
while (1)
{
SBUF=‘A’; //place value in buffer
while (TI==0);
TI=0;
}
}
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WRITE AN 8051 C PROGRAM TO TRANSFER THE MESSAGE “YES” SERIALLY AT 9600 BAUD, 8-
BIT DATA, 1 STOP BIT. DO THIS CONTINUOUSLY.
#include <reg51.h>
void SerTx(unsigned char);
void main(void)
{
TMOD=0x20; //use Timer 1, mode 2
TH1=0xFD; //9600 baud rate
SCON=0x50;
TR1=1; //start timer
while (1)
{
SerTx(‘Y’);
SerTx(‘E’);
SerTx(‘S’);
}
}
void SerTx(unsigned char x)
{
SBUF=x; //place value in buffer
while (TI==0); //wait until transmitted
TI=0;
}
PROGRAM THE 8051 IN C TO RECEIVE BYTES OF DATA SERIALLY AND PUT THEM IN P1. SET
THE BAUD RATE AT 4800, 8-BIT DATA, AND 1 STOP BIT.
#include <reg51.h>
void main(void)
{
unsigned char mybyte;
TMOD=0x20; //use Timer 1, mode 2
TH1=0xFA; //4800 baud rate
SCON=0x50;
TR1=1; //start timer
while (1)
{ //repeat forever
while (RI==0); //wait to receive
mybyte=SBUF; //save value
P1=mybyte; //write value to port
RI=0;
}
}
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WRITE AN 8051 C PROGRAM TO SEND THE TWO MESSAGES “NORMAL SPEED” AND “HIGH
SPEED” TO THE SERIAL PORT. ASSUMING THAT SW IS CONNECTED TO PIN P2.0, MONITOR
ITS STATUS AND SET THE BAUD RATE AS FOLLOWS:
#include <reg51.h>
sbit MYSW=P2^0; //input switch
void main(void)
{
unsigned char z;
unsigned char Mess1[ ]=“Normal Speed”;
unsigned char Mess2[ ]=“High Speed”;
TMOD=0x20; //use Timer 1, mode 2
TH1=0xFF; //28800 for normal
SCON=0x50;
TR1=1; //start timer
if(MYSW==0)
{
for (z=0;z<12;z++)
{
SBUF=Mess1[z]; //place value in buffer
while(TI==0); //wait for transmit
TI=0;
}
}
else
{
PCON=PCON|0x80; //for high speed of 56K
for (z=0;z<10;z++)
{
SBUF=Mess2[z]; //place value in buffer
while(TI==0); //wait for transmit
TI=0;
}
}
}
WRITE A C PROGRAM FOR THE DS89C4X0 TO TRANSFER THE LETTER “A” SERIALLY AT 4800
BAUD CONTINUOUSLY. USE THE SECOND SERIAL PORT WITH 8-BIT DATA AND 1 STOP BIT.
WE CAN ONLY USE TIMER 1 TO SET THE BAUD RATE.
#include <reg51.h>
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sfr SBUF1=0xC1;
sfr SCON1=0xC0;
sbit TI1=0xC1;
void main(void)
{
TMOD=0x20; //use Timer 1, mode 2
TH1=0xFA; //4800 baud rate
SCON=0x50; //use 2nd serial port SCON1
TR1=1; //start timer
while (1)
{
SBUF1=‘A’; //use 2nd serial port SBUF1
while (TI1==0); //wait for transmit
TI1=0;
}
}
PROGRAM THE DS89C4X0 IN C TO RECEIVE BYTES OF DATA SERIALLY VIA THE SECOND
SERIAL PORT AND PUT THEM IN P1. SET THE BAUD RATE AT 9600, 8-BIT DATA AND 1 STOP
BIT. USE TIMER 1 FOR BAUD RATE GENERATION.
#include <reg51.h>
sfr SBUF1=0xC1;
sfr SCON1=0xC0;
sbit RI1=0xC0;
void main(void)
{
unsigned char mybyte;
TMOD=0x20; //use Timer 1, mode 2
TH1=0xFD; //9600 baud rate
SCON1=0x50; //use 2nd serial port SCON1
TR1=1; //start timer
while (1)
{
while (RI1==0); //monitor RI1
mybyte=SBUF1; //use SBUF1
P2=mybyte; //place value on port
RI1=0;
}
}
INTERRUPTS IN 8051
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A single microcontroller can serve many peripheral devices. There are two ways to do that
1) Interrupt 2) Polling
Usually interrupts can happen either by internal hip operation or by an external source.
When the peripheral device needs the service of µc, the device sends an interrupt signal to
µc to serve it.
Upon receiving the interrupt signal, the µc stops executing the current program and serves
the device by transferring the control from current execution of the program to the program
associated with interrupt service routine (ISR) or interrupt handler.
The µc can serve many devices upon the priority assigned to t.
In interrupt method the µc can ignore the request of the particular device for service.
In this the µc will serve only the requested device upon the priority.
When interrupt occurs the µc runs ISR or interrupt handler. For every interrupt there is a
fixed location in memory which holds the address of ISR called interrupt vector table.
In this the interrupts can be masked.
As the name implies, an interrupt is some event which interrupts normal program
execution.
Program flow is always sequential, being altered only by those instructions which
expressly cause program flow to deviate in some way. However, interrupts give us a
mechanism to "put on hold" the normal program flow, execute a subroutine, and then
resume normal program flow as if we had never left it. This subroutine, called an interrupt
handler, is only executed when a certain event (interrupt) occurs.
The event may be one of the timers "overflowing," receiving a character via the serial port,
transmitting a character via the serial port, or one of two "external events." The 8051
may be configured so that when any of these events occur the main program is
temporarily suspended and control passed to a special section of code which presumably
would execute some function related to the event that occurred. Once complete, control
would be returned to the original program. The main program never even knows it was
interrupted.
The ability to interrupt normal program execution when certain events occur makes it much
easier and much more efficient to handle certain conditions. If it were not for interrupts we
would have to manually check in our main program whether the timers had over flown, whether
we had received another character via the serial port, or if some external event had occurred.
Besides making the main program ugly and hard to read, such a situation would make our program
inefficient since wed be burning precious "instruction cycles" checking for events that usually don’t
happen.
When an interrupt occurs by internal operation or by an external source the µc goes through the
following steps
Upon receiving the interrupt signal, the µc finishes the execution of current instruction and
saves the address of the next instruction to be executed in program counter on stack.
It also saves the current status of all the interrupts internally but not on stack.
After executing the current execution of the instruction, the control is transferred to the
fixed memory location called interrupt vector table that holds the address of ISR.
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The µc gets the address of ISR from interrupt vector table and jumps to it. It starts executing
the ISR until it reaches the last instruction of subroutine which is RETI (return from
interrupt)
Upon executing the RETI instruction the µc POPs the program counter address from stack
and then the µc starts to execute from that address.
8051 INTERRUPTS
The 8051 has five interrupts of which three are internally generated namely
3. Serial port interrupts (RI and TI): Whenever a data byte is received, an interrupt bit, RI is
set to 1 in SCON register. When a data byte is transmitted an interrupt bit TI, is set in SCON.
They are ORed together to provide a single interrupt to the processor. These flags must be
reset by software instruction to enable the next data communication operation.
Two interrupts are triggered by external signals provided by circuitry that is connected to
pins INTO and INT1 (P3.2 and P3.3).
1. External signal at pin INTO (P3.2): When a high-to-low edge signal is received on P3.2, the
external interrupt 0 edge flag IE0 (TCON.1) is set. This flag is cleared when the processor
branches to the Subroutine. When the external interrupt signal control bit IT0 (TCON.0) is
set to 1 (by program) then interrupt is triggered by falling edge signal. If IT0 is 0, a low-level
signal in INTO triggers the interrupt.
2. External signal at pin INT1 (P3.3): Flags IE1 (TCON.3) and IT1 (TCON.2) are similar to IE0
and IT0 in function.
Each of these interrupts has an address associated where the routine is to be written called as
interrupt service routine addresses. The addresses are listed below:
VECTOR
INTERRUPT PRIORITY
LOCATION
RESET
External Interrupt 0 (INT High
0000H
0)
Timer 0 Interrupt (T0) 0003H
External Interrupt 1 (INT
000BH
1)
Timer 1 Interrupt (T1) 001BH Low
Serial Data Interrupt 0023H
Timer Interrupts are generated whenever the timer rolls over and sets the TFx flag bit.
On execution of RETI instruction in ISR clears the flag bit.
External Interrupts may either be edge triggered or level triggered by setting IT0 & IT1 bits
respectively.
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The flag bits IE0 & IE1 are set when the interrupts are edge triggered. RETI instruction in
ISR clears the flag bit.
In serial data interrupts RI & TI flag bit is set for transmission or receiving interrupts. These
flag must be cleared manually.
When 8051 is reset, all interrupts are disabling. These are enabled by software. All of the
bits that generate interrupts can be set or cleared by software, with the same result as
though it had been set or cleared by hardware. That is, interrupts can be generated or
pending interrupts can be cancelled in software. Each of these interrupt sources can be
individually enabled or disabled by setting or clearing a bit in Special Function Register. IE
contains also a global disable bit, EA, which disables all, interrupts at once.
You enable a given interrupt by setting the corresponding bit. For example, if you wish to
enable Timer 1 Interrupt, you would execute either:
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MOV IE,#08h
or
SETB
Both of the above instructions set bit 3 of IE, thus enabling Timer 1 Interrupt. Once Timer 1
Interrupt is enabled, whenever the TF1 bit is set, the 8051 will automatically put "on hold"
the main program and execute the Timer 1 Interrupt Handler at address 001Bh
However, before Timer 1 Interrupt (or any other interrupt) is truly enabled, you must also
set bit 7 of IE. Bit 7, the Global Interupt Enable/Disable, enables or disables all interrupts
simultaneously. That is to say, if bit 7 is cleared then no interrupts will occur, even if all the
other bits of IE are set. Setting bit 7 will enable all the interrupts that have been selected by
setting other bits in IE. This is useful in program execution if you have time-critical code that
needs to execute. In this case, you may need the code to execute from start to finish without
any interrupt getting in the way. To accomplish this you can simply clear bit 7 of IE (CLR EA)
and then set it after your time-criticial code is done.
To enable the Timer 1 Interrupt the most common approach is to execute the following two
instructions: SETB EA
Thereafter, the Timer 1 Interrupt Handler at 01Bh will automatically be called whenever the
TF1 bit is set (upon Timer 1 overflow)
Basic function of this SFR is to set interrupt priority (IP). By default INT0 is of priority value
1 (which is the highest) and INT1 is of priority value 3 (which is lower than INT0). The
programmer can alter this priority, If IP.0 is set to ‘0’ and then IP.2 is set to ‘0’ – then the
priority order changes. INT1 will change to high priority and INT0 will change to lower
priority compared to INT1.
POLLING
• Polling is the process where the computer or controlling device waits for an external device
to check for its readiness or state, often with low-level hardware. For example, when a
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printer is connected via a parallel port, the computer waits until the printer has received the
next character.
• In polling, the microcontroller continuously monitors the status of a given device and
executes the task the device needed when the status will satisfy the condition. After that, it
moves on to monitor the next device until each one is served.
Sl.
Polling Interrupts
No.
µc continuously monitors the status of the Device notifies the µc for the service,
1.
devices to provide the service by sending the interrupt signal.
µc waste the time in monitoring the device
2. No wastage of microcontroller time
status
Priority assignments cannot be done as Priority assignment for the devices can
3.
polling uses round robin fashion. be done.
An interrupt is an external or internal The microcontroller continuously
event that interrupts the microcontroller to
monitors the Status of a given device.
inform it that a device needs its service When the conditions met, it performs
4.
Whenever any device needs its service, thethe Service.
device notifies the microcontroller by After that, it moves on to monitor the
sending it an interrupt signal next device until everyone is serviced.
The interrupt method is efficient. The polling method is not efficient,
since it wastes much of the
5. microcontroller’s time by polling
devices that do not need service.
JNB TFx, target
Each devices can get the attention of the For the polling method, it is not
microcontroller based on the assigned possible to assign priority since it
6.
priority checks all devices in a round-robin
fashion
COMPARE RETI & RET and INDICATE HOW TO START/STOP THE TIMER IF GATE CONTROL IS
ALSO USED
RETI RET
Whenever an evoked interrupt is Placing RET will also do the job of returning
acknowledged and the processor branches to from interrupt routine to main program (the
its corresponding vector address, it calling program) but the RET instruction will
automatically disables the interrupt in IE not re-enable the disabled interrupt in IE
register. This disabled interrupt would only be register. So if an RET is used, the interrupt
re-enabled upon executing the RETI would be permanently disabled after its first
instruction placed inside the ISR. That is the serving of ISR (unless it is enabled again by the
single reason, a programmer must use RETI programmer at some other part of the same
inside an ISR instead of RET instruction. program).
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RETI is return from an interrupt. RETI RET is a return from a function or a subroutine
instruction is executed at the end of interrupt
subroutine.
Enabling the timer is done by SETB TRx for GATE = 0 and if GATE = 1, start and stop is done
externally through P3.2 & P3.3
Gating control when set Timer/counter is enable only while the INTx pin is high and the TRx
control pin is set
Gating control when cleared, the timer is enabled whenever the TRx control bit is set
TIMERS COUNTERS
Timers to generate a time delay Event counters to count events happening
outside the microcontroller
C/T is cleared for timer operation and the C/T is set for counter operation and it receives
input is got from internal system clock the input from Tx input pin
If C/T = 0, it is used as a timer for time delay If C/T = 1, it is used as a Counter to count the
generation. The clock source for the time external events. The clock source is from
delay is the crystal frequency of the 8051 external source
The start and stop of the timer are controlled Timers can also be used as counters, counting
by way of software by the TR (timer start) events happening outside the 8051. When it is
bits TR0 and TR1 used as a counter, it is a pulse outside of the
The SETB instruction starts it, and it is 8051 that increments the TH, TL register.
stopped by the CLR instruction. These TMOD and TH, TL registers are the same as for
instructions start and stop the timers as long the timer
as GATE=0 in the TMOD register.
The hardware way of starting and stopping
the timer by an external source is achieved
by making GATE=1 in the TMOD register
Prepared by: Prof. RAMYA. K, Dept. of EEE Sri Sairam College of Engineering Anekal. Page|