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COA Solved Q1 To Q4

The document covers various topics in computer architecture and organization, including definitions, stored program organization, bus interconnection, and instruction cycles. It also discusses instruction formats, addressing modes, and types of instructions, along with designs for binary counters and adders. Additionally, it explains control units, hardwired vs microprogrammed units, and the concept of pipelining.

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5 views3 pages

COA Solved Q1 To Q4

The document covers various topics in computer architecture and organization, including definitions, stored program organization, bus interconnection, and instruction cycles. It also discusses instruction formats, addressing modes, and types of instructions, along with designs for binary counters and adders. Additionally, it explains control units, hardwired vs microprogrammed units, and the concept of pipelining.

Uploaded by

kriyom33
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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COA OCTOBER-2023 - Solved Paper

Q.1 (a) Explain computer architecture and computer organization in detail.


Computer Architecture: Logical structure of a computer system that defines its
capabilities and programming model.
Example: Instruction set, data types, addressing modes.
Computer Organization: Physical implementation and structure of the computer's
hardware.
Example: Control signals, memory technology, ALU design.
Difference:
- Architecture defines what a system does, organization defines how it does it.
- Architecture is abstract; organization is concrete hardware.

Q.1 (b) Explain stored program organization with block diagram.


Stored Program Organization stores both data and instructions in memory. Based
on Von Neumann architecture.
Steps:
1. CPU fetches instruction from memory.
2. Control Unit decodes the instruction.
3. ALU executes it.
4. Result stored back.

Q.1 (OR a) Explain bus interconnection with neat diagram.


Bus interconnection uses shared lines to connect CPU, memory, and I/O devices.
Types:
- Data Bus: Transfers data.
- Address Bus: Carries addresses.
- Control Bus: Carries control signals.

Q.1 (OR b) Explain general register-based CPU organization.


Uses multiple general-purpose registers for operations.
Benefits: Fast execution and flexible instruction formats.
Components: ALU, Registers, Control Unit.
Q.2 (a) Explain instruction cycle in detail.
Instruction Cycle Steps:
1. Fetch: Get instruction from memory.
2. Decode: Interpret the instruction.
3. Execute: Perform the task.
4. Store: Save result.

Q.2 (b) Design a 3-bit binary counter using T flip-flop.


Use 3 T flip-flops toggling with each clock.
- T inputs = 1
- Clock input cascaded from previous flip-flop.
Counts from 000 to 111 and back.

Q.2 (OR a) Explain different instruction formats.


Instruction format = layout of instruction bits.
Types:
- 0-address (stack based)
- 1-address (accumulator based)
- 2-address (register-memory)
- 3-address (register-register)

Q.2 (OR b) Explain types of instruction with suitable example.


Types:
1. Data Transfer: MOV A, B
2. Arithmetic: ADD A, B
3. Logical: AND A, B
4. Branch: JMP 1000
5. I/O: IN A

Q.3 (a) Explain different types of addressing modes.


1. Immediate: Operand in instruction (MOV A, #5)
2. Direct: Address given (MOV A, 1000)
3. Indirect: Address from register (MOV A, @R0)
4. Register: Operand in register (MOV A, B)
5. Indexed: Base + Index (MOV A, 1000(R1))
Q.3 (b) Explain memory reference and register reference instructions.
Memory Reference: Access memory (ADD M[500])
Register Reference: Use CPU registers (CLA, CMA)

Q.3 (OR a) Design 4-bit adder-subtractor circuit.


Use 4 full adders and XOR gates.
- B inputs XOR with control
- Control=0 → Add, Control=1 → Subtract
- Carry-in = Control

Q.3 (OR b) Draw and explain microinstruction format.


Fields:
- Control Signals: What operation to perform.
- Condition: For branching.
- Next Address: Where to go next.
Used in microprogrammed control units.

Q.4 (a) Draw and explain the block diagram of control unit.
Components:
- Instruction Register → Decoder → Control Logic → Sends control signals to ALU,
memory.
Types: Hardwired and Microprogrammed

Q.4 (b) Explain hardwired control unit and microprogrammed control unit.
Hardwired: Fast but less flexible. Uses logic circuits.
Microprogrammed: Uses microinstructions. Slower but more flexible.

Q.4 (OR a) Design 4-bit binary parallel adder using full adder.
Use 4 full adders in parallel.
Each adds A[i], B[i], and Carry[i]. Carries propagate through chain.

Q.4 (OR b) Explain concept of pipelining.


Pipelining = executing multiple instructions in stages.
Stages: Fetch, Decode, Execute, Memory, Write Back.
Improves CPU efficiency.

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