Control-Flow Analysis

• Control-flow analysis (CFA) helps us to understand the structure of

control-flow graphs (CFG)
• To determine the loop structure of CFGs
• Formulation of conditions for code motion.
• It is possible to use interval structure obtained from CFA to carry out
data-flow analysis
• Finding Control dependence, which is needed in parallelization, requires
CFA
Global Data Flow Analysis
Global Data Flow Analysis
 Data flow equations are the equations representing the expressions that are appearing in
the flow graph.
 Data flow information can be collected by setting up and solving systems of equations that
relate information at various points in a program.
 The data flow equation written in a form of equation such that,
𝒐𝒖𝒕 [𝑺] = 𝒈𝒆𝒏[𝑺] 𝑼 (𝒊𝒏[𝑺] − 𝒌𝒊𝒍𝒍[𝑺])
 Data flow equation can be read as “the information at the end of a statement is either
generated within a statement, or enters at the beginning and is not killed as control flows
through the statement”.

Prof. Jay R Dhamsaniya #3130006 (PS)  Unit 1 – Basic Probability 3

Dataflow Properties
Data Flow Properties
 A program point containing the definition is called Definition point.
 A program point at which a reference to a data item is made is called Reference point.
 A program point at which some evaluating expression is given is called Evaluation point.

W1:x=3 Definition point

W2: y=x Reference point

W3: z=a*b Evaluation point

Prof. Jay R Dhamsaniya #3130006 (PS)  Unit 1 – Basic Probability 6

Available Expression
 An expression 𝑥 + 𝑦 is available at a program point w if and only if along all paths are
reaching to w.
1. The expression 𝑥 + 𝑦 is said to be available at its evaluation point.
2. Neither of the two operands get modified before their use.
B1: t1=4*i

B2: t2:c+d[t1] B3: t3=4*i

B4: t4=a[t3]

 Expression 4 ∗ 𝑖 is the available expression for 𝐵2, 𝐵3 and 𝐵4 because this expression has
not been changed by any of the block before appearing in 𝐵4.
Prof. Jay R Dhamsaniya #3130006 (PS)  Unit 1 – Basic Probability 7
Reaching Definition
 A definition 𝐷 reaches at the point 𝑃 if there is a path from 𝐷 to 𝑃 along which 𝐷 is not
killed.
 A definition 𝐷 of variable 𝑥 is killed when there is a redefinition of 𝑥.

D1: y=2 B1

D2: y=y+2 B2

D3: x=y+2 B3

 The definition 𝐷1 is reaching definition for block 𝐵2, but the definition 𝐷1 is not reaching
definition for block 𝐵3, because it is killed by definition 𝐷2 in block 𝐵2.

Prof. Jay R Dhamsaniya #3130006 (PS)  Unit 1 – Basic Probability 8

Live variable
 A live variable 𝑥 is live at point 𝑝 if there is a path from 𝑝 to the exit, along which the value of
𝑥 is used before it is redefined.
 Otherwise the variable is said to be dead at the point.
 Example:
b=3
c=5
a = f(b * c)
 The set of live variables are {b, c} because both are used in the multiplication on line 3.

Prof. Jay R Dhamsaniya #3130006 (PS)  Unit 1 – Basic Probability 9

Busy Expression
 An expression 𝑒 is said to be busy expression along some path 𝑝𝑖. . 𝑝𝑗 if and only if an
evaluation of 𝑒 exists along some path 𝑝𝑖 … 𝑝𝑗 and no definition of any operand exist before
its evaluation along the path.

Prof. Jay R Dhamsaniya #3130006 (PS)  Unit 1 – Basic Probability 10

DATA FLOW EQUATIONS FOR A
SEQUENCE OF STATEMENTS
DATA FLOW EQUATION FOR WHILE
LOOP
DATA FLOW EQUATION FOR AN
ALTERNATIVE
OBJECT CODE
GENERATION
POSITION / ROLE OF CODE GENERATOR
DIFFERENT FORMS OF OBJECT CODE
DIFFERENT FORMS OF OBJECT CODE
DIFFERENT FORMS OF OBJECT CODE
Contd…
MACHINE DEPENDENT
CODE OPTIMIZATION
Peephole Optimization
Peephole optimization
 Peephole optimization is a simple and effective technique for locally improving target code.
 This technique is applied to improve the performance of the target program by examining
the short sequence of target instructions (called the peephole) and replacing these
instructions by shorter or faster sequence whenever possible.
 Peephole is a small, moving window on the target program.

Prof. Jay R Dhamsaniya #3130006 (PS)  Unit 1 – Basic Probability 3

Redundant Loads & Stores
 Especially the redundant loads and stores can be eliminated in following type of
transformations.
 Example:
MOV R0,x
MOV x,R0
 We can eliminate the second instruction since x is in already R0.

Prof. Jay R Dhamsaniya #3130006 (PS)  Unit 1 – Basic Probability 4

Flow of Control Optimization
 The unnecessary jumps can be eliminated in either the intermediate code or the target code
by the following types of peephole optimizations.
 We can replace the jump sequence.

Goto L1
…… Goto L2
L1: goto L2
 It may be possible to eliminate the statement L1: goto L2 provided it is preceded by an
unconditional jump. Similarly, the sequence can be replaced by:

If a<b goto L1
…… If a<b goto L2
L1: goto L2
Prof. Jay R Dhamsaniya #3130006 (PS)  Unit 1 – Basic Probability 5
Algebraic simplification
 Peephole optimization is an effective technique for algebraic simplification.
 The statements such as x = x + 0 or x := x* 1 can be eliminated by peephole optimization.

Prof. Jay R Dhamsaniya #3130006 (PS)  Unit 1 – Basic Probability 6

Reduction in strength
 Certain machine instructions are cheaper than the other.
 In order to improve performance of the intermediate code we can replace these instructions
by equivalent cheaper instruction.
 For example, x2 is cheaper than x * x.
 Similarly addition and subtraction are cheaper than multiplication and division. So we can
add effectively equivalent addition and subtraction for multiplication and division.

Prof. Jay R Dhamsaniya #3130006 (PS)  Unit 1 – Basic Probability 7

Machine idioms
 The target instructions have equivalent machine instructions for performing some
operations.
 Hence we can replace these target instructions by equivalent machine instructions in order
to improve the efficiency.
 Example: Some machines have auto-increment or auto-decrement addressing modes.
 These modes can be used in code for statement like i=i+1.

Prof. Jay R Dhamsaniya #3130006 (PS)  Unit 1 – Basic Probability 8

A Simple Code Generator
Algorithm
register allocation and assignment
generic code generation algorithms
The Code Generation Algorithm
 For each statement x := y op z
 Set location L = getreg(y, z)
 If y  L then generate
MOV y’,L
where y’ denotes one of the locations where the
value of y is available (choose register if possible)
 Generate
OP z’,L
where z’ is one of the locations of z;
Update register/address descriptor of x to include L
 If y and/or z has no next use and is stored in register,
update register descriptors to remove y and/or z
Register and Address Descriptors
A register descriptor
 keeps track of what is currently stored in a
register at a particular point in the code, e.g.
a local variable, argument, global variable, etc.
MOV a,R0 “R0 contains a”
An address descriptor
 keeps track of the location where the
current value of the name can be found at
run time, e.g. a register, stack location,
memory address, etc.
MOV a,R0
MOV R0,R1 “a in R0 and R1”
The getreg Algorithm
 To compute getreg(y,z)
 If y is stored in a register R and R only holds
the value y, and y has no next use, then
return R;
Update address descriptor: value y no longer
in R
 Else, return a new empty register if available
 Else, find an occupied register R;
Store contents (register spill) by generating
MOV R,M
for every M in address descriptor of y;
Return register R
 Return a memory location
 Register Address
Statements Code Generated
Descriptor Descriptor
Registers empty
t := a - b MOV a,R0 R0 contains t t in R0
SUB b,R0

u := a - c MOV a,R1 R0 contains t t in R0

SUB c,R1 R1 contains u u in R1

v := t + u ADD R1,R0 R0 contains v u in R1

R1 contains u v in R0

d := v + u ADD R1,R0 R0 contains d d in R0

MOV R0,d d in R0 and
memory
DAG for Register Allocation
Code generation from DAG is much simpler than the linear sequence of three address code
With the help of DAG one can rearrange sequence of instructions and generate and efficient code
There exist various algorithms which are used for generating code from DAG. They are:
Code Generation from DAG:-
Rearranging Order
Heuristic Ordering
Labeling Algorithm
Rearranging Order
These address code’s order affects the cost of the object code which is being generated
Object code with minimum cost can be achieved by changing the order of computations
Example:
t1:= a + b
t2:= c – d
t3:= e + t2
t4:= t1 + t3
For the expression (a+b) + (e+(c-d)), a DAG can be constructed for the above sequence as shown
below

The code is thus generated by translating the three address code line by line
MOV a, R0
ADD b, R0
MOV c, R1
 SUB d, R1
MOV R0, t t1:= a+b
MOV e, R0 R1 has c-d
ADD R0, R1 /* R1 contains e + (c – d)*/
MOV t1, R0 /R0 contains a + b*/
ADD R1, R0
MOV R0, t4
Now, if the ordering sequence of the three address code is changed
t2:= c - d
t3:= e + t2
t1:= a + b
t4:= t1 + t3
Then, an improved code is obtained as:
MOV c, R0
SUB D, R0
MOV e, R1
ADD R0, R1
MOV a, R0
ADD b, R0
ADD R1, R0
MOV R0, t4

A Heuristic ordering for Dags

The heuristic ordering algorithm attempts to make the evaluation of a nod the evaluation
of its leftmost argument. The algorithm shown below produces the ordering in reverse.

Algorithm:
1) while unlisted interior nodes remain do begin
2) select an unlisted node n, all of whose parents have been listed;
3) list n;
4) while the leftmost child m of n has no unlisted parents and is not a leaf do begin
5) list m;
6) n:=m

end

end

Example: Consider the DAG shown below

Initially, the only node with no unlisted parents is 1 so set n=1 at line (2) and list 1 at line (3). Now,
the left argument of 1, which is 2, has its parents listed, so we list 2 and set n=2 at line (6). Now,
at line (4) we find the leftmost child of 2, which is 6, has an unlisted parent 5. Thus we select a
new n at line (2), and node 3 is the only candidate. We list 3 and proceed down its left chain, listing
4, 5 and 6. This leaves only 8 among the interior nodes so we list that. The resulting list is 1234568
and the order of evaluation is 8654321.

Code sequence:
t8 : = d + e
t6 : = a + b
t5 : = t6 - c
t4 : = t5 * t8
t3 : = t4 - e
t2 : = t6 + t4
t1 : = t2 * t3

This will yield an optimal code for the DAG on machine whatever be the number of registers.

Labeling Algorithm
Labeling algorithm deals with the tree representation of a sequence of three address statements
It could similarly be made to work if the intermediate code structure was a parse tree. This
algorithm has two parts:
  The first part labels each node of the tree from the bottom up, with an integer that denotes
the minimum number of registers required to evaluate the tree, and with no storing of
intermediate results
 The second part of the algorithm is a tree traversal that travels the tree in an order governed
by the computed labels in the first part, and which generates the code during the tree
traversal

if n is a leaf then
if n is leftmost child of its parents then
Label(n) = 1
else label(n) = 0
else
{
/*n is an interior node*/
let n1, n2, …..,nk be the children of ordered by label,
so label(n1) >= label(n2) >= … >= label(nk);
label(n) = max (label (ni) + i – 1)
}

Example: