Scribd
Upload
4 views

Arithmetic Logic Unit

The document discusses the Arithmetic and Logic Unit (ALU) of a computer, detailing its role in performing arithmetic and logical operations on data. It explains integer representation methods, including sign-magnitude and two's complement, along with their benefits and negation processes. Additionally, it covers operations such as addition, subtraction, multiplication, and division, as well as floating-point representation and the IEEE 754 standard for floating-point storage.

Uploaded by

Pavan Vemula
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
4 views

Arithmetic Logic Unit

The document discusses the Arithmetic and Logic Unit (ALU) of a computer, detailing its role in performing arithmetic and logical operations on data. It explains integer representation methods, including sign-magnitude and two's complement, along with their benefits and negation processes. Additionally, it covers operations such as addition, subtraction, multiplication, and division, as well as floating-point representation and the IEEE 754 standard for floating-point storage.

Uploaded by

Pavan Vemula
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 47

Tishk International University

Computer Engineering Department


Computer Organization CMPE 352/A
Lecture 10: 26-05-2019

Computer Organization
Arithmetic & Logic Unit

Dr. Rand Basil Alhashimie


[email protected]
Arithmetic & Logic Unit

The ALU is that part of the computer that actually


performs arithmetic and logical operations on data. All of
the other elements of the computer system—control unit,
registers, memory, I/O—are there mainly to bring data
into the ALU for it to process and then to take the results
back out. We have, in a sense, reached the core or
essence of a computer when we consider the ALU.
ALU Inputs and Outputs
Arithmetic & Logic Unit
• Operands for arithmetic and logic operations are presented to the ALU in
registers, and the results of an operation are stored in registers.
• These registers are temporary storage locations within the processor that
are connected by signal paths to the ALU. The ALU may also set flags as
the result of an operation. For example, an overflow flag is set to 1 if the
result of a computation exceeds the length of the register into which it is to
be stored.
• The flag values are also stored in registers within the processor. The
processor provides signals that control the operation of the ALU and the
movement of the data into and out of the ALU.
Integer Representation
• Only have 0 & 1 to represent everything

• Positive numbers stored in binary


—e.g. 41=00101001
• No minus sign

• No period

• Sign-Magnitude

• Two’s complement
Sign-Magnitude
• Left most bit is sign bit
• 0 means positive
• 1 means negative
• +18 = 00010010
• -18 = 10010010
• Problems
—Need to consider both sign and magnitude in
arithmetic
—Two representations of zero (+0 and -0)
Two’s Compliment

• +3 = 00000011
• +2 = 00000010
• +1 = 00000001
• +0 = 00000000
• -1 = 11111111
• -2 = 11111110
• -3 = 11111101
Benefits

• One representation of zero


• Arithmetic works easily
• Negating is fairly easy
—3 = 00000011
—Boolean complement gives 11111100
—Add 1 to LSB 11111101
Negation Special Case 1
In sign-magnitude representation, the rule for forming the negation of an
integer is simple: invert the sign bit. In two’s complement notation, the
negation of an integer can be formed with the following rules:

1. Take the Boolean complement of each bit of the integer (including


the sign bit). That is, set each 1 to 0 and each 0 to 1.

2. Treating the result as an unsigned binary integer, add 1.

This two-step process is referred to as the twos complement operation, or


the taking of the twos complement of an integer.
Negation Special Case 1
Negation Special Case 1
Addition and Subtraction
• Addition in twos complement is illustrated in Figure below. Addition proceeds as if the
two numbers were unsigned integers.
• The first four examples illustrate successful operations. If the result of the operation is
positive, we get a positive number in twos complement form, which is the same as in
unsigned-integer form.
• If the result of the operation is negative, we get a negative number in twos complement
form.
• Note that, in some instances, there is a carry bit beyond the end of the word (indicated
by shading), which is ignored.
Addition and Subtraction
On any addition, the result may be larger than can be held in the word
size being used. This condition is called overflow. When overflow
occurs, the ALU must signal this fact so that no attempt is made to use
the result. To detect overflow, the
following rule is observed:

OVERFLOW RULE: If two numbers are added, and they are both
positive or both negative, then overflow occurs if and only if the
result has the opposite sign.
Addition and Subtraction
Addition and Subtraction
Subtraction is easily handled
with the following rule:

SUBTRACTION RULE: To
subtract one number
(subtrahend) from another
(minuend), take the twos
complement (negation) of the
subtrahend and add it to the
minuend.
Geometric Depiction of Two's Complement Integers
Multiplication
• Complex
• Work out partial product
for each digit
• Take care with place value
(column)
• Add partial products
Unsigned Binary Multiplication
Execution of Example
Flowchart for Unsigned Binary Multiplication
Multiplying Negative Numbers

• This does not work!


• Solution 1
—Convert to positive if required
—Multiply as above
—If signs were different, negate answer
• Solution 2
—Booth’s algorithm
Booth’s Algorithm
Example of Booth’s Algorithm
Example of Booth’s Algorithm
Division
• More complex than multiplication
• Negative numbers are really bad!
• Based on long division
Division of Unsigned Binary Integers
Flowchart for Unsigned Binary Division
Flowchart for Unsigned Binary Division
Real Numbers
• Numbers with fractions
• Could be done in pure binary
—1001.1010 = 24 + 20 +2-1 + 2-3 =9.625
• Where is the binary point?
• Fixed?
—Very limited
• Moving?
—How do you show where it is?
Floating Point

• +/- .significand x 2exponent


• Misnomer
• Point is actually fixed between sign bit and body
of mantissa
• Exponent indicates place value (point position)
Floating Point Examples
Signs for Floating Point
• Mantissa is stored in 2s compliment
• Exponent is in excess or biased notation
—e.g. Excess (bias) 128 means
—8 bit exponent field
—Pure value range 0-255
—Subtract 128 to get correct value
—Range -128 to +127
Normalization
• FP numbers are usually normalized
• i.e. exponent is adjusted so that leading bit
(MSB) of mantissa is 1
• Since it is always 1 there is no need to store it
• (c.f. Scientific notation where numbers are
normalized to give a single digit before the
decimal point
• e.g. 3.123 x 103)
FP Ranges
• For a 32 bit number
—8 bit exponent
—+/- 2256 ≈ 1.5 x 1077
• Accuracy
—The effect of changing lsb of mantissa
—23 bit mantissa 2-23 ≈ 1.2 x 10-7
—About 6 decimal places
Expressible Numbers
Density of Floating Point Numbers
IEEE 754
• Standard for floating point storage
• 32 and 64 bit standards
• 8 and 11 bit exponent respectively
• Extended formats (both mantissa and
exponent) for intermediate results
IEEE 754 Formats
FP Arithmetic +/-
• Check for zeros
• Align significands (adjusting exponents)
• Add or subtract significands
• Normalize result
FP Addition & Subtraction Flowchart
FP Arithmetic x/÷
• Check for zero
• Add/subtract exponents
• Multiply/divide significands (watch sign)
• Normalize
• Round
• All intermediate results should be in
double length storage
Floating Point Multiplication
Floating Point Division
Required Reading
• Stallings Chapter 9
• IEEE 754 on IEEE Web site

You might also like