Unit-1 (PART-1)

COMPUTER ORGANISATION AND

ARCHITECTURE
What is computer?
• Computer is a fast electronic device that reads input, process it and gives the result to
output devices
• A computer system is composed of a Central Processing Unit (Control Unit and
Arithmetic & Logic Unit), Memory and Input/Output subsystems.
• A computer system is subdivided into two functional entities: Hardware and Software.
• Hardware: The hardware consists of all the electronic components and
electromechanical devices that comprise the physical entity of the device.
• Software: The software of the computer consists of the instructions and data that the
computer manipulates to perform various data-processing tasks.

CU

Input/Output Memory

ALU
Introduction To Computer Organization
And Architecture
Computer Architecture
The view of a computer as presented to software
designers
Computer Organization
The actual implementation of a computer in
hardware.
DIGITAL COMPUTERS
• The word digital implies that the information in the computer is represented by
variables that take a limited number of discrete values.
• The decimal digits 0, 1, 2, ..., 9, for example, provide 10 discrete values. The first
electronic digital computer, developed in the late 1940s, was used primarily for
numerical computations and the discrete elements were the digits. From this
application the term digital computer emerged.
• Digital computers function more reliably if only two states are used. Because of the
physical restriction of components, i.e. true or false, yes or no statements and are said
to be binary
• Digital computers use the binary number system, which has two digits: 0 and 1. A
binary digit is called a bit.
TYPES OF DIGITAL
COMPUTERS
Computer Organization

• Computer Organization is concerned with the way the

hardware components operate and the way they are
connected together to form the computer system.
• The various components are assumed to be in place and the
task is to investigate the organizational structure to verify
that the computer parts operate as intended.
Computer Architecture
Computer Architecture is concerned with the structure and behaviour of the
computer as seen by the user.
It includes the information, formats, the instruction set, and
techniques for addressing memory. The architectural design
of a computer system is concerned with the specifications of
the various functional modules, such as processors and
memories, and structuring them together into a computer
system.
Two basic types of computer architecture
are:
1. von Neumann architecture
2. Harvard architecture
Von Neumann architecture
The von Neumann architecture describes a general framework, or structure, that a computer's
hardware, programming, and data should follow. Although other structures for computing have been
devised and implemented, the vast majority of computers in use today operate according to the von
Neumann architecture.
von Neumann envisioned the structure of a computer system as being composed of the following
components:
1.ALU: The Arithmetic-Logic unit that performs the computer's computational and logical functions.
2.RAM: Memory; more specifically, the computer's main, or fast, memory, also known as Random
Access Memory(RAM).
3.Control Unit: This is a component that directs other components of the computer to perform certain
actions, such as directing the fetching of data or instructions from memory to be processed by the ALU;
and
4.Man-machine interfaces; i.e. input and output devices, such as keyboard for input and display
monitor for output.

An example of computer architecture base on the von Neumann architecture is the

desktop personal computer.
Harvard architecture
The Harvard architecture uses physically separate
storage and signal pathways for their instructions
and data. The term originated from the Harvard Mark
I and the data in relay latches (23- digits wide).
In a computer with Harvard architecture, the CPU
can read both an instruction and data from
memory at the same time, leading to double the
memory bandwidth.
1.. Microcontroller(single-chip microcomputer)-
based computer systems and 2..DSP(Digital
Signal Processor)-based computer systems are
examples of Harvard architecture.
Computer Design
• Computer Design is concerned with the hardware design of the
computer. Once the computer specifications are formulated, it is the
task of the designer to develop hardware for the system.
• Computer design is concerned with the determination of what
hardware should
• be used and how the parts should be connected. This aspect of
computer hardware is sometimes referred to as computer
implementation.
 Unit-1 (Part-2)
REGISTER TRANSFER AND
MICROOPERATIONS
CONTENTS:

Register Transfer Language

Register Transfer
Bus And Memory Transfers
Types of Micro-operations
Arithmetic Micro-operations
Logic Micro-operations
Shift Micro-operations
Arithmetic Logic Shift Unit
BASIC DEFINITIONS:

 A digital system is an interconnection of digital hardware modules.

 The modules are registers, decoders, arithmetic elements, and control logic.
 The various modules are interconnected with common data and control paths to form a digital
computer system.
 Digital modules are best defined by the registers they contain and the
operations that are performed on the data stored in them.
 The operations executed on data stored in registers are called microoperations.
 A microoperation is an elementary operation performed on the information stored in one or more
registers.
 The result of the operation may replace the previous binary
information of a register or may be transferred to another register.
 Examples of microoperations are shift, count, clear, and load.
 The internal hardware organization of a digital computer is best defined
by specifying:

1. The set of registers it contains and their function.

2. The sequence of microoperations performed on the binary

information stored in the registers.
3. The control that initiates the sequence of microoperations.

REGISTER TRANSFER LANGUAGE:

 The symbolic notation used to describe the micro-operation transfer among registers is called RTL
(Register Transfer Language).
 The use of symbols instead of a narrative explanation provides an organized and concise manner
for listing the micro-operation sequences in registers and the control functions that initiate them.
  A register transfer language is a system for expressing in symbolic form the microoperation
sequences among the registers of a digital module.
 It is a convenient tool for describing the internal organization of digital computers in concise and
precise manner.

Registers:

 Computer registers are designated by upper case letters (and optionally followed by digits or
letters) to denote the function of the register.
 For example, the register that holds an address for the memory unit is usually called a memory
address register and is designated by the name MAR.
 Other designations for registers are PC (for program counter), IR (for instruction register, and R1
(for processor register).
 The individual flip-flops in an n-bit register are numbered in sequence from 0 through n-1, starting
from 0 in the rightmost position and increasing the numbers toward the left.
 Figure 4-1 shows the representation of registers in block diagram form.

 The most common way to represent a register is by a rectangular box with the name of the
register inside, as in Fig. 4-1(a).
 The individual bits can be distinguished as in (b).
 The numbering of bits in a 16-bit register can be marked on top of the box as shown in (c).
 16-bit register is partitioned into two parts in (d). Bits 0 through 7 are assigned the symbol L (for
low byte) and bits 8 through 15 are assigned the symbol H (for high byte).
 The name of the 16-bit register is PC. The symbol PC (0-7) or PC (L) refers to the low-order byte
and PC (8-15) or PC (H) to the high-order byte.

Register Transfer:

 Information transfer from one register to another is designated in symbolic form by means of a
replacement operator.
 The statement R2← R1 denotes a transfer of the content of register R1 into register R2.
 It designates a replacement of the content of R2 by the content of R1.
 By definition, the content of the source register R 1 does not change after the transfer.
 If we want the transfer to occur only under a predetermined control condition then it can be
shown by an if-then statement.
if (P=1) then R2← R1
 P is the control signal generated by a control section.
 We can separate the control variables from the register transfer operation by
specifying a Control Function.
 Control function is a Boolean variable that is equal to 0 or 1.
 control function is included in the statement as
P: R2← R1
 Control condition is terminated by a colon implies transfer operation be
executed by the hardware only if P=1.
 Every statement written in a register transfer notation implies a hardware
construction for implementing the transfer.
 Figure 4-2 shows the block diagram that depicts the transfer from R1 to R2.

 The n outputs of register R1 are connected to the n inputs of register R2.

 The letter n will be used to indicate any number of bits for the register. It will be
replaced by an actual number when the length of the register is known.
 Register R2 has a load input that is activated by the control variable P.
 It is assumed that the control variable is synchronized with the same clock as the
one applied to the register.
 As shown in the timing diagram, P is activated in the control section by the rising
edge
of a clock pulse at time t.
 The next positive transition of the clock at time t + 1 finds the load input active and
the data inputs of R2 are then loaded into the register in parallel.
  P may go back to 0 at time t+1; otherwise, the transfer will occur with every clock pulse transition
while P remains active.
 Even though the control condition such as P becomes active just after time t, the actual transfer
does not occur until the register is triggered by the next positive transition of the clock at time
t +1.
 The basic symbols of the register transfer notation are listed in below table

Symbol Description Examples

Letters(and numerals) Denotes a register MAR, R2

Parentheses ( ) Denotes a part of a register R2(0-7), R2(L)

Arrow <-- Denotes transfer of information R2 <-- R1

Comma , Separates two microoperations R2 <-- R1, R1 <--

R2
 A comma is used to separate two or more operations that are executed at the same time.
 The statement
T : R2← R1, R1← R2 (exchange operation)
denotes an operation that exchanges the contents of two rgisters during one common clock pulse
provided that T=1.

Bus and Memory Transfers:

 A more efficient scheme for transferring information between registers in a multiple-register
configuration is a Common Bus System.
 A common bus consists of a set of common lines, one for each bit of a register.
 Control signals determine which register is selected by the bus during each particular register
transfer.
 Different ways of constructing a Common Bus System
 Using Multiplexers
 Using Tri-state Buffers

Common bus system is with multiplexers:

 The multiplexers select the source register whose binary information is then placed
on the bus.
 The construction of a bus system for four registers is shown in below Figure.
 The bus consists of four 4 x 1 multiplexers each having four data inputs, 0 through 3, and two
selection inputs, S1 and S0.
 For example, output 1 of register A is connected to input 0 of MUX 1 because this input is labelled
A1.
 The diagram shows that the bits in the same significant position in each register are connected to
the data inputs of one multiplexer to form one line of the bus.
 Thus MUX 0 multiplexes the four 0 bits of the registers, MUX 1 multiplexes the four 1 bits of the
registers, and similarly for the other two bits.
 The two selection lines Si and So are connected to the selection inputs of all four multiplexers.
 The selection lines choose the four bits of one register and transfer them into the four-line
common bus.
 When S1S0 = 00, the 0 data inputs of all four multiplexers are selected and applied to the outputs
that form the bus.
 This causes the bus lines to receive the content of register A since the outputs of this register are
connected to the 0 data inputs of the multiplexers.
 Similarly, register B is selected if S1S0 = 01, and so on.
 Table 4-2 shows the register that is selected by the bus for each of the four possible binary value
of the selection lines.

 In general a bus system has

 multiplex “k” Registers
  each register of “n” bits
 to produce “n-line bus”
 no. of multiplexers required = n
 size of each multiplexer = k x 1
 When the bus is includes in the statement, the register transfer is symbolized as follows:
BUS← C, R1← BUS
 The content of register C is placed on the bus, and the content of the bus is loaded into register R1
by activating its load control input. If the bus is known to exist in the system, it may be convenient
just to show the direct transfer.

R1← C

Three-State Bus Buffers:

 A bus system can be constructed with three-state gates instead of multiplexers.

 A three-state gate is a digital circuit that exhibits three states.
 Two of the states are signals equivalent to logic 1 and 0 as in a conventional gate.
 The third state is a high-impedance state.
 The high-impedance state behaves like an open circuit, which means that the output is
disconnected and does not have logic significance.
 Because of this feature, a large number of three-state gate outputs can be connected with wires
to form a common bus line without endangering loading effects.
 The graphic symbol of a three-state buffer gate is shown in Fig. 4-4.

 It is distinguished from a normal buffer by having both a normal input and a control input.
 The control input determines the output state. When the control input is equal to 1, the output is
enabled and the gate behaves like any conventional buffer, with the output equal to the normal
input.
 When the control input is 0, the output is disabled and the gate goes to a high-impedance state,
regardless of the value in the normal input.
 The construction of a bus system with three-state buffers is shown in Fig. 4
  The outputs of four buffers are connected together to form a single bus line.
 The control inputs to the buffers determine which of the four normal inputs will communicate with
the bus line.
 No more than one buffer may be in the active state at any given time. The connected buffers
must be controlled so that only one three-state buffer has access to the bus line while all other
buffers are maintained in a high impedance state.
 One way to ensure that no more than one control input is active at any given time is to use a
decoder, as shown in the diagram.
 When the enable input of the decoder is 0, all of its four outputs are 0, and the bus line is in a
high-impedance state because all four buffers are disabled.
 When the enable input is active, one of the three-state buffers will be active, depending on the
binary value in the select inputs of the decoder.

Memory Transfer:

 The transfer of information from a memory word to the outside environment is called a read
operation.
 The transfer of new information to be stored into the memory is called a write operation.
 A memory word will be symbolized by the letter M.
 The particular memory word among the many available is selected by the memory address during
the transfer.
 It is necessary to specify the address of M when writing memory transfer operations.
 This will be done by enclosing the address in square brackets following the letter M.
 Consider a memory unit that receives the address from a register, called the address register,
symbolized by AR.
 The data are transferred to another register, called the data register, symbolized by DR.
 The read operation can be stated as follows:

Read: DR<- M [AR]

 This causes a transfer of information into DR from the memory word M selected by the address in
AR.
 The write operation transfers the content of a data register to a memory word M selected by the
address. Assume that the input data are in register R1 and the address is in AR.
 The write operation can be stated as follows:
Write: M [AR] <- R1

Types of Micro-operations:

 Register Transfer Micro-operations: Transfer binary information from one register to another.
 Arithmetic Micro-operations: Perform arithmetic operation on numeric data stored in registers.
 Logical Micro-operations: Perform bit manipulation operations on data stored in registers.
 Shift Micro-operations: Perform shift operations on data stored in registers.

 Register Transfer Micro-operation doesn’t change the information content when the binary
information moves from source register to destination register.
 Micro-operations
• Simple digital systems are frequently characterized in terms of
– the registers they contain, and
– the operations that they perform.
• The operations on the data in registers are called micro-
operations.
• The functions built into registers are examples of micro-
operations
– Shift
– Load
– Clear
– Increment ...etc.

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 Micro-operations

• Computer system micro-operations are of four types:

- Arithmetic micro-operations
- Logic micro-operations
- Shift micro-operations
- Register transfer micro-operations

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 Arithmetic Micro-operations
• The basic arithmetic micro-operations are
– Addition
– Subtraction
– Increment
– Decrement

• The additional arithmetic micro-operations are

– Add with carry
– Subtract with borrow
– Transfer/Load
– etc. …
Summary of Typical Arithmetic Micro-Operations
R3  R1 + R2 Contents of R1 plus R2 transferred to R3
R3  R1 - R2 Contents of R1 minus R2 transferred to R3
R2  R2’ Complement the contents of R2
R2  R2’+ 1 2's complement the contents of R2 (negate)
R3  R1 + R2’+ 1 subtraction
R1  R1 + 1 Increment
R1  R1 - 1 Decrement
 Arithmetic circuit

S1 S0 Cin Y Output Microoperation

0 0 0 B D=A+B Add
0 0 1 B D=A+B +1 Add with carry
0 1 0 B’ D = A + B’ Subtract with borrow
0 1 1 B’ D = A + B’+ 1 Subtract
1 0 0 0 D=A Transfer A
1 0 1 0 D=A+1 Increment A
1 1 0 1 D=A-1 Decrement A
1 1 1 1 D=A Transfer A
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 Logical micro-operations
• Specify binary operations on the strings of bits in registers
– Logic micro-operations are bit-wise operations, i.e., they work on
the individual bits of data
• There are, in principle, 16 different logic functions that can be defined
over two binary input variables
A B F0 F1 F2 … F13 F14 F15
0 0 0 0 0 … 1 1 1
0 1 0 0 0 … 1 1 1
1 0 0 0 1 … 0 1 1
1 1 0 1 0 … 1 0 1

• However, most systems only implement four of these

– AND (), OR (), XOR (), Complement/NOT
• The others can be created from combination of these

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 Logical Micro-operation
• List of Logic Micro-operations
- 16 different logic operations with 2 binary vars.
n
- n binary vars → 2 2 functions

• Truth tables for 16 functions of 2 variables and the

corresponding 16 logic micro-operations
x 0 0 11 Boolean Micro-
Name
y 0 1 01 Function Operations
0 0 00 F0 = 0 F 0 Clear
0 0 01 F1 = xy FAB AND
0 0 10 F2 = xy' F  A  B’
0 0 11 F3 = x FA Transfer A
0 1 00 F4 = x'y F  A’B
0 1 01 F5 = y FB Transfer B
0 1 10 F6 = x  y F  A B Exclusive-OR
0 1 11 F7 = x + y F AB OR
1 0 00 F8 = (x + y)' F  A  B)’ NOR
1 0 01 F9 = (x  y)' F  (A  B)’ Exclusive-NOR
1 0 10 F10 = y' F  B’ Complement B
1 0 11 F11 = x + y' F  A B
1 1 00 F12 = x' F  A’ Complement A
1 1 01 F13 = x' + y F  A’ B
1 1 10 F14 = (xy)' F  (A  B)’b NAND
1 1 11 F15 = 1 F  all 1's Set to all 1's
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Hardware implementation of logic Micro-operation
Ai
0
Bi

1
4 X1 Fi
MUX
2

3 Select

S1
S0

Function table
S1 S0 Output -operation
0 0 F=AB AND
0 1 F=AB OR
1 0 F=AB XOR
1 1 F = A’ Complement

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 SHIFT MICROOPERATIONS
• There are three types of shifts
– Logical shift
– Circular shift
– Arithmetic shift
• What differentiates them is the information that goes into the serial
input

• A right shift operation

Serial
input

• A left shift operation Serial

input

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 LOGICAL SHIFT
• In a logical shift the serial input to the shift is a 0.

• A right logical shift operation:

0

• A left logical shift operation:

0

• In a Register Transfer Language, the following notation is used

– shl for a logical shift left
– shr for a logical shift right
– Examples:
• R2  shr R2
• R3  shl R3
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 CIRCULAR SHIFT
• In a circular shift the serial input is the bit that is shifted out of the other
end of the register.

• A right circular shift operation:

• A left circular shift operation:

• In a RTL, the following notation is used

– cil for a circular shift left
– cir for a circular shift right
– Examples:
• R2  cir R2
• R3  cil R3

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 ARITHMETIC SHIFT

• An arithmetic shift is meant for signed binary numbers (integer)

• An arithmetic left shift multiplies a signed number by two
• An arithmetic right shift divides a signed number by two
• The main distinction of an arithmetic shift is that it must keep the sign of
the number the same as it performs the multiplication or division
• A right arithmetic shift operation:

sign
bit

• A left arithmetic shift operation:

0
sign
bit

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 Arithmetic Shift operation
• An left arithmetic shift operation must be checked for the overflow

0
sign
bit

Before the shift, if the leftmost two

V bits differ, the shift will result in an
overflow

• In a RTL, the following notation is used

– ashl for an arithmetic shift left
– ashr for an arithmetic shift right
– Examples:
» R2  ashrR2
» R3  ashlR3

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 Unit-1 (Part-3)
Basic Computer Organization and Design
o Instruction Codes

o Computer Registers

o Computer Instructions

o Timing and Control

o Instruction Cycle

o Memory Reference Instructions

o Input-Output and Interrupt

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 Instruction Codes
o A program is a set of instructions that specify
the operations, operands, and the sequence by
which processing has to occur.
o A computer instruction is a binary code that
specifies a sequence of micro-operations for
the computer.
o An instruction code is a group of bits that
instruct the computer to perform a specific
operation.

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 Instruction Codes…
o Instruction format:
o Two major components of an instruction code:
o The operation code (opcode)
o Address
o An opcode specifies the operation for the instruction.
o An address specifies the registers and/or locations
in memory to use for that operation
15 14 12 11 0
I Opcode Address
Addressing
mode Fig: Instruction Format

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 Instruction Codes…
o Address Mode:
o The address field of an instruction represents
o Direct address: the address in memory of the data to use
(the address of the operand)
o Indirect address: the address in memory of the address
in memory of the data to use

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 Basic Computer Registers

Fig: Basic Processor

registers

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 Basic Computer Registers…

Fig: Registers
Connected to
Common Bus

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 Computer Instructions
o The basic computer has three instruction code
formats:

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 Computer Instructions…

Fig: Basic Computer

Instructions

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 Computer Instructions…
o Instruction Types:
o Functional Instructions
o Arithmetic, logic, and shift instructions
o ADD, CMA, INC, CIR, CIL, AND, CLA
o Transfer Instructions
o Data transfers between the main memory and the
processor registers
o LDA, STA
o Control Instructions
o Program sequencing and control
o BUN, BSA, ISZ
o Input/Output Instructions
o Input and output
o INP, OUT
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 Timing and Control
o Control Unit:
o Control units are implemented in one of two
ways:
o Hardwired Control
o CU is made up of sequential and combinational
circuits to generate the control signals
o Microprogrammed Control
o A control memory on the processor contains
microprograms that activate the necessary control
signals

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 Timing and Control…

Fig: Control unit of Basic Computer

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 Timing and Control…
o Timing Signal:
o Example: T0, T1, T2, T3, T4, T0, T1, . . .
Assume: At time T4, SC is cleared to 0 if decoder
output D3 is active. D3T4: SC  0
T0 T1 T2 T3 T4 T0
Cloc k

T0

T1

T2

T3

T4

D3

CLR
SC

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 Instruction Cycle
o In the basic computer each instruction cycle
consists:
i. Fetch an instruction from memory
ii. Decode the instruction
iii. Read the effective address from memory if the
instruction has an indirect address.
iv. Execute the instruction.

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 Instruction Cycle…
o Fetch and Decode
T0: AR  PC (S0S1S2=010, T0=1)
T1: IR  M [AR], PC  PC + 1 (S0S1S2=111, T1=1)
T2: D0, . . . , D7  Decode IR(12-14),AR  IR(0-11), I  IR(15)

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 Instruction Cycle…
o Determine the Type of Instruction
D'7IT3: AR  M[AR]
D'7I'T3: Nothing
D7I'T3: Execute a register-reference instr.
D7IT3: Execute an input-output instr.

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 Memory Reference Instruction

Operation
Symbol Decoder Symbolic Description

AND D0 AC  AC  M[AR]
ADD D1 AC  AC + M[AR], E  Cout
LDA D2 AC  M[AR]
STA D3 M[AR]  AC
BUN D4 PC  AR
BSA D5 M[AR]  PC, PC  AR + 1
ISZ D6 M[AR]  M[AR] + 1, if M[AR] + 1 = 0 then PC  PC+1

AND to AC
D0T4: DR  M[AR] Read operand
D0T5: AC  AC  DR, SC  0 AND with AC
ADD to AC
D1T4: DR  M[AR] Read operand
D1T5: AC  AC + DR, E  Cout, SC  0 Add toAC and store carry in E

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o Memory Reference Instruction…
LDA: Load to AC
D2T4: DR  M[AR]
D2T5: AC  DR, SC  0
STA: Store AC
D3T4: M[AR]  AC, SC  0
BUN: Branch Unconditionally
D4T4: PC  AR, SC  0
BSA: Branch and Save Return Address
M[AR]  PC, PC  AR + 1
D5T4: M[AR]  PC, AR  AR + 1
D5T5: PC  AR, SC  0
ISZ: Increment and Skip-if-Zero
D6T4: DR  M[AR]
D6T5: DR  DR + 1
D6T4: M[AR]  DR, if (DR = 0) then (PC  PC + 1), SC  0

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o Flowchart For Memory Reference Instructions

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 Input-output and Interrupt
o Input and output instructions are needed for
transferring information to and from AC
register.
o for checking the flag bits, and
o for controlling the interrupt facility.
o Note: Input-output instructions have an
operation code 1111 and are recognized by the
control when D7 = 1 and I = 1.

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 Input-Output and Interrupts…
o Input-Output Instructions…
D7IT3 = p
IR(i) = Bi, i = 6, …, 11
p: SC  0 Clear SC
INP pB11: AC(0-7)  INPR, FGI  0 Input char. toAC
OUT pB10: OUTR  AC(0-7), FGO  0 Output char. fromAC
SKI pB9: if(FGI = 1) then (PC  PC + 1) Skip on input flag
SKO pB8: if(FGO = 1) then (PC  PC + 1) Skip on output flag
ION pB7: IEN  1 Interrupt enable on
IOF pB6: IEN  0 Interrupt enable off

INPR Input register - 8 bits

OUTR Output register - 8 bits
FGI Input flag - 1 bit
FGO Output flag - 1 bit
IEN Interrupt enable - 1 bit
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 Input-Output and Interrupts…
o External events can force the computer to quit
the normal program flow to react fast on the
events. Such event that requires fast response by
the computer is called interrupt.
o interrupt routine: The collection of
instructions that have to be executed to respond
to the interrupt
o IEN (Interrupt-enable flip-flop)
o can be set and cleared by instructions
o when cleared, the computer cannot be interrupted

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 Input-Output and Interrupts…
o Flowchart for Interrupt Cycle

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