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04-Machineprog 16sp

The document provides an overview of machine code and C programming, focusing on the relationship between high-level programming languages and machine-level instructions. It discusses the Instruction Set Architecture (ISA), particularly the x86 architecture, and the evolution of Intel processors. Additionally, it covers the compilation process from C code to object code, including assembly language translation and disassembly techniques.

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0% found this document useful (0 votes)
8 views22 pages

04-Machineprog 16sp

The document provides an overview of machine code and C programming, focusing on the relationship between high-level programming languages and machine-level instructions. It discusses the Instruction Set Architecture (ISA), particularly the x86 architecture, and the evolution of Intel processors. Additionally, it covers the compilation process from C code to object code, including assembly language translation and disassembly techniques.

Uploaded by

lollyvenicel
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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Machine Code & C Spring 2016

Roadmap Memory & data


Integers & floats
Machine code & C
C: Java:
x86 assembly
car *c = malloc(sizeof(car)); Car c = new Car(); Procedures &
c->miles = 100; c.setMiles(100); stacks
c->gals = 17; c.setGals(17);
float mpg = get_mpg(c); float mpg =
Arrays & structs
free(c); c.getMPG(); Memory & caches
Processes
Assembly get_mpg: Virtual memory
language: pushq %rbp Memory allocation
movq %rsp, %rbp Java vs. C
...
popq %rbp
ret
OS:
Machine 0111010000011000
code: 100011010000010000000010
1000100111000010
110000011111101000011111

Computer
system:

1
Machine Code & C Spring 2016

Basics of Machine Programming & Architecture


¢ What is an ISA (Instruction Set Architecture)?
¢ A brief history of Intel processors and architectures
¢ C, assembly, machine code

2
Machine Code & C Spring 2016

Translation

Code Time Compile Time Run Time

User
program C Assembler Hardware
in C compiler

.c file .exe file

What makes programs run fast?

3
Machine Code & C Spring 2016

HW Interface Affects Performance


Source code Compiler Architecture Hardware
Different applications Perform optimizations, Instruction set Different
or algorithms generate instructions implementations

Intel Pentium 4
C Language

Intel Core 2
Program
A
GCC x86-64 Intel Core i7

AMD Opteron
Program
B
AMD Athlon
Clang

Your
program
ARMv8 ARM Cortex-A53
(AArch64/A64)

Apple A7

4
Machine Code & C Spring 2016

Instruction Set Architectures


¢ The ISA defines:
§ The system’s state (e.g. registers, memory, program counter)
§ The instructions the CPU can execute
§ The effect that each of these instructions will have on the system state

CPU
PC
Memory
Registers

5
Machine Code & C Spring 2016

General ISA Design Decisions


¢ Instructions
§ What instructions are available? What do they do?
§ How are they encoded?

¢ Registers
§ How many registers are there?
§ How wide are they?

¢ Memory
§ How do you specify a memory location?

6
Machine Code & C Spring 2016

X86 ISA
¢ Processors that implement the x86 ISA completely dominate
the server, desktop and laptop markets

¢ Evolutionary design
§ Backwards compatible up until 8086, introduced in 1978
§ Added more features as time goes on

¢ Complex instruction set computer (CISC)


§ Many, highly specialized instructions
§ But, only small subset encountered with Linux programs
§ (as opposed to Reduced Instruction Set Computers (RISC), which use
simpler instructions)

7
Machine Code & C Spring 2016

Intel x86 Evolution: Milestones


Name Date Transistors MHz
¢ 8086 1978 29K 5-10
§ First 16-bit Intel processor. Basis for IBM PC & DOS
§ 1MB address space
¢ 386 1985 275K 16-33
§ First 32 bit Intel processor , referred to as IA32
§ Added “flat addressing”, capable of running Unix
¢ Pentium 4E 2004 125M 2800-3800
§ First 64-bit Intel x86 processor, referred to as x86-64
¢ Core 2 2006 291M 1060-3500
§ First multi-core Intel processor
¢ Core i7 2008 731M 1700-3900
§ Four cores
8
Machine Code & C Spring 2016

Intel x86 Processors


¢ Machine Evolution Intel Core i7
§ 486 1989 1.9M
§ Pentium 1993 3.1M
§ Pentium/MMX 1997 4.5M
§ Pentium Pro 1995 6.5M
§ Pentium III 1999 8.2M
§ Pentium 4 2001 42M
§ Core 2 Duo 2006 291M
§ Core i7 2008 731M

¢ Added Features
§ Instructions to support multimedia operations
§ Parallel operations on 1, 2, and 4-byte data (“SIMD”)
§ Instructions to enable more efficient conditional operations
§ Hardware support for virtualization (virtual machines)
§ More cores!
9
Machine Code & C Spring 2016

More information
¢ References for Intel processor specifications:
§ Intel’s “automated relational knowledgebase”:
§ http://ark.intel.com/
§ Wikipedia:
§ http://en.wikipedia.org/wiki/List_of_Intel_microprocessors

10
Machine Code & C Spring 2016

x86 Clones: Advanced Micro Devices (AMD)


¢ Same ISA, different implementation
¢ Historically
§ AMD has followed just behind Intel
§ A little bit slower, a lot cheaper
¢ Then
§ Recruited top circuit designers from Digital Equipment and other downward
trending companies
§ Built Opteron: tough competitor to Pentium 4
§ Developed x86-64, their own extension of x86 to 64 bits

11
Machine Code & C Spring 2016

Intel’s Transition to 64-Bit


¢ Intel attempted radical shift from IA32 to IA64 (2001)
§ Totally different architecture (Itanium) and ISA than x86
§ Executes IA32 code only as legacy
§ Performance disappointing
¢ AMD stepped in with evolutionary solution (2003)
§ x86-64 (also called “AMD64”)
¢ Intel felt obligated to focus on IA64
§ Hard to admit mistake or that AMD is better
¢ Intel announces “EM64T” extension to IA32 (2004)
§ Extended Memory 64-bit Technology
§ Almost identical to AMD64!
¢ Today: all but low-end x86 processors support x86-64
§ But, lots of code out there is still just IA32

12
Machine Code & C Spring 2016

Our Coverage in 351


¢ x86-64
§ The new 64-bit x86 ISA – all lab assignments use x86-64!
§ Book covers x86-64

¢ Previous versions of CSE 351 and 2nd edition of textbook covered


IA32 (traditional 32-bit x86 ISA) and x86-64

¢ We will only cover x86-64 this quarter

13
Machine Code & C Spring 2016

Definitions
¢ Architecture: (also instruction set architecture or ISA)
The parts of a processor design that one needs to understand to
write assembly code
§ “What is directly visible to software”
¢ Microarchitecture: Implementation of the architecture
§ CSE/EE 469, 470

¢ Number of registers?
¢ How about CPU frequency?
¢ Cache size? Memory size?

14
Machine Code & C Spring 2016

Assembly Programmer’s View


CPU Memory
Addresses
Registers • Code
PC Data
• Data
Condition Instructions • Stack
Codes

¢ Programmer-Visible State
§ PC: Program counter
§ Address of next instruction
§ Called “RIP” (x86-64)
§ Named registers
§ Heavily used program data
§ Memory
§ Together, called “register file”
§ Byte addressable array
§ Condition codes § Code and user data
§ Store status information about most § Includes Stack (for supporting
recent arithmetic operation procedures, we’ll come back to that)
§ Used for conditional branching 15
Machine Code & C Spring 2016

Turning C into Object Code


¢ Code in files p1.c p2.c
¢ Compile with command: gcc -Og p1.c p2.c -o p
§ Use basic optimizations (-Og) [New to recent versions of GCC]
§ Put resulting machine code in file p

text C program (p1.c p2.c)

Compiler (gcc –Og -S)

text Asm program (p1.s p2.s)

Assembler (gcc or as)

binary Object program (p1.o p2.o) Static libraries


(.a)
Linker (gcc or ld)

binary Executable program (p)


16
Machine Code & C Spring 2016

Compiling Into Assembly


C Code (sum.c) Generated x86-64 Assembly
void sumstore(long x, long y, sumstore(long, long, long*):
long *dest) addq %rdi, %rsi
{ movq %rsi, (%rdx)
long t = x + y; ret
*dest = t;
}

Produced by command:
gcc –Og –S sum.c
Generates file: sum.s
Warning: You may get different results with other versions of gcc and
different compiler settings.

https://godbolt.org/g/5hQk8a 17
Machine Code & C Spring 2016

Machine Instruction Example


*dest = t; ¢ C Code
§ Store value t where designated by
dest

movq %rsi, (%rdx) ¢ Assembly


§ Move 8-byte value to memory
§ Quad words in x86-64 parlance
§ Operands:
t: Register %rsi
dest: Register %rdx
*dest: Memory M[%rdx]

0x400539: 48 89 32 ¢ Object Code


§ 3-byte instruction
§ Stored at address 0x40059e

18
Machine Code & C Spring 2016

Object Code
Code for sumstore ¢ Assembler
§ Translates .s into .o
0x00400536 <sumstore>:
§ Binary encoding of each instruction
0x48
0x01 § Nearly-complete image of executable code
0xfe § Missing linkages between code in different
0x48 files
0x89
0x32 ¢ Linker
0xc3 § Resolves references between files
§ Combines with static run-time libraries
• Total of 7 bytes § E.g., code for malloc, printf
• Each instruction § Some libraries are dynamically linked
here 1 or 3 bytes § Linking occurs when program begins
execution
• Starts at address
0x00400536

19
Machine Code & C Spring 2016

Disassembling Object Code


Disassembled
0000000000400536 <sumstore>:
400536: 48 01 fe add %rdi,%rsi
400539: 48 89 32 mov %rsi,(%rdx)
40053c: c3 retq

¢ Disassembler
objdump –d sum
§ Useful tool for examining object code (Try man 1 objdump)
§ Analyzes bit pattern of series of instructions
§ Produces approximate rendition of assembly code
§ Can be run on either a.out (complete executable) or .o file

20
Machine Code & C Spring 2016

Alternate Disassembly in GDB


$ gdb sum
(gdb) disassemble sumstore
Dump of assembler code for function sumstore:
0x0000000000400536 <+0>: add %rdi,%rsi
0x0000000000400539 <+3>: mov %rsi,(%rdx)
0x000000000040053c <+6>: retq
End of assembler dump.

(gdb) x/7bx sumstore0x400536 <sumstore>: 0x48


0x01 0xfe 0x48 0x89 0x32 0xc3

¢ Within gdb Debugger


gdb sum
disassemble sumstore
§ Disassemble procedure
x/14bx sumstore
§ Examine the 7 bytes starting at sumstore
21
Machine Code & C Spring 2016

What Can be Disassembled?


% objdump -d WINWORD.EXE

WINWORD.EXE: file format pei-i386

No symbols in "WINWORD.EXE".
Disassembly of section .text:

30001000 <.text>:
30001000: 55 push %ebp
30001001: 8b ecReverse engineering
mov forbidden by
%esp,%ebp
30001003: 6a ff MicrosoftpushEnd$0xffffffff
User License
30001005: 68 90 10 00 30 push $0x30001090
Agreement
3000100a: 68 91 dc 4c 30 push $0x304cdc91

¢ Anything that can be interpreted as executable code


¢ Disassembler examines bytes and reconstructs assembly
source 22

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