PREFACE

The notes presented in this chapter are

not by any means a complete replacement
of textbooks. Students are advised to go
through these notes to get idea of what we
studied in our lecture class.

Comments and suggestions are warmly

welcomed.
Sandeep Neupane
Department of Electronics Engineering, PUSET
[email protected]
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2. Boolean Algebra And Logic Gates

2.1 A Brief History
In 1850 George Boole invented a kind of algebra that maps logical propositions to symbols and that
permits manipulation of logic statements using mathematics. For example is a deed right or wrong? A
motive good or bad? A conclusion true or false and other two valued question like this was replaced
by Boolean algebra that used only two binary variables 0 and 1. Almost a century later, in 1938
Claude Shannon linked Boolean algebra to switches in his Master’s Thesis. Because of Shannon’s
work engineers soon realized that Boolean algebra could be used to analyze and design computer
circuits. Following events clearly show the brief history of electronics:-
1. 1850: George Boole invents Boolean algebra
• maps logical propositions to symbols
• permits manipulation of logic statements using mathematics
2. 1938: Claude Shannon links Boolean algebra to switches
• his Masters’ thesis
3. 1945: John von Neumann develops the first stored program computer
• its switching elements are vacuum tubes (a big advance from relays)
4. 1946: ENIAC . . . The world’s first completely electronic computer
• 18,000 vacuum tubes
• several hundred multiplications per minute
5. 1947: Shockley, Brattain, and Bardeen invent the transistor
• replaces vacuum tubes
• enable integration of multiple devices into one package
• gateway to modern electronics

2.2 Boolean Algebra

A special kind of algebra that uses binary 1 and binary 0 as variables is known as Boolean algebra.
Following are the three basic operations of Boolean algebra:-
2.2.1 NOT operation: - The operation of Boolean algebra in which the output is the complement of the
input is called NOT operation. It is a single input and a single output operation. If A denotes the input
function and X the output function then in equation form, NOT operation can be written as:-
X= NOT A……………….. (i)
When A = 0, X=1
And A= 1, X=0 __
Equation (i) is better represented by X=A __
So, according to Boolean algebra: - 0 = 1 and 1 = 0
2.2.2 AND operation: - The operation of Boolean algebra in which the output is binary 1 when all the
inputs are binary 1 is the AND operation. If any of the input is binary 0 then output is also binary 0. It
is a multiple input and a single output operation. AND operation is denoted by dot sign. If A and B
denotes the input function and X denotes the output function then in equation form AND operation is
written as:-
X = A AND B = A.B -------------------- (ii)
So, according to Boolean algebra:- 0.0=0
0.1=0
1.0=0
1.1=1
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2.2.2 OR operation: - The operation of Boolean algebra in which the output is binary 1 if any of the
input is binary 1 is called OR operation. It is a multiple input and a single output operation. OR
operation is denoted by plus sign. If A and B denotes the input function and X denotes the output
function then in equation form AND operation is written as:-
X = A OR B = A + B -------------------- (ii)
So, according to Boolean algebra: -
0+0=0
0+1=1
1+0=1
1+1=1
2.3. Truth Table
A table that is used to show the behavior of a circuit for all possible logic states presented at the
inputs of the circuit is called truth table.
INPUT OUTPUT

A X=Ac

0 1

1 0
Truth table of NOT operation
INPUT OUTPUT

A B X=A.B

0 0 0

0 1 0

1 0 0

1 1 1
Truth Table of 2 input AND operation
INPUT OUTPUT

A B X=A+B

0 0 0

0 1 1

1 0 1

1 1 1

Truth Table of 2 input OR operation

Note: The total number of possible input combinations (N) is determined by the mathematical formula:
n
N=2 where n is the number of input variables.
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Following table illustrates the truth table of 4 input AND and OR operation.

INPUTS OUTPUT

A B C D X=A+B+C+D X= A.B.C.D

0 0 0 0 0 0

0 0 0 1 1 0

0 0 1 0 1 0

0 0 1 1 1 0

0 1 0 0 1 0

0 1 0 1 1 0

0 1 1 0 1 0

0 1 1 1 1 0

1 0 0 0 1 0

1 0 0 1 1 0

1 0 1 0 1 0

1 0 1 1 1 0

1 1 0 0 1 0

1 1 0 1 1 0

1 1 1 0 1 0

1 1 1 1 1 1

Table: Truth Table of 4 input AND and OR operation.

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2.4 Logic Gates

Electronic circuits which combine digital signals according to the Boolean algebra are referred to as
logic gates. They are called gates because they control the flow of information. Positive logic is an
electronic representation in which the true state is at a higher voltage, while negative logic has the
true state at a lower voltage. We will use the positive logic type in this course.

In digital circuits all inputs must be connected.

Logic circuits are grouped into families, each with their own set of detailed operating rules. Some
common logic families are:

RTL: resistor-transistor logic,

DTL: diode-transistor logic,
TTL: transistor-transistor logic,
NMOS: N-channel metal-oxide silicon,
CMOS: complementary metal-oxide silicon and
ECL: emitter-coupled logic.

The ECL is very fast. The MOS features very low power consumption and hence is often used in LSI
technology. The TTL is normally used for small-scale integrated circuit units.

1. Inverter (NOT gate) And Buffer

The inverter (NOT circuit) performs a basic logic function called inversion or complementation. The
purpose of the inverter is to change one logic level (HIGH / LOW) to the opposite logic level. In terms
of bits, it changes a ‘1’ to a ‘0’ and vice versa. The standard logic symbol for the inverter and a Venn
diagram illustrating the relationship between the variables and the logic gate operation, are shown in
Figure 1-1 and Figure 1-2, respectively. A NOT gate is a single input and a single output gate.
Actually an Inverter is the complement of Buffer. Buffer is a gate that produces same output as that of
input and is also a single input and single output gate.

Figure 1-1 Standard Logic Symbol for Inverter Standard logic symbol of Buffer
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Figure 1-2 Venn diagram illustrating inverter operation

INPUT OUTPUT

A X=Ac

0 1

1 0

Table 1-1Truth table for NOT gate

2. The AND gate:-

The AND gate, which is composed of two or more inputs and a single output, performs logical
multiplication. The standard symbol for the AND gate is shown in Figure 1-3 and its truth table listed
in Table 1-2. The logical operation of the AND gate is such that the output is HIGH (1) when all the
inputs are HIGH, otherwise it is LOW (0). The Venn diagram shown in Figure 1-4 provides an insight
into the AND function. The highlighted area represents the function X=AB.

Figure 1-3 Standard Logic Symbol for AND gate

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Figure 1-4 Venn diagram illustrating AND operation

INPUT OUTPUT

A B X=A.B

0 0 0

0 1 0

1 0 0

1 1 1

Table 1-2 Truth table for AND gate

3. The OR gate

The OR gate, which is composed of two or more inputs and a single output, performs logical addition.
The standard symbol for the OR gate is shown in Figure 1-5 and its truth table listed in Table 1-3. The
logical operation of the OR gate is such that the output is HIGH (1) when any of the inputs are HIGH,
otherwise it is LOW (0). The Venn diagram shown in Figure 1-6 provides an insight into the OR
function. The highlighted area represents the function X=A+B.

Figure 1-5 Standard Logic Symbol for OR gate

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INPUT OUTPUT

A B X=A+B

0 0 0

0 1 1

1 0 1

1 1 1

Table 1-3 Truth table for OR gate

Figure 1-6 Venn diagram illustrating OR operation

4. The NAND Gate:

The NAND, which is composed of two or more inputs and a single output, is a very popular logic
element because it may be used as a universal function. That is, it may be employed to construct an
inverter, an AND gate, an OR gate, or any combination of theses functions. The term NAND is formed
by the concatenation NOT-AND and implies an AND function with an inverted output. The standard
symbol for the NAND gate is shown in Figure 1-7 and its truth table listed in Table 1-4. The logical
operation of the NAND gate is such that the output is LOW (0) only when all the inputs are HIGH (1).

Figure 1-7 Standard logic symbol for NAND gate

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INPUT OUTPUT

A B

0 0 1

0 1 1

1 0 1

1 1 0

Table 1-4 Truth table for NAND gate

5. The NOR gate

The NOR gate, which is composed of two or more inputs and a single output, also has a universal
property. The term NOR is formed by the concatenation NOT-OR and implies an OR function with an
inverted output. The standard symbol for the NOR gate is shown in Figure 1-7 and its truth table listed
in Table 1-5. The logical operation of the NOR gate is such that the output is HIGH (1) only when all
the inputs are LOW (0).

Figure 1-7 Standard logic symbol for NOR gate

INPUT OUTPUT

A B

0 0 1

0 1 0

1 0 0

1 1 0

Table 1-5 Truth table for NOR gate

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6. The Exclusive-OR (XOR) and Exclusive NOR (XNOR) gates

These gates are usually formed from the combination of the other logic gates already discussed.
However, because of their functional importance, these gates are treated as basic gates with their
own unique symbols. The truth tables for the XOR and XNOR gates, shown in Figure 1-8, are listed in
Table 1-6. In the Exclusive-OR gate the output is HIGH (1) when the odd numbers of inputs are HIGH
(1). Conversely, in the Exclusive-NOR gate the output is LOW (0) when the odd number of inputs are
HIGH (1). XNOR is basically an XOR gate followed by an inverter. They are also a multi input and
single output gates.

Figure 1-8 Standard logic symbols for: (a) XOR (b) XNOR

INPUT XOR XNOR

OUTPUT OUTPUT

A B

0 0 0 1

0 1 1 0

1 0 1 0

1 1 0 1

Table 1-6 Truth table for XOR and XNOR logic gates

2.5 Timing diagram: -

Timing diagram is basically a graph that accurately displays the relationship of two or more
waveforms with respect to each other on a time basis. Following examples clearly illustrates the
concept of timing diagrams.
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Figure a: A NOT gate with input signal

Figure b:-Timing diagram of NOT gate of figure a wrt its input (output is high when input is low and
vice versa)

Figure c:- Timing diagram of 2 input AND gate.( Output is high when all inputs are high)

Figure d: - Timing diagram of 3 input AND gate. (Output is high when all inputs are high)
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Figure e: - Timing diagram of 3 input OR gate (output is high when any one of the input is high)

2.6 Terms used in Boolean algebra: -

Variable, complement and literal are terms used in Boolean algebra. A variable is a symbol that is
used to represent a logical quantity. Any single variable can have 1 or 0 value. The complement is the
inverse of the variable and is indicated by over bar. e.g. Complement of variable A is A. It can be
also written as A or Ac. The complement of variable A is read as “NOT A” or “A bar”. A literal is a
variable or complement of a variable.

Boolean Operations

• Boolean addition: - Boolean addition is equivalent to OR operation. The basic rules are:-

0+0=0
0+1=0
1+0=0
1+1=1
In Boolean algebra, a sum term is the sum of literals. In logic circuits, a sum term is produced
by an OR operation with no AND operation involved. Some examples of sum terms are A+B,
A+Bc+C etc.
A sum term is equal to 1 when one or more of the literals in the term are 1. A sum term is 0
only if each of the literal is 0.

__ __
# Determine the values of A, B, C and D that make the sum term A+B + C + D equal to
zero.
Since a sum term is zero only when all literals are zero so,
A=0 __
Bc = 0 → B = 0 → B = 1
C=0 __
Dc = 0 → D = 0 → D = 1

• Boolean multiplication: - Boolean multiplication is equivalent to AND operation. The basic

rules are:-
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0.0=0
0.1=0
1.0=0
1.1=1
In Boolean algebra, a product term is the product of literals. In logic circuits, a product term is
produced by an AND operation with no OR operation involved. Some examples of product
terms are A.B, A.Bc.C etc.
A product term is equal to 1 only if each of the literals in the term is1. A product term is 0 when
one or more of the literals are 0.

__ __
# Determine the values of A, B, C and D that make the product term A.B.C.D equal to one.
Since a product term is one only when all literals are one so,
__
Ac = 1 → A = 1 → A = 0
B=1
C=1
__
c
D =1→D=1 →D=0

2.7 Laws and Rules of Boolean Algebra

The basic laws of Boolean algebra are commutative and associative laws for addition and
multiplication and distributive law. Each of the laws is illustrated with two or three variables, but
the number of variable is not limited to this.
Commutative Laws
The commutative law of addition of two variables is written as: A + B = B + A
i.e. the order in which the variables are ORed makes no difference.

The commutative law of multiplication for two variables is: A. B = B. A

i.e. the order in which the variables are ANDed makes no difference.

Associative laws
The associative law of addition is written as:- A + ( B+C ) = ( A+B ) + C
i.e. when ORing more than two variables, the result is the same regardless of the grouping of the
variables.

The associative law of multiplication is written as A. (B.C) = (A.B).C

i.e. it makes no difference in what order the variables are grouped when ANDing more than two
variables.
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Distributive law
The distributive law is written as: A.(B+C) = A.B + A.C
i.e. ORing two or more variable and then ANDing the result with a single variable is equivalent to
ANDing the single variable with each of the two or more variables and then ORing the products.

The basic rules of Boolean algebra are tabulated below:-

SN Expression Result
1 A+0 A
2 A+1 1
3 A.0 0
4 A.1 A
5 A+A A
6 A+A 1
7 A . A A
8 A . A 0
9 ( Ac)c A
10 A + A.B A
11 A + A.B A+B
12 (A+B). (A+C) A+ B.C

1. Rule 1:- A + 0 = A A variable ORed with 0 is always equal to the variable. If the input variable
A is 1 then output variable X is also 1 and if the input variable is 0 then the output variable X is
also 0. In both case the output being equal to the variable A.

2. Rule 2:- A + 1 = 1 A variable ORed with 1 is always equal to 1. A 1 on the input of the OR gate
always produces 1 as an output regardless of the value of the variable on the other input.
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3. Rule 3:- A.0 = 0 A variable ANDed with 0 is always equal to 0 since 0 on the input of an AND
gate always produces 0 on the output regardless of the value of the variable on the other input.

4. Rule 4:- A.1 = A A variable ANDed with 1 is always equal to the variable. If the input variable
A is 1 then output variable X is also 1 and if the input variable is 0 then the output variable X is
also 0. In both case the output being equal to the variable A.

5. Rule 5:- A + A = A A variable ORed with itself is always equal to the variable. If A is 1 , X is
also 1 and if A is 0 X is also 0,the output being equal to variable A in both case.

6. Rule 6: - A + Ac = 1 A variable ORed with its complement is always equal to 1. If A is 1, its

complement is 0 and hence X is 1. Similarly, if A is 0 its complement is 1 and again X is 1
because any single 1 on the input of OR gate produces 1 on the output.

7. Rule 7:- A.A = A A variable ANDed with itself is always equal to the variable. If A is 1, X is
also 1 and if A is 0 X is also 0, the output being equal to variable A in both case.

8. Rule 8:- A. Ac = 0 A variable ANDed with its complement is always equal to 0. If A is 1, its
complement is 0 and hence X is 0. Similarly, if A is 0 its complement is 1 and again X is 0
because any one 0 on the input of AND gate produces 0 on the output.
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9. Rule 9: - [Ac]c = A The double complement of a variable is always equal to the variable.

10. Rule 10: - A + AB = A This rule can be proved by applying the distributive law, rule 2 and
rule 4 as follows:-

A + A.B = A. (1+B) ………… {Distributive law}

= A.1 ……………… {Rule 2}

=A ………………… {Rule 4}

11. Rule 11: - A + ACB = A + B This rule can be proved as follows:-

A + ACB = (A + A.B) + AC.B ……………….. {Rule 10}

= A + B. (A + AC) …………………. {Distributive law}

= A + B.1 …………………………… {Rule 6}

= A +B ……………………………… {Rule 4}

12. Rule 12 : - ( A+B). (A+C) = A + B.C This rule can be proved as follows:-

(A+B).(A+C) = A.A + A.C + A.B + B.C …………… {Distributive law}

= A + A.C + A.B +B.C …………………. {Rule 7}

= A. (1+C) + A.B + B.C …………… {Distributive law}

= A.1 + A.B +B.C ………………….. {Rule 2}

= A. (1+B) + B.C …………………….. {Distributive Law}

=A.1 + B.C ……………………….. {Rule 2}

= A + B.C …………………………… {Rule 4}

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2.8 De Morgan’s Theorems

First Theorem: - The complement of a product of a variable is equal to the sum of the complements
of the variables. i.e. the complement of two or more variables ANDed is equivalent to the OR of the
complement of individual variable. The formula for expressing this theorem for 2 variables A and B is
given below:-

(A.B)C = AC + BC

Second Theorem: - The complement of a sum of a variable is equal to the product of the
complements of the variables. i.e. the complement of two or more variables ORed is equivalent to the
AND of the complement of the individual variables. The formula for expressing this theorem for 2
variables A and B is given below:-

(A+B)C = (A)C.(B)C

Figure below shows the gate equivalence and truth tables for equation (i) and equation (ii) :

Figure: - NAND gate and equivalent Bubbled OR gate.

INPUT NAND Bubbled

OUTPUT OR
OUTPUT

A B (A.B)C AC + BC

0 0 1 1

0 1 1 1

1 0 1 1

1 1 0 0

Truth table of NAND and Bubbled OR gate (Verification of De Morgan’s First Theorem)
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Figure: - NOR gate and equivalent Bubbled AND gate.

INPUT NOR Bubbled

OUTPUT AND
OUTPUT

A B (A+B)C (A)C. (B)C

0 0 1 1

0 1 0 0

1 0 0 0

1 1 0 0

Truth table of NOR and Bubbled AND gate (Verification of De Morgan’s Second Theorem)

As stated De Morgan’s theorems also apply to expressions in which there are more than two
variables. The following examples illustrate the application of De Morgan’s theorem’s to 3 variable
and 4 variable expressions.

# apply De Morgan’s theorems to the expressions ____ ________

XYZ and X + Y + Z
____ __ __ __
XYZ = X + Y + Z

_________ __ __ __
X + Y + Z = X. Y. Z

Applying De Morgan’s Theorem

The following procedure illustrates the application of De Morgan’s theorems and Boolean algebra to
the specific expression
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2.9 Duality theorem

Duality theorem states that “Starting with a Boolean expression, another equivalent Boolean
expression can be derived by changing each OR sign to AND sign, AND sign to OR sign and
complementing any 0 and 1 present in the expression.” E.g. Dual of A + 0 = A is A.1 = A. Some of
Boolean relations and their duals are tabulated below:-

A+B=B+A A.B = B.A

A + (B + C) = (A + B) + C A.(B.C) = (A.B).C

A(B+C) = A.B + A.C A +B.C = (A+B).(A+C)

A+A=A A. A = A

A+Ac = 1 A. Ac = 0

2.10 Boolean Expression for a Logic circuit

To derive the Boolean expression for a given logic circuit, begin at the leftmost inputs and work
toward the final output, writing the expression for each gate. For example for circuit in the figure
below, the Boolean expression is determined as follows:-

1. The expression of leftmost AND gate with inputs C and D is C.D

2. The output of the leftmost AND gate is one of the input of the OR gate whose other input is B.
So, expression of OR gate is C.D + B
3. The output of OR gate is one of the inputs to the rightmost AND gate whose other input is A.
Hence the expression for this AND gate is A.(C.D + B) which is the final output expression for
the entire circuit.

Input to G1 is C and D

Input to G2 is output of
G1

and B

Input of G3 is output of
G3

and A.
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Constructing a Truth table for a Logic Circuit

Once Boolean expression for a given logic circuit has been determined, a truth table that shows the
output for all possible values of the input variables can be developed. Consider the logic circuit which
is in the figure above. There are 4 inputs A, B, C and D and hence sixteen combinations are possible

Evaluating the Expression

To evaluate the expression A.(B+CD), first find the values of the variable that make the expression
equal to 1, using the rules of Boolean addition and multiplication. In this case, the expressions equal
1 only if A = 1 and B+CD = 1The expression B+CD is 1 if either B is 1 or CD is 1 or B and CD is both
1.Now expression CD is 1 only if both C and D are 1.To sum up, the above expression will be one for
A=1 and B= 1; A=1 and C=1 and D = 1.The truth table is then constructed as:-

INPUTS OUTPUT

A B C D A.(B+CD)

0 0 0 0 0

0 0 0 1 0

0 0 1 0 0

0 0 1 1 0

0 1 0 0 0

0 1 0 1 0

0 1 1 0 0

0 1 1 1 0

1 0 0 0 0

1 0 0 1 0

1 0 1 0 0

1 0 1 1 1

1 1 0 0 1

1 1 0 1 1

1 1 1 0 1

1 1 1 1 1
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# REPLACE THE AND GATE WITH OR GATE AND OR GATE WITH AND GATE
IN ABOVE FIGURE AND DETERMINE THE BOOLEAN EXPRESSION FOR THE
OUTPUT AND CONSTRUCT THE TRUTH TABLE

Simplification Using Boolean algebra

A simplified Boolean expression uses the fewest gates possible to implement a given
expression.
Let us consider the expression: - AB + A (B+C) +B (B+C)
The logic circuit which describes this expression is shown in the figure below:-

Thus the simplification of an expression results in the same output with minimum
number of gates which is depicted in the figure above.
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2.11 Minterms and Maxterms

A binary variable may either appear in its normal form or its complemented form. Consider 2 binary
variables A and B combined with AND operation. There are 4 possible outcomes which are 00, 01, 10
and 11. As a whole, the combination will output 1 when all the inputs are 1 and this can be
represented as: - Ac Bc, AcB, ABc and AB. Hence minterms or standard product is the combination
of n variables as a product of n literals that will designate the entire combination as binary 1. If there
are n variables, there are 2n combinations of minterms which include all literals and whose
designation will always output binary 1. As a rule of thumb, each minterm is obtained from AND term
of the n variable with each variable being primed if corresponding variable represent binary 0 and
unprimed if it represents binary 1. Each minterm is assigned a symbol (Pj) where j is the decimal
equivalent to the binary number of the minterm designated.
Similarly consider 2 binary variables A and B combined with OR operation. There are again 4
possible outcomes which are 0+0, 0+1, 1+0 and 1+1. As a whole, the combination will output 0 when
all the inputs are 0 and this can be represented as: - A+ B, A+Bc, Ac+B and Ac+Bc. Hence
maxterms or standard sum is the combination of n variables as sum of n literals that will designate the
entire combination as binary 0. If there are n variables, there are 2n combinations of maxterms which
include all literals and whose designation will always output binary 0. As a rule of thumb, each
maxterm is obtained from OR term of the n variable with each variable being primed if corresponding
variable represent binary 1 and unprimed if it represents binary 0. Each minterm is assigned a symbol
(Sj) where j is the decimal equivalent to the binary number of the maxterm designated. Also observe
that each maxterm is the complement of its corresponding minterm, and vice versa.
The complement of each term may be determined using DeMorgan’s Theorem
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Input Minterms Maxterms

A B C Terms Designation Terms Designation

0 0 0 P0 S0

0 0 1 P1 S1

0 1 0 P2 S2

0 1 1 P3 S3

1 0 0 P4 S4

1 0 1 P5 S5

1 1 0 P6 S6

1 1 1 P7 S7

Minterms and Maxterms for Three Binary Variables

What is the significance of Minterms and Maxterms?

In short, minterms and maxterms may be used to define the two standard forms for logic expressions,
namely the sum of products (SOP), or sum of minterms, and the product of sums (POS), or
product of maxterms. These standard forms of expression aid the logic circuit designer by simplifying
the derivation of the function to be implemented.

2.12 Standard Forms of Boolean Expressions

1. The sum of products (SOP) form: - When two or more product terms are summed by Boolean
addition, the resulting expression is a sum of products. An SOP expression can be implemented
with one OR and two or more AND gates. Some examples are A.B + A.B.C, A.B.C +C.D.E +
Bc.C.Dc etc
Also an SOP expression can contain a single variable term as in A + Ac.Bc.C. It is to be noted that
a single overbar can’t extend over more than one variable; however more than one variable in a
term can have an overbar. E.g. an SOP expression can have the term Ac.Bc but not (A.B)c.
Domain of a Boolean expression: - The domain of a general Boolean expression is the set of
variables contained in the expression in either complemented or uncomplemented form. E.g. the
domain of the expression ABC+ ABCc is the set of variables A, B and C.
Implementation of an SOP expression: - Implementing an SOP expression simply requires
ORing the outputs of two or more AND gates. A product term is produced by AND operation and
the sum (addition) of two or more product term is produced by OR operation. Therefore SOP
expression can be implemented by AND – OR logic in which the outputs of a number (equal to the
number of product terms in the expression) of AND gates connect to the input of an OR gate. In
the figure below output of OR gate equals SOP expression.
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RED = A
Green = B
BLUE = C
BLACK = D
Output of G4 is SOP
expression AB + BCD +AC

Conversion of general expression to SOP form

Any logic expression can be changed into SOP form by applying Boolean algebra techniques.
Following examples will illustrate how to convert general expression to SOP form:

The standard SOP form: - A standard SOP expression is one in which all the variables in domain
appear as literal in each product term in the expression. E.g. the expression ABCc + ABCcD +CDc has
a domain made up of the variables A, B, C, D.However, the complete set of variables in the domain is
not represented in the last two terms of the expression ie D or Dc is missing from first and A or Ac
and B or Bc is missing from the last.
Standard SOP expressions are important in constructing truth tables and in Karnaugh map
simplification methods.

Converting SOP to standard SOP

1. Multiply each non standard product term by a term made up of the sum of a missing variable and
its complement. This results in two product terms.
2. Repeat step 1 until all resulting product terms contain all variables in the domain in either
complemented or uncomplemented form. In converting a product term to a standard form, the
number of product terms is doubled for each missing variable.
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Binary representation of standard SOP expression

An SOP expression is equal to 1 only if one or more of the product terms in the expression are equal
to 1.
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Converting SOP expressions to Truth table Format

An SOP expression is equal to 1 if at least one of the product terms is equal to 1. A truth table is
simply a list of the possible combinations of input variables values and the corresponding output
value. The following steps shall be followed while converting SOP expression to truth table format.
• Convert the SOP expression to standard SOP expression and list the combination of binary
values of the variables in the expression.
• Place 1 in the output column for each binary value that makes standard product terms
(minterms) in the expression of standard SOP a binary 1 and place 0 for all other remaining
values. __ __
As for an example consider a standard SOP expression A B C + A B C + ABC
Since domain of SOP expression is A, B, C so there are 8 combinations. And binary values of
inputs that make minterms of above expression 1 are respectively 001, 100 and 111. So all other
values of input will yield 0 on the output and thus the truth table will be as shown:-
Input Minterms Output

A B C

0 0 0 0

0 0 1 1

0 1 0 0

0 1 1 0

1 0 0 1

1 0 1 0

1 1 0 0

1 1 1 1

Conclusion: - Standard SOP expression is the sum of minterms that

individually yield 1 on the output.
Conversion to SOP from a truth Table
The SOP expression is the equation of the logic function as read off the truth table to specify the input
combinations when the output is a logical 1. To illustrate, let us consider Table below. Observe that
the output is high for the rows labeled 3, 5 and 6. The SOP expression for this circuit is thus given
any of the following:
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Row Input Output Minterms

Number
(Decimal A B C X
equivalent)

0 0 0 0 0

1 0 0 1 0

2 0 1 0 0

3 0 1 1 1

4 1 0 0 0

5 1 0 1 1

6 1 1 0 1

7 1 1 1 0

The SOP expression can be represented as any of the following:

1
2 X = P3 + P5 + P6 or
3

2. The product of Sums (POS) form: - When two or more sum terms are multiplied, the resulting
expression is a product of sums. An SOP expression can be implemented with one AND and two
or more OR gates. Some examples are (A+B). (A+B+C), (A+B+C). (C+D+E). (Bc+C+Dc) etc
Also an SOP expression can contain a single variable term as in A. (Ac+Bc+C). It is to be noted
that a single overbar can’t extend over more than one variable; however more than one variable in
a term can have an overbar. E.g. an SOP expression can have the term Ac+Bc but not (A+B)c.
Implementation of a POS expression: - Implementing a POS expression simply requires ANDing
the outputs of two or more OR gates. A sum term is produced by OR operation and the product of
two or more sum term is produced by AND operation. Therefore POS expression can be
implemented by OR – AND logic in which the outputs of a number (equal to the number of sum
terms in the expression) of OR gates
connect to the input of an AND gate. In
the figure below output of AND gate
equals POS expression.
RED = A
Green = B
BLUE = C
BLACK = D
Output of G4 is POS expression
(A+B). (B+C+D). (A+C)
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The standard POS form: - A standard POS expression is one in which all the variables in domain
appear as literals in each sum term in the expression. E.g. the expression (A+B+Cc). ( A+B+Cc+D)
.(C+Dc) has a domain made up of the variables A, B, C, D. However, the complete set of variables in
the domain is not represented in the last two terms of the expression ie D or Dc is missing from first
and A or Ac and B or Bc is missing from the last.
Standard POS expressions are important in constructing truth tables and in Karnaugh map
simplification methods.

Converting POS to standard POS

1. Add to each non standard sum term a term made up of the sum of a missing variable and its
complement and apply the rule A + BC = (A + B) (A + C)
2. Repeat step 1 and 2 until all resulting sum terms contain all variables in the domain in either
complemented or uncomplemented form.

Binary representation of standard POS Expression

A POS expression is equal to 0 only if one or more of the sum terms in the expression are equal to 0.
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Converting SOP expressions to Truth table Format

A POS expression is equal to 0 if at least one of the sum terms is equal to 0. A truth table is simply a
list of the possible combinations of input variables values and the corresponding output value. The
following steps shall be followed while converting SOP expression to truth table format.
• Convert the POS expression to standard POS expression and list the combination of binary
values of the variables in the expression.
• Place 0 in the output column for each binary value that makes standard sum terms (maxterms)
in the expression of standard POS a binary 0 and place 1 for all other remaining values.
__ __ __
As for an example consider a standard SOP expression (A + B + C). (A + B + C). (A+ B + C)
Since domain of POS expression is A, B, C so there are 8 combinations. And binary values of
inputs that make maxterms of above expression 0 are respectively 000, 010 and 011. So all other
values of input will yield 1 on the output and thus the truth table will be as shown:-
Input Maxterms Output

A B C

0 0 0 0

0 0 1 1

0 1 0 0

0 1 1 0

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 1

Conclusion: - Standard POS expression is the product of maxterms

that individually yield 0 on the output.

Conversion to POS from a truth Table

The POS expression is the equation of the logic function as read off the truth table to specify the input
combinations when the output is a logical 0. To illustrate, let us again consider Table below. Observe
that the output is low for the rows labeled 0, 1, 2, 4 and 7.
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Row Input Output Maxterms

Number
(Decimal A B C X
equivalent)

0 0 0 0 0

1 0 0 1 0

2 0 1 0 0

3 0 1 1 1

4 1 0 0 0

5 1 0 1 1

6 1 1 0 1

7 1 1 1 0

The POS expression for this circuit is thus given by any of the following:

1
2 X = S0S1S2S4S7
3
Note:
• Boolean functions expressed as a standard SOP or a standard POS are said to be in
canonical form.
• Note that POS is not the complement of the SOP expression.

# Derive the SOP and POS expressions for the truth tables shown below:

Row Input Output

Number
A B X

0 0 0 1

1 0 1 0

2 1 0 1

3 1 1 0
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SOP POS

X = P0 + P2 X = S1S3

Converting standard SOP to standard POS

• Evaluate the combination of variable that makes SOP expression 1.

• Determine the combination of variable that doesn’t make SOP expression 1. These are the
combinations that belong to POS.
• Express the combinations determined from step 2 as POS.
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Converting standard POS to standard SOP

• Evaluate the combination of variable that makes POS expression 0.

• Determine the combination of variable that doesn’t make POS expression 0. These are the
combinations that belong to SOP
• Express the combinations determined from step 2 as SOP.

2.14 Karnaugh Map (K map)

The Karnaugh map (K map) provides a systematic method for simplifying a Boolean expression or a
truth table function. It is similar to truth table because it also provides all the possible values of input
variables and the resulting output variable. When used properly, the K map will produce the simplest
SOP or POS expression possible. Familiarity with the law and rules of Boolean algebra is not
required. Instead, simplification is done graphically using the K mapping technique. Instead of being
organized into columns and rows like a truth table, K map is an array of cells in which each cells
represent binary value of input variables The K map consists of N = 2n cells, where n is the number of
input variables. The cell format is such that there is a single variable change between any adjacent
cells. This is the characteristic that will determine adjacency. The 2, 3, 4 and 5 variable K map is as
shown in the diagram below. For n>5 the K map technique becomes impractical unless implemented
on computer.
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Don’t Care States

Truth table specifications for a logic function may not to include all possible combinations of the input
binary digits for the input variables, yet they may still be complete specifications of the logic function
for the prescribed application. In these situations certain input combinations will not occur due to the
nature of the application. When the input combinations are irrelevant or cannot occur, the output
states are in the Truth table and the K map are filled with an X and are referred to as don’t care
states. When simplifying K maps with don’t care states, the contents of the undefined cells (1
or 0) are chosen according to preference. The aim is to enlarge group sizes thereby
eliminating as many input variables from the simplified expression as possible. Only those X’s
that assist in simplifying the function should be included in the groupings. No additional X’s
should be added that would result in additional terms in the expression. To illustrate let us
consider the Truth Table below.

Input Output

A B C D Y

0 0 0 0 0

0 0 0 1 0

0 0 1 0 0

0 0 1 1 0

0 1 0 0 0

0 1 0 1 0

0 1 1 0 0

0 1 1 1 1

1 0 0 0 1

1 0 0 1 1

1 0 1 0 x

1 0 1 1 x

1 1 0 0 x

1 1 0 1 x

1 1 1 0 x

1 1 1 1 x
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The above truth table is the circuit for BCD code that will output 1 only when inputs are 7, 8 and 9.
The K map of this truth table is:-