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Memory Segmentation in 8086

The 8086 microprocessor utilizes Memory Segmentation to manage its 1 MB memory through 64 KB segments accessed via four segment registers (CS, DS, SS, ES) that define the starting address of each segment. Additionally, Memory Banking divides memory into low and high banks to efficiently handle 16-bit data transfers across an 8-bit memory organization, allowing simultaneous access to two bytes. This architecture enhances memory efficiency, modular programming, and data transfer speed.

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4 views2 pages

Memory Segmentation in 8086

The 8086 microprocessor utilizes Memory Segmentation to manage its 1 MB memory through 64 KB segments accessed via four segment registers (CS, DS, SS, ES) that define the starting address of each segment. Additionally, Memory Banking divides memory into low and high banks to efficiently handle 16-bit data transfers across an 8-bit memory organization, allowing simultaneous access to two bytes. This architecture enhances memory efficiency, modular programming, and data transfer speed.

Uploaded by

Sanskruti Upadhyay
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Memory Segmentation in 8086

The 8086 microprocessor has a 20-bit address bus, which means it can access up to 1 MB (2²⁰ bytes) of memory.

However, its internal registers are only 16-bit, and thus can address only 64 KB directly.

To bridge this gap, 8086 uses a method called Memory Segmentation.

Segmentation refers to dividing the 1 MB memory into segments of 64 KB each.

These segments are accessed using segment registers that hold the starting address of a segment.

There are four segment registers, each with a specific role:

Segment Register Role


CS (Code Segment) Points to the program instructions (code)
DS (Data Segment) Points to the data used in the program
SS (Stack Segment) Points to the stack (for function calls, local variables, etc.)
ES (Extra Segment) Used mainly during string operations for accessing extra data

Each segment register holds a 16-bit base address of a 64 KB memory block.

To access a specific location inside the segment, an offset (or index/pointer) is added.

The physical address is calculated as:


📍 Physical Address = (Segment Register × 10H) + Offset

For example, if:

CS = 2450H and IP = 0020H,


then the instruction to be fetched is at address:
→ Physical Address = 24500H + 0020H = 24520H

The segment register defines the starting point of a segment.

The offset (like IP, SP, BP, SI, DI, BX) defines the location within that segment.

Since offset is 16-bit, each segment can hold up to 64 KB of memory.

Some of the benefits of segmentation are:

o Efficient use of memory and better code/data organization


o Allows use of same offset values in different segments
o Enables modular programming
o Reduces size of address fields in instructions

Memory Banking in 8086

The 8086 microprocessor has a 16-bit data bus, meaning it can transfer 2 bytes (16 bits) of data at a time.

But, since memory is organized as 8-bit (1 byte) units, this leads to the need for a mechanism that can handle both
even and odd addresses efficiently.

This mechanism is called Memory Banking.


Memory banking refers to dividing the system memory into two 8-bit memory banks:

🔸 Low Bank – Stores data at even addresses (e.g., 0000H, 0002H, ...)

🔸 High Bank – Stores data at odd addresses (e.g., 0001H, 0003H, ...)

Together, these banks allow 8086 to read/write 16-bit data efficiently, even though memory chips are 8-bit wide.

When a 16-bit data transfer is required:

• If the address is even:


o The data is aligned properly.
o Both bytes (low + high) are fetched in one operation using two memory banks.

• If the address is odd:

• The data is not aligned, so it takes two memory accesses:


1. First, the high byte at the odd address is read.
2. Then, the next even address is used to fetch the low byte.

Control Signals Used:

• A0 (Address line 0) – Used to identify if address is even (A0 = 0) or odd (A0 = 1).
• BHE̅ (Bus High Enable) – Active LOW signal, used to enable the higher byte (D8–D15).

A0 BHE̅ Operation
0 0 Access both lower and upper byte (16-bit, even address)
0 1 Access only lower byte (even address)
1 0 Access only upper byte (odd address)

Memory Banking is needed to ensure efficient use of the 16-bit data bus.

It allows simultaneous access to two memory bytes

It supports both aligned and unaligned memory accesses

It also improves overall data transfer speed

Advantages of Memory Banking are:

Simultaneous fetch of two bytes

Faster execution

Makes the most of the 16-bit data bus

Easier memory design

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