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The document outlines the instruction cycle in computers, detailing the phases involved in executing instructions, including fetching, decoding, reading addresses, and executing. It explains the nature of computer instructions, their structure, types of operands, operations, addressing modes, and the differences between RISC and CISC architectures. Additionally, it discusses the concept of machine states and processor status, highlighting the various states a process can be in during execution.

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0% found this document useful (0 votes)
4 views9 pages

Cao Assignment 2 Answers New

The document outlines the instruction cycle in computers, detailing the phases involved in executing instructions, including fetching, decoding, reading addresses, and executing. It explains the nature of computer instructions, their structure, types of operands, operations, addressing modes, and the differences between RISC and CISC architectures. Additionally, it discusses the concept of machine states and processor status, highlighting the various states a process can be in during execution.

Uploaded by

Sujata Bhujbal
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Q. I. Draw the flow of Instruction cycle.

A program residing in the memory unit of a computer consists of a sequence of


instructions. These instructions are executed by the processor by going through a cycle
for each instruction.

In a basic computer, each instruction cycle consists of the following phases:

1. Fetch instruction from memory.


2. Decode the instruction.
3. Read the effective address from memory.
4. Execute the instruction.

The structure of the instruction cycle defines the processing of a single


instruction. The processing of instruction takes various form during the
occurrence of an interrupt or if there is indirect addressing present in the
instruction. In this section, we will discuss various forms of the instruction cycle.

Instruction Cycle Definition


The processing involved in the execution of a single instruction is termed as
Instruction Cycle. This processing is done in two steps i.e. fetch and execute. To
execute an instruction the processor first reads an instruction from the memory
which is called fetching and then the fetched instruction is executed.

If we discuss the basic structure it includes the following two cycles:

 Fetch cycle: In this cycle, the processor reads the instruction that is to be
executed from the memory.
 Execute cycle: In this cycle, the processor interprets the opcode of the
fetched instruction and performs the operations accordingly.

Q.2. What is meant by instruction?


A computer instruction is an order given to a computer processor by a
computer program. At the lowest level, each instruction is a sequence of 0s
and 1s that describes a physical operation the computer is to perform.

Computer instructions typically have three fields. These include an


operation code, or opcode, field that identifies the operation to be
performed, such as "add" data in memory to a specific register. They also
have an address field, showing where registers and memory are located,
and a mode field, showing how the registers and memory will perform.

Instructions vary in length. They can be a few bits long or many bytes. A
very long instruction word (VLIW) is a processing architecture where the
instructions are processed in parallel. VLIW is mostly used in high-
performance, embedded applications. Reduced instruction set computer,
or RISC, microprocessors are designed to perform a small number of
computer instruction types, often of fixed lengths.

How do computer instructions work?


Computer programmers provide the instructions that the computer system
needs, using a keyboard or other type of input device. The computer's
operating system (OS) or other software applications are programmed to
interpret and execute these instructions.

Depending on the particular instruction type, instructions specify special


storage areas called registers that may contain data to be used in carrying
out an instruction. Instructions also specify the location in computer
memory of the data and the input/output (I/O) format to be used.

In a computer's assembler language, each language statement generally


corresponds to a single processor instruction. In high-level languages, such
as C++, a language statement generally results after the program
is compiled in multiple processor instructions.

Q.3.Explain types of operands and type of operations.

Computer instruction is a binary code that determines the micro-operations in a


sequence for a computer. They are saved in the memory along with the information.
Each computer has its specific group of instructions. They can be categorized into two
elements as Operation codes (Opcodes) and Address. Opcodes specify the operation
for specific instructions, and an address determines the registers or the areas used for
that operation.

Operands are definite elements of computer instruction that show what information
is to be operated on. The most important general categories of data are

1. Addresses
2. Numbers
3. Characters
4. Logical data

Addresses
Addresses are nothing but a form of data. Here some calculations must be performed
on the operand reference in an instruction, which is to determine the physical address
of an instruction.

Numbers
All machine languages include numeric data types. Even in non-numeric data
processing, numbers are needed to act as counters, field widths, etc. An important
difference between numbers used in ordinary mathematics and numbers stored in a
computer is that the latter is limited. Thus, the programmer is faced with
understanding the consequences of rounding, overflow and underflow.
Characters
A common form of data is text or character strings. While textual data are most
convenient for humans. Here are the two common standards, such as:

1. American Standard Code for Information Interchange (ASCII)


2. Unicode

Logical data
Normally, each word or other addressable unit (byte, half-word, and so on) is treated
as a single unit of data. Sometimes, it is useful to consider an n-bit unit consisting of
1-bit items of data, each item having the value 0 or 1. When data are viewed this way,
they are considered to be logical data.

Types of operations:
There are two common types of operations: unary and binary. Unary operations involve only one
value, such as negation and trigonometric functions.[3] Binary operations, on the other hand, take
two values, and include addition, subtraction, multiplication, division, and exponentiation.[4]
Operations can involve mathematical objects other than numbers. The logical
values true and false can be combined using logic operations, such
as and, or, and not. Vectors can be added and subtracted. [5] Rotations can be combined using
the function composition operation, performing the first rotation and then the second. Operations
on sets include the binary operations union and intersection and the unary operation
of complementation.[6][7][8] Operations on functions include composition and convolution.[9][10]

Q.4.Explain all addressing modes with suitable examples


Addressing Modes– The term addressing modes refers to the way in which
the operand of an instruction is specified. The addressing mode specifies a
rule for interpreting or modifying the address field of the instruction before
the operand is actually executed.
Implied mode:: In implied addressing the operand is specified in the
instruction itself. In this mode the data is 8 bits or 16 bits long and data is the
part of instruction.Zero address instruction are designed with implied
addressing mode.
Example: CLC (used to reset Carry flag to 0)
Immediate addressing mode (symbol #):In this mode data is present
in address field of instruction .Designed like one address instruction
format.
Example: MOV AL, 35H (move the data 35H into AL register)
Register mode: In register addressing the operand is placed in one of
8 bit or 16 bit general purpose registers. The data is in the register that
is specified by the instruction.
Here one register reference is required to access the data.
Example: MOV AX,CX (move the contents of CX register to AX
register)
Register Indirect mode: In this addressing the operand’s offset is
placed in any one of the registers BX,BP,SI,DI as specified in the
instruction. The effective address of the data is in the base register or
an index register that is specified by the instruction.
Here two register reference is required to access the data.
MOV AX, [BX](move the contents of memory location s
addressed by the register BX to the register AX)
Auto Indexed (increment mode): Effective address of the operand is
the contents of a register specified in the instruction. After accessing
the operand, the contents of this register are automatically incremented
to point to the next consecutive memory location.(R1)+.
Add R1, (R2)+ // OR
R1 = R1 +M[R2]
R2 = R2 + d
Auto indexed ( decrement mode): Effective address of the operand is
the contents of a register specified in the instruction. Before accessing
the operand, the contents of this register are automatically
decremented to point to the previous consecutive memory location. –
(R1)
Add R1,-(R2) //OR
R2 = R2-d
R1 = R1 + M[R2]

Direct addressing/ Absolute addressing Mode (symbol [ ]): The


operand’s offset is given in the instruction as an 8 bit or 16 bit
displacement element. In this addressing mode the 16 bit effective
address of the data is the part of the instruction.
Here only one memory reference operation is required to access the
data.
 Example:ADD AL,[0301] //add the contents of offset address
0301 to AL
 Indexed addressing mode: The operand’s offset is the sum of
the content of an index register SI or DI and an 8 bit or 16 bit
displacement.
Example:MOV AX, [SI +05]
Based Indexed Addressing: The operand’s offset is sum of the
content of a base register BX or BP and an index register SI or DI.
Example: ADD AX, [BX+SI]

Q.5.Explain types of instructions with examples


A computer’s instructions can be any length and have any number of addresses. The arrangement of a
computer’s registers determines the different address fields in the instruction format. The instruction can
be classified as three, two, and one address instruction or zero address instruction, depending on the
number of address fields.

Three Address Instructions


A three-address instruction has the following general format:
source 1 operation, source 2 operation, source 3 operation, destination
ADD X, Y, Z
Here, X, Y, and Z seem to be the three variables that are each assigned to a distinct memory location. The
operation implemented on operands is ‘ADD.’ The source operands are ‘X’ and ‘Y,’ while the destination
operand is ‘Z.’
In order to determine the three operands, bits are required. To determine one operand, n bits are required
(one memory address). In the same way, 3n bits are required to define three operands (or three memory
addresses). To identify the ADD operation, bits are also required.

Two Address Instructions


A two-address instruction has the following general format:
source and destination of the operation
ADD X, Y
Here X and Y are the two variables that have been assigned to a specific memory address. The operation
performed on the operands is ‘ADD.’ This command combines the contents of variables X and Y and
stores the result in variable Y. The source operand is ‘A,’ while ‘B’ is used as both a source and a
destination operand.
The two operands must be determined using bits. To define one operand, n bits are required (one memory
address). To determine two operands, 2n bits are required (two memory addresses). The ADD operation
also necessitates the use of bits.

One Address Instructions


One address instruction has the following general format:
operation source
INCLUDE X
Here X refers to the variable that has access to a specific memory region. The operation performed on
operand A is ‘ADD.’ This instruction adds the value of variable A to the accumulator and then saves the
result inside the accumulator by restoring the accumulator’s contents.

Zero Address Instructions


In zero address instructions, the positions of the operands are implicitly represented. These instructions use
a structure called a pushdown stack to hold operands.

Q.6.Explain machine state and processor status.


A state machine is a concept used in designing computer programs or digital
logic. There are two types of state machines: finite and infinite state machines.
The former is comprised of a finite number of states, transitions, and actions
that can be modeled with flow graphs, where the path of logic can be detected
when conditions are met. The latter is not practically used.

A state machine is any device storing the status of something at a given time.
The status changes based on inputs, providing the resulting output for the
implemented changes. A finite state machine has finite internal memory. Input
symbols are read in a sequence producing an output feature in the form of a
user interface.

State machines are represented using state diagrams. The output of a state
machine is a function of the input and the current state. State machines play a
significant role in areas such as electrical engineering, linguistics, computer
science, philosophy, biology, mathematics, and logic. They are best used in the
modeling of application behavior, software engineering, design of hardware
digital systems, network protocols, compilers, and the study of computation and
languages

The two different groups of state machines are acceptors and transducers.
Acceptors produce a binary output, based on whether the input is accepted or
rejected by the machine.

Process States
Process states are the states in which the process is currently residing. There are basically five
states of processes −
 New − The process is about to be created in this state but not yet created. It is
the program which is present in secondary memory that will be picked up by OS
to create the process.
 Ready − The process enters the ready state after the creation of a process that
means the process is loaded into the main memory.
 Running − The process is chosen by the CPU for instructions and the executions
within the process and they are executed by any one of the available CPU cores.
 Waiting − Whenever the process requests access to I/O or needs input from the
user or needs access to a critical region it enters the blocked or wait state.
 Terminated − Process is killed as well as PCB (Process Control Box) is deleted.

Q. 7.Give the difference between RISC and CISC architecture.

RISC CISC
1. RISC stands for Reduced Instruction1. CISC stands for Complex Instruction
Set Computer. Set Computer.
2. CSIC processor has complex
2. RISC processors have simple instructions that take up multiple clocks
instructions taking about one clock for execution. The average clock cycle
cycle. The average clock cycle per per instruction (CPI) is in the range of 2
instruction (CPI) is 1.5 and 15.
3. Performance is optimized with more 3. Performance is optimized with more
focus on software focus on hardware.
4. It has no memory unit and uses
separate hardware to implement 4. It has a memory unit to implement
instructions.. complex instructions.
5. It has a hard-wired unit of
programming. 5. It has a microprogramming unit.
6. The instruction set is reduced i.e. it
has only a few instructions in the 6. The instruction set has a variety of
instruction set. Many of these different instructions that can be used
instructions are very primitive. for complex operations.
7. CISC has many different addressing
7. The instruction set has a variety of modes and can thus be used to
different instructions that can be used represent higher-level programming
for complex operations. language statements more efficiently.
8. Complex addressing modes are 8. CISC already supports complex
synthesized using the software. addressing modes
9. Multiple register sets are present 9. Only has a single register set
10. They are normally not pipelined or
10. RISC processors are highly pipelined less pipelined
11. The complexity of RISC lies with the 11. The complexity lies in the
compiler that executes the program microprogram
12. Execution time is very less 12. Execution time is very high
13. Code expansion can be a problem 13. Code expansion is not a problem
14. The decoding of instructions is
simple. 14. Decoding of instructions is complex
15. It does not require external memory 15. It requires external memory for
for calculations calculations
16. The most common RISC
microprocessors are Alpha, ARC, ARM, 16. Examples of CISC processors are the
AVR, MIPS, PA-RISC, PIC, Power System/360, VAX, PDP-11, Motorola
Architecture, and SPARC. 68000 family, AMD, and Intel x86 CPUs.
17. RISC architecture is used in high-end
applications such as video processing, 17. CISC architecture is used in low-end
telecommunications, and image applications such as security systems,
processing. home automation, etc.

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