S1BCA DIGITAL FUNDAMENTALS LOGIC GATES

MODULE 2
UNIT 2-Logic gates- AND, OR, NOT, NAND, NOR, XOR and XNOR. Truth tables and graphical
representation. Basic laws of Boolean algebra, Simplification of Expressions, DeMorgan’s
theorems, Dual expressions, Canonical expressions. Minterms and Maxterms, SOP and POS
expressions. Simplification of expressions using K-MAP (up to 4 variables), Representation of
simplified expressions using NAND/NOR Gates, Don’t care conditions.

Logic gates
Logic gates are electronic circuits because they are made up of a number of electronic devices
and components. They are constructed in a wide variety of forms. They are usually embedded in
large-scale integrated circuits (LSI) and very large-scale integrated circuits (VLSI) along with a large
number of other devices, and are not easily accessible or identifiable. Each gate is dedicated to a
specific logic operation. Logic gates are also constructed in small-scale integrated circuits (SSI), where
they appear with few others of the same type. In these integrated devices, the inputs and outputs of all
the gates are accessible, that is, external connections can be made to them just like discrete logic gates.
The interconnection of gates to perform a variety of logical operations is called logic design.
There are just three basic types of gates—AND, OR and NOT. Inputs and outputs of logic gates
can occur only in two levels. These two levels are termed HIGH and LOW, or TRUE and FALSE, or
ON and OFF, or simply 1 and 0. A table which lists all the possible combinations of input variables
and the corresponding outputs is called a truth table. Here we use level logic, a logic in which the
voltage levels represent logic 1 and logic 0. Level logic may be positive logic or negative logic. A
positive logic system is the one in which the higher of the two voltage levels represents the logic 1
and the lower of the two voltage levels represents the logic 0. A negative logic system is the one in
which the lower of the two voltage levels represents the logic 1 and the higher of the two voltage
levels represents the logic 0.

AND Gate
An AND gate has two or more inputs but only one output. The output assumes the logic 1
state, only when each one of its inputs is at logic 1 state. The output assumes the logic 0 state
even if one of its inputs is at logic 0 state. The AND gate may, therefore, be defined as a device
whose output is 1, if and only if all its inputs are 1. Hence the AND gate is also called an all or nothing
gate. The logic symbol and the truth table of a two-input AND gate are shown in Figure 4.1. Note that
the output is 1 only when all the inputs are 1. The symbol for the AND operation is ‘ ◊’, or we use no
symbol at all.

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With the input variables to the AND gate represented by A, B, C, . . ., the Boolean expression for the
output can be written as X = A . B . C . . ., which is read as ‘X is equal to A and B and C . . .’ or ‘X is equal
to ABC . . .’, or ‘X is equal to A dot B dot C . . .’

OR Gate
Like an AND gate, an OR gate may have two or more inputs but only one output. The
output assumes the logic 1 state, even if one of its inputs is in logic 1 state. Its output assumes
the logic 0 state, only when each one of its inputs is in logic 0 state. An OR gate may, therefore, be
defined as a device whose output is 1, even if one of its inputs is 1. Hence an OR gate is also called an
any or all gate. It can also be called an inclusive OR gate because it includes the condition ‘both the
inputs can be present’.
The logic symbol and the truth table of a two-input OR gate are shown in Figure 4.4. Note that
the output is 1 even if one of the inputs is 1.

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The symbol for the OR operation is ‘+’. With the input variables to the OR gate represented by A, B, C . .
. , the Boolean expression for the output can be written as X = A + B + C + . . . . This is read as ‘X is equal
to A or B or C or . . . ’, or ‘X is equal to A plus B plus C plus . . .’. Discrete OR gates may be realized by
using diodes or transistors.

NOT Gate(Inverter)
A NOT gate, also called an inverter, has only one input and, of course, only one output. It is a device

whose output is always the complement of its input. That is, the output of a NOT gate assumes the
logic 1 state when its input is in logic 0 state and assumes the logic 0 state when its input is in
logic 1 state. The logic symbol and the truth table of an inverter are shown in Figures 4.7a and 4.7b,
respectively.

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The symbol for NOT operation is ‘–’ (bar). When the input variable to the NOT gate is represented by A
and the output variable by X, the expression for the output is X =A . This is read as ‘X is equal to A bar’

UNIVERSAL GATES

Though logic circuits of any complexity can be realized by using only the three basic gates (AND, OR
and NOT), there are two universal gates (NAND and NOR), each of which can also realize logic circuits
single-handedly. The NAND and NOR gates are therefore, called universal building blocks. Both NAND
and NOR gates can perform all the three basic logic functions (AND, OR and NOT).

NAND Gate
NAND means NOT AND, i.e. the AND output is NOTed. So, a NAND gate is a combination of an
AND gate and a NOT gate (Figure 4.8a). In fact NAND is a contraction of the word NOT-AND. The
expression for the output of the NAND gate can, therefore, be written as X = ABC... and is read as ‘X is
equal to A .B .C . . . whole bar’. The output is logic 0 level, only when each of the inputs assumes a logic
1 level. For any other combination of inputs, the output is a logic 1 level. The logic symbol and the
truth table of a two-input NAND gate are shown in Figures 4.8a and b.

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NOR Gate
NOR means NOT OR, i.e. the OR output is NOTed. So, a NOR gate is a combination of an OR gate and a
NOT gate (Figure 4.14a). In fact NOR is a contraction of the word NOT-OR . The expression for the
output of the NOR gate is, X = A+B+C ... + and is read as ‘X is equal to A plus B plus C plus . . . whole bar’.
The output is logic 1 level, only when each one of its inputs assumes a logic 0 level. For any other
combination of inputs, the output is a logic 0 level. The logic symbol and the truth table of a two-input

NOR gate are shown in Figures 4.14a and 4.14b respectively.

EXCLUSIVE-OR (X-OR) GATE

An X-OR gate is a two input, one output logic circuit, whose output assumes a logic 1 state when one
and only one of its two inputs assumes a logic 1 state. Under the conditions when both the inputs
assume the logic 0 state, or when both the inputs assume the logic 1 state, the output assumes a logic
0 state.
Since an X-OR gate produces an output 1 only when the inputs are not equal, it is called an
anti-coincidence gate or inequality detector. The output of an X-OR gate is the modulo sum of its two
inputs. The name Exclusive-OR is derived from the fact that its output is a 1, only when exclusively
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one of its inputs is a 1 (it excludes the condition when both the inputs are 1).
The logic symbol and truth table of a two-input X-OR gate are shown in Figures 4.20a and
4.20b, respectively. If the input variables are represented by A and B and the output variable by X, the

expression for the output of this gate is written as

equal to A ex-or B’

Three or more variable X-OR gates do not exist. When more than two variables are to be X-ORed, a
number of two-input X-OR gates will be used. The X-OR of a number of variables assumes a l state only
when an odd number of input variables assume a 1 state. The Boolean expression whose value is
equal to 1 only when an odd number of its variables are equal to 1 is called an odd function.

PROPERTIES OF EXCLUSIVE-OR

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EXCLUSIVE-NOR (X-NOR) GATE

An X-NOR gate is a combination of an X-OR gate and a NOT gate. The X-NOR gate is a two input, one
output logic circuit, whose output assumes a 1 state only when both the inputs assume a 0 state or
when both the inputs assume a 1 state. The output assumes a 0 state, when one of the inputs assumes
a 0 state and the other a 1 state. It is also called a coincidence gate, because its output is 1 only when
its inputs coincide. It can be used as an equality detector because it outputs a 1 only when its inputs
are equal.

The logic symbol and truth table of a two-input X-NOR gate are shown in Figures 4.21a and 4.21b,
respectively. If the input variables are represented by A and B and the output variable by X, the
expression for the output of this gate is written as

Three or more variable X-NOR gates do not exist. When a number of variables are to be X NORed, a

number of two-input X-NOR gates can be used. The X-NOR of a number of variables assumes a 1 state,

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only when an even number (including zero) of input variables assume a 0 state.
The Boolean expression whose value is equal to 1 only when an even number of its variables are
equal to 1 is called an even function.

Basic laws of Boolean Algebra

Boolean Algebra is an algebra, which deals with binary numbers & binary variables. Hence, it is also
called as Binary Algebra or logical Algebra. A mathematician, named George Boole had developed this
algebra in 1854. The variables used in this algebra are also called as Boolean variables. The range of
voltages corresponding to Logic ‘High’ is represented with ‘1’ and the range of voltages corresponding
to logic ‘Low’ is represented with ‘0’.
The basic laws of Boolean algebra-the commutative laws for addition and multiplication, the
associative laws for addition and multiplication, and the distributive law-are the same as in ordinary

algebra.

Commutative Laws
Commutative laws allow change in position of AND or OR variables. There are two commutative laws.
Law 1: A + B = B + A

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This law states that, A OR B is the same as B OR A, i.e. the order in which the variables are ORed is
immaterial. This means that it makes no difference which input of an OR gate is connected to A and
which to B. We give below the truth tables illustrating this law.

Law 2: A .B = B .A
This law states that A AND B is the same as B AND A, i.e. the order in which the variables are ANDed is
immaterial. This means that it makes no difference which input of an AND gate is connected to A and
which to B. The truth tables given below illustrate this law.

Associative Laws
The associative laws allow grouping of variables. There are two associative laws.
Law 1: (A + B) + C = A + (B + C)
A OR B ORed with C is the same as A ORed with B OR C. This law states that the way the
variables are grouped and ORed is immaterial. The truth tables given next illustrate this law.

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Law 2: (A .B)C = A(B . C)

A AND B ANDed with C is the same as A ANDed with B AND C. This law states that the way the
variables are grouped and ANDed is immaterial. See the truth tables below:

Distributive Laws

The distributive laws allow factoring or multiplying out of expressions. There are two distributive
laws.
Law 1: A(B + C) = AB + AC
This law states that ORing of several variables and ANDing the result with a single variable is
equivalent to ANDing that single variable with each of the several variables and then ORing the
products. The truth table given below illustrates this law

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Law 2: A + BC = (A + B)(A + C)
This law states that ANDing of several variables and ORing the result with a single variable is
equivalent to ORing that single variable with each of the several variables and then ANDing the sums.
This can be proved algebraically as shown below. Also, the truth tables given next illustrate this law.

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DIGITAL FUNDAMENTALS

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