Jaipur Engineering College & Research Centre Jaipur

Department of Artificial Intelligence & Data Science

Lab File

Microprocessor and Interfaces Lab (4CS4-21)

IV Semester, Session 2024-25

Submitted By:
Student Name
Registration ID
 Experiment # 1

Object: Write an Assembly Language Program (ALP) to add the contents of memory locations XX50 &
XX51 & place the result in memory location XX80.
Flowchart
Program:
Memory Machine
Labels Mnemonics Operands Comments
Address Codes
2000 0E, 00 MVI C, 00H Clear C register for Carry
2002 21, 50, 20 LXI H, 2050H Load initial address to get operand
2005 7E MOV A, M Load Acc with a memory element
2006 23 INX H Point to next location
2007 46 MOV B, M Load B with the second operand
2008 80 ADD B Add B with A
2009 D2, 0D, 20 JNC STORE When CY = 0, go to STORE
200C 0C INR C Increase C by 1
200D 21, 80, 20 STORE LXI H, 2080H Load the destination address
2010 77 MOV M, A Store the result
2011 23 INX H Point to next location
2012 71 MOV M, C Store the carry
2013 76 HLT Terminate the program

Result:
Location I II

Data 1 2501

Data 2 2502

Result (Sum) 2080

Result (Carry) 2081

 Experiment # 2

Object: Write an Assembly Language Program (ALP) to add two 16-bit numbers stored in memory
location & store the result in another memory location.

Flowchart
Program:

Memory Machine
Labels Mnemonics Operands Comments
address Codes
2000 2A, 01, 25 LHLD 2501 H Load the content of 2501H location in
Register L and Register H is loaded with the
content of 2502H location
2003 EB XCHG The contents of HL register pair are
exchanged with DE register pair so that first
data is stored in DE register pair
2004 2A, 03, 25 LHLD 2503H Load second 16-bit number (data-2) in HL
pair
2007 19 DAD D The contents of DE pair are added with the
contents of HL pair and result is stored in HL
pair
2008 22, 05, 25 SHLD 2505H Store LSBs of sum in 2505H and MSBs of
sum 2506 H
200B 76 HLT Halt

Result:
Location I II

Data 1 2501

2502

Data 2 2503

2504

Result 2505

2506
 Experiment # 3

Object: Write an Assembly Language Program (ALP) to transfer a block of data from memory location
XX00 to another memory location XX00 in Forward & Reverse order.

Flowchart: 1. Forward Order

Program:
Program:
Memory Machine
Labels Mnemonics Operands Comments
address Codes
2000 21, 2F, 20 LXI H, 202F Store the address of number of data,
3050H in HL register pair
2003 46 MOV B, M Load number of data in Register B from
memory
2004 21, 50, 20 LXI D, 2050 Store the destination address in DE
register pair
2007 23 INX H Increment HL register pair
2008 7E LOOP MOV A, M Move data from source to accumulator
2009 EB XCHG Exchange the content of HL and DE
200A 77 MOV M, A Store the content of accumulator, data in
destination address
200B EB XCHG Exchange the content of HL and DE
200C 23 INX H Increment source address
200D 13 INX D Increment destination address
200E 5 DCR B Decrement Register B.
200F C2, 08, 20 JNZ LOOP If B is not zero, Jump to LOOP
2012 76 HLT

Result:
Input Output

Address Data Address Data

2050 2060

2051 2061

2052 2062

2053 2063

2054 2064
Flowchart: 2. Reverse Order
Program:
Memory Machine
Address Codes Labels Mnemonics Operands Comments
2000 21, 30, 20 LXI H, 2030 Point to 2030 to get block size
2003 4E MOV C, M Take the block size into C
2004 11, 60, 20 LXI D, 2060 Point to the destination address
2007 7D MOV A, L Load L into A
2008 81 ADD C Add C to point to last address of block
2009 6F MOV L, A Store A to L again
200A 7E LOOP MOV A, M Load memory to A
200B 12 STAX D Store A into destination pointed by DE
200C 13 INX D Point destination to next address
200D 2B DCX H Point source to previous address
200E 0D DCR C Decrease C by 1
200F C2, 0A, 20 JNZ LOOP if Z is not set jump to LOOP
2012 76 HLT Terminate the program

Result:
Input Output

Address Data Address Data

2031 2060

2032 2061

2033 2062

2034 2063

2035 2064
 Experiment # 4

Object: Write an Assembly Language Program (ALP) to swap two blocks of data stored in memory.

Flowchart
Using 3-step Swap
Memory Machine
Labels Mnemonics Operands Comments
address Codes
2000 21, 2F, 20 LXI H, 202FH Point 2050H to get byte count
2003 4E MOV C, M Load Count from memory
2004 21, 30, 20 LXI H, 2030H Point first block address
2007 11, 50, 20 LXI D, 2050H Point second block address
200A 46 LOOP MOV B, M Take element from first block to B
200B 1A LDAX D Take element from second block to Acc
200C 77 MOV M, A Store Acc content to second block
200D 78 MOV A, B Load B to A
200E 12 STAX D Store into second block
200F 23 INX H Point to next address of first block
2010 13 INX D Point to next address of second block
2011 0D DCR C Decrease the count variable
2012 C2, 0A, 20 JNZ When block is not completed, jump to
LOOP LOOP
2015 76 HLT Terminate the program

Result:
Data before executing the program
Address Data Address Data
 2030 2050

2031 2051

2032 2052

2033 2053

2034 2054

Data after executing the program

Address Data Address Data

2030 2050

2031 2051

2032 2052

2033 2053

2034 2054
 Experiment # 5

Object: Write an Assembly Language Program (ALP) to find the square of a number.

Flowchart
Program:
Memory Machine
Labels Mnemonics Operands Comments
Address Codes
2000 21, 50, 20 LXI H, 2050H Load the number from 2050H
2003 AF XRA A Clear Accumulator
2004 46 MOV B, M Load data from memory to B
2005 86 LOOP ADD M Add memory byte with A
2006 05 DCR B Decrease B by 1
2007 C2, 05, 20 JNZ LOOP If Z = 0, jump to loop
200A 32, 60, 20 STA 2060H Store result into memory
200D 76 HLT Terminate the program

Result:
Input (Number) Output (Square of Number)

Location Data Location Data

2050 2060
 Experiment # 6

Object: Write an Assembly Language Program (ALP) to convert Binary to its

equivalent BCD.

Flowchart
Program:

Memory Machine
Labels Mnemonics Operands Comments
Address Codes
2000 21, 00, 20 LXI H, 2000H Initialize memory pointer
2003 16, 00 MVI D, 00H Clear D register for Most significant
Byte
2005 AF XRA A Clear Accumulator
2006 4E MOV C, M Get Binary data
2007 C6, 01 LOOP ADI 01H Count the number one by one
2009 27 DAA Adjust for BCD count
200A D2, 0E, 20 JNC SKIP Jump to SKIP
200D 14 INR D Increase in register D
200E 0D SKIP DCR C Decrease C register
200F C2, 07, 20 JNZ LOOP Jump to LOOP
2012 6F MOV L, A Load the Least Significant Byte
2013 62 MOV H, D Load the Most Significant Byte
2014 22, 50, 20 SHLD 2050H Store the BCD on memory
2017 76 HLT Terminate the program

Result:
Input (Binary Number) Output (BCD Equivalent)

Location Data Location Data

2000 2050 (LoByte)

2051 (HiByte)
 Experiment # 7

Object: Write an Assembly Language Program (ALP) to find Largest & Smallest number from a given
array.

Flowchart
1. For Largest Number
Program:

Memory Machine
Labels Mnemonics Operands Comments
address Codes
2000 0E, 05 MVI C, 05 Load count value in Register C
2002 21, 01, 25 LXI H, 2501 Load address of first data in HL register pair
2005 7E MOV A, M Copy 1st data in accumulator
2006 0D DCR C Decrement Register C
2007 23 LOOP INX H Increment HL register for address of next data
2008 BE CMP M Compare next data with the content of
accumulator
2009 D2,0D,20 JNC LEVEL If carry is not generated, jump to LEVEL
200C 7E MOV A, M Copy large number in accumulator from
memory
200D 0D LEVEL DCR C Decrement Register C
200E C2, 07, 20 JNZ LOOP Jump not zero to LOOP
2011 32, 06, 25 STA 2506 Store largest number in 2506H location
2014 76 HLT

Result:
Location Values

Data 1 2501

Data 2 2502

Data 3 2503

Data 4 2504

Data 5 2505

Result (Largest
2506
Number)

Flowchart
2. For Smallest Number
Program:

Memory Machine
Labels Mnemonics Operands Comments
address Codes

2000 0E, 05 MVI C, 05 Load count value in Register C

2002 21, 01, 25 LXI H, 2501 Load address of first number in HL register
pair
2005 7E MOV A, M Copy first number in accumulator
2006 0D DCR C Decrement Register C
2007 23 LOOP INX H Increment HL register for address of next
number
2008 BE CMP M Compare next number with the content of
accumulator
2009 DA, 0D, 20 JC LEVEL If carry is generated, jump to LEVEL
200C 7E MOV A, M Copy large number in accumulator from
memory
200D 0D LEVEL DCR C Decrement Register C
200E C2, 07, 20 JNZ LOOP Jump not zero to LOOP
2011 32, 06, 25 STA 2506 Store smallest number in 2506H location
2004 76 HLT

Result:
Location Values

Data 1 2501

Data 2 2502

Data 3 2503

Data 4 2504

Data 5 2505

Result (Smallest
2506
Number)
 Experiment # 8

Object: Write an Assembly Language Program (ALP) to sort an array in Descending/ Ascending order.

Flowchart
Descending Order
Program

Memory Machine
Labels Mnemonics Operands Comments
address Codes

2000 0E, 05 MVI C, 05H Load count value of number of data in

Register C
2002 16, 05 START MVI D, 05 Load count for number of comparisons in
Register D
2004 21, 01, 25 LXI H, 2501H Load memory location of 1st number
2007 7E MOV A, M 1st number in accumulator
2008 23 LOOP INX H Increment HL register pair for addressing
next number
2009 46 MOV B, M Copy next number in Register B from
memory
200A B8 CMP B Compare next number with accumulator
200B DA, 17, 20 JC LEVEL 1 If the content of accumulator > next
number, jump to LEVEL 1
200E 2B DCX H Increment HL register pair to locate the
addressing for storing largest number
200F 77 MOV M, A Store largest of the two numbers in
memory
2010 78 MOV A, B Move smallest of the two numbers in
accumulator from Register B
2011 C3, 19, 20 JMP LEVEL 2 Jump to LEVEL 2
2014 2B DCX H
2015 77 MOV M, A Place smaller of the two numbers in
accumulator
2016 C3 JMP Jump to LEVEL 2
2017 2B LEVEL 1 DCX H Store largest of the two numbers in
memory
2018 70 MOV M, B
2019 23 LEVEL 2 INX H
201A 15 DCR D Decrement Register D to count for
number of comparisons
201B C2, 08, 20 JNZ LOOP Jump to Loop until D is not zero
201E 77 MOV M, A Place smallest number in memory
201F 0D DCR C Decrement count value
2020 C2, 02, 20 JNZ START Jump to START when not zero
2023 76 HLT Halt
Result:
Data after program execution (in
Data (Initially)
Descending Order)

2501 2501

2502 2502

2503 2503

2504 2504

2505 2505

Experiment # 9
Object: Write an Assembly Language Program (ALP) to multiply two 8-bit numbers whose result is 16-
bit.

Flowchart
Program:
Memory Machine
Labels Mnemonics Operands Comments
Address Codes
2000 21, 50, 20 LXI H, 2050H Address of multiplier in HL pair
2003 4E MOV C, M Store multiplier in Register C from
memory
2004 24 INX H Address of multiplicand in HL pair
2005 5E MOV E, M Multiplicand in Register E
2006 16, 00 MVI D, 00H Load 00H in Register D
2008 21, 00, 00 LXI H, 0000 Initial value of product = 00H in HL pair

200B 19 LOOP DAD D Add content of DE with content of HL

200C 0D DCR C Decrement Register C
200D C2, 0B, 20 JNZ LOOP If not zero, jump to LOOP
2010 EB XCHG The content of DE register pair and HL
register pair exchanged; result in DE
register
2011 21, 60, 20 LXI H, 2060H Load 2060H in HL pair
2014 73 MOV M, E Store content of Register E in 2060H
location
2015 23 INX H Address of next memory location in HL
pair
2016 72 MOV M, D Store content of Register D in 2061H
location
2017 76 HLT Stop

Result:
Input Output (16-bit)

Location Data Location Data

2050
2060 (LoByte)
(Multiplier)

2051
2061 (HiByte)
(Multiplicand)
 Experiment # 10

Object: Write an Assembly Language Program (ALP) for division of two 8-bit numbers.

Flowchart
Program:
Memory Machine
Labels Mnemonics Operands Comments
Address Codes
2000 21, 50, 20 LXI H, 2050H
2003 46 MOV B, M Get the dividend in B reg.
2004 0E, 00 MVI C, 00H Initialize reg. C for Quotient
2006 23 INX H
2007 7E MOV A, M Get the divisor in A reg.
2008 B8 NEXT: CMP B Compare A reg. with register B
2009 DA, 10, 20 JC LOOP Jump on carry to LOOP
200B 90 SUB B Subtract A reg. from B reg.
200C 0C INR C Increment content of register C
200D C3 JMP NEXT Jump to NEXT
2010 32, 80, 20 LOOP: STA 2080 Store the remainder in Memory
2013 79 MOV A, C
2014 32, 81, 20 STA 2081 Store the quotient in memory
2017E 76 HLT Terminate the program

Result:
Input Output

Location Data Location Data

2050 (Dividend) 2080 (Remainder)

2051 (Divisor) 2081 (Quotient)

 Experiment # 11

Object: Write an Assembly Language Program (ALP) to perform traffic light control operation.

Theory
INTRODUCTION
In this modern life, the number of vehicles increases more day by day. The increase of vehicle may
cause accidents and other problems on the road. Controlling traffic at regular intervals of time with
accuracy and uniformity has become a necessity to avoid accidents, discomfort of drivers. The
microprocessor controls the traffic signals very effectively and with accurate timings. The module
"Traffic Light Control Card" based on the microprocessor and Programmable Peripheral Interface
(PPI). This Traffic Light Control Card uses the ports of Programmable Peripheral Interface (PPI) 8255.
One can change the sequence and time delay between two signals by implementing the logic.

Traffic Light Control Layout

PORT ADDRESS
Port A 00
Port B 01
 Port C 02
Control Word Register 03

Program:

Memory Machine
Labels Mnemonics Operands Comments
Address Codes
2000 MVI A, 80H 3E, 80 Initialize 8255, all ports as output port
2002 OUT 03H D3, 03
2004 START: MVI A, 10H 3E, 10 Go straight and Turn right signal for traffic
of UP direction
2006 OUT 00H D3, 00
2008 OUT 01H D3, 01
200A MVI A, 11H 3E, 11 Stop signal for traffic of other three
directions
200C OUT 02H D3, 02
200E CALL DELAY1 CD, 00, 21
2011 MVI A, 04H 3E, 04 Alert signal for traffic of UP direction
2013 OUT 00H D3, 00
2015 OUT 01H D3, 01
2017 CALL DELAY2 CD, 50, 21
201A MVI A, 41H 3E, 41 Go straight and Turn right signal for traffic
of RIGHT direction
201C OUT 00H D3, 00
201E OUT 01H D3, 01
2020 MVI A, 11H 3E, 11 Stop signal for traffic of other three
directions.
2022 OUT 02H D3, 02
2024 CALL DELAY1 CD, 00, 21
2027 MVI A, 04H 3E, 04 Alert signal for the traffic of RIGHT
direction
2029 OUT 00H D3, 00
202B OUT 01H D3, 01
202D CALL DELAY2 CD, 50, 21
2030 MVI A, 02H 3E, 02
2032 OUT 00H D3, 00
2034 OUT 01H D3, 01
2036 CALL DELAY2 CD, 50, 21
2039 MVI A, 01H 3E, 01 Go straight and Turn right signal for traffic
of DOWN direction
203B OUT 00H D3, 00
203D OUT 01H D3, 01
203F MVI A, 44H 3E, 44 Stop signal for traffic of other three
directions
2041 OUT 02H D3, 02
2043 CALL DELAY1 CD, 00, 21
2046 MVI A, 01H 3E, 01 Alert signal for the traffic of DOWN
direction
2048 OUT 00H D3, 00
204A OUT 01H D3, 01
204C MVI A, 22H 3E, 22 Go straight and Turn right signal for traffic
of LEFT direction
204E OUT 02H D3, 02
2050 CALL DELAY2 CD, 50, 21
2053 MVI A, 01H 3E, 01 Stop signal for traffic of other three
directions
2055 OUT 00H D3, 00
2057 OUT 01H D3, 01
2059 MVI A, 99H 3E, 99 Alert signal for the traffic of LEFT
direction
205B OUT 02H D3, 02
205D CALL DELAY1 CD, 00, 21
2060 MVI A, 01H 3E, 01
2062 OUT 00H D3, 00
2064 OUT 01H D3, 01
2066 MVI A, 33H 3E, 33
2068 OUT 02H D3, 02
206A CALL DELAY2 CD, 50, 21
206D JMP START C3, 04, 20 jump to START for loop

Delay 1 Subroutine for 10 Seconds (Red Light)

Memory Machine
Labels Mnemonics Operands Comments
Address Codes
2100 MVI B, 25H 06, 25
2102 LOOP3: MVI C, FFH 0E, FF
2104 LOOP2: MVI D, FFH 16, FF
2106 LOOP1: DCR D 15
2107 JNZ LOOP1 C2, 06, 21
210A DCR C 0D
210B JNZ LOOP2 C2, 04, 21
210E DCR B 05
210F JNZ LOOP3 C2, 02, 21
2112 RET C9

Delay 2 Subroutine for 2 Seconds (Yellow Light)

Memory Machine
Labels Mnemonics Operands Comments
Address Codes
2150 MVI B, 05H 06, 05
2152 LOOP3: MVI C, FFH 0E, FF
2154 LOOP2: MVI D, FFH 16, FF
2156 LOOP1: DCR D 15
2157 JNZ LOOP1 C2, 56, 21
215A DCR C 0D
215B JNZ LOOP2 C2, 54, 21
215E DCR B 05
215F JNZ LOOP3 C2, 52, 21
2162 RET C9

Experiment # 12

Object: Write an Assembly Language Program (ALP) to control the speed of a motor.
Theory
Introduction
Digital control systems have come to stay. They are entering into all branches of engineering. There
are many systems to monitor various processes and give out control signals in the form of digits but
there is only one device to convert these digital pulses into precise incremental motion and that
device is stepping motor. Stepper motor is a device which converts digital pulses into precise angular
or liners steps of desired value.

Specification
 Permanent Magnet D.C. Stepping Motors two phase Bifilar wound.
 Step angle: 1.8° ±5% Non-cumulative.
 Step/Revolutions 200.

Features
 Instantaneous response to control pulses.
 Holds on to the position infinitely in static condition.
 No burn-out due to locked rotor.
 Speed can be varied over a wide margin from 0-10,000 steps/ sec. Equivalent to 0-3,000 RPM.
 High torque to inertia ratio. Can be over-driven without damage.
 Can be programmed in three parameters namely, speed, direction and number of steps.

Stepping Motors differ from conventional Servo Motors in following respect:

 There is no control winding in stepping motors. Both windings are Identical.
 The stepping rate (speed of rotation) is governed by frequency of Switching and not by supply
voltage.
 A pulse input two phase clock (instead of continuous pulses) will move the shaft of motor by
one step for every pulse, thus number of steps be moved can be precisely controlled.
 When there is no pulse input, the rotor will remain locked up in the portion in which the last
step was taken since at any time two windings always energized which lock the rotor
electromagnetically.
 Stepping motors can be programmed in three parameters namely:
  Direction
 Speed and
 Number of Steps

Working of Stepping Motor

The stepping action is caused by sequential switching of supply to the two phases of the motor as
described in switching diagram. All stepping motors are of bifilar type with six leads. Watch of the two
Phases of motor has double winding with a centre tap switching the supply from one side to another
of a phase causes reversal of magnetic polar without actually reversing the polarity of supply. For
step input sequence gives 1.8° (full) after and eight step input sequence give 0.9° (half) step function.
The above switching Sequence/Logic will move shaft in one direction. To change direction of rotation
read the sequence upward.
The specified torque of any stepping motor is the torque at stand still (holding torque). This torque is
directly proportional to the current in the winding. The current in winding is governed by the D.C.
resistance of winding. As the switching sequence starts the inductive reactance of the winding which
increases with the frequency of switching opposes the rise of current to desired level within the time
given for one step depending upon the speed of stepping. This is mainly due to L/R time constant of
winding. The drop in current level causes drop in torque as the speed increases. In order to improve
torque at high speeds it is necessary to maintain current at the desired level. This can be done by one
of the following methods:
1. By increasing supply voltage and introducing current limiting resistances in each phase.
Introduction of resistances improves the time constant of winding. Seven to nine times the winding
resistance in each phase will give very good improvement in torque/speed Characteristics.
2. By using a constant current source with or without a chopper instead of using a constant voltage
source which will give even better performance.

Starting and Stopping under Load

There is a limit for every type of stepping motor as regards the speed at which it will start and stop
without losing step. The limit is due to load torque as well as load intertie. Acceleration and
declaration techniques have to be employed. To overcome this acceleration means stepping rate on
switching should be very low and should increase to desired level gradually depending on inertia to be
encountered. Acceleration/deceleration may be as high as 1000 to 3000 steps/sec.
Speed Control of Stepper Motor
The program initializes the 8255 (P1) in order to make port A as output port. The PA0 to PA3 is
connected through buffer and driving circuit to the winding of the stepper motor. The codes for
clockwise movement of stepper motor are FA, F6, F5 and F9 (refer switching sequence). These codes
are to be output in the sequence they are written. In case of anti-clock wise movement of the stepper
motor, output codes are as F9, F5, F6 and F4. The delay routine is called to generate the delay (max.
of about 1 Sec.) between the steps. This delay can be changed to make faster steps. The minimum
delay depends upon the maximum speed of the stepper motor specified.
The speed for steps can be varied by changing the content at 2031- 2032 and 2037-2038. These
values are taken by register pair DE and a corresponding delay is generated. Both the delays are
added up to give the final delay. The individual delay can be calculated by (24N+ 17) × basic Machine
Cycle, N#O. When Nis the number stored in D register pair.

To move the Motor in the reverse direction, change the contents at the addresses as mentioned
below:
Address Forward Reverse
2005 FA F9
200C F6 F5
2013 F5 F6
201A F9 FA

Program:

Memory Machine
Labels Mnemonics Operands Comments
Address Codes
2000 MVI A, 80H 3E, 80 Initialize 8255, all ports as output port
2002 OUT 00H D3, 00
2004 START: MVI A, FAH 3E, FA
2006 OUT 00H D3, 00 Output code for step 0
2008 CALL DELAY CD, 30, 20 Delay between two steps
200B MVI A, F6H 3E, F6
200D OUT 00H D3, 00 Output code for step 1
200F CALL DELAY CD, 30, 20 Delay between two steps
2012 MVI A, F5H 3E, F5
2014 OUT 00H D3, 00 Output code for step 2
2016 CALL DELAY CD, 30, 20 Delay between two steps
2019 MVI A, F9H 3E, F9
201B OUT 00H D3, 00 Output code for step 3
201D CALL DELAY CD, 30, 20 Delay between two steps
2020 JMP START C3, 04, 20

DELAY Routine
Memory Machine
Labels Mnemonics Operands Comments
Address Codes
2030 DELAY: LXI D, 0000 11, 00, 00 Generate a Delay
2033 CALL DELAY CD, BC, 03
2036 RET C9