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Module 5 Microprocessor

The document discusses the internal architecture of the 80286 microprocessor, highlighting its memory management capabilities, two operating modes (real address mode and virtual address mode), and functional blocks including the bus unit and execution unit. It also compares the 80286 with the 80586 microprocessor, detailing differences in architecture, performance, instruction set, and multitasking capabilities. Additionally, it provides an overview of the Raspberry Pi as a single-board computer, its components, applications, and use cases.

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0% found this document useful (0 votes)
11 views15 pages

Module 5 Microprocessor

The document discusses the internal architecture of the 80286 microprocessor, highlighting its memory management capabilities, two operating modes (real address mode and virtual address mode), and functional blocks including the bus unit and execution unit. It also compares the 80286 with the 80586 microprocessor, detailing differences in architecture, performance, instruction set, and multitasking capabilities. Additionally, it provides an overview of the Raspberry Pi as a single-board computer, its components, applications, and use cases.

Uploaded by

yaishnave devi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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MODULE 5

ESSAY

Internal Architecture of 80286

• The 80286 is the first member of the family of advanced microprocessors with memory
management and protection abilities. The 80286 CPU, with its 24-bit address bus is able to
address 16 Mbytes of physical memory. Various versions of 80286 are available that runs on
12.5 MHz, 10 MHz and 8 MHz clock frequencies. 80286 is upwardly compatible with 8086
in terms of instruction set.
• 80286 has two operating modes namely real address mode and virtual address mode. In real
address mode, the 80286 can address up to 1Mb of physical memory address like 8086. In
virtual address mode, it can address up to 16 Mb of physical memory address space and 1 GB
of virtual memory address space.
• The instruction set of 80286 includes the instructions of 8086 and 80186. 80286 has some
extra instructions to support operating system and memory management. In real address
mode, the 80286 is object code compatible with 8086. In protected virtual address mode, it is
source code compatible with 8086. The performance of 80286 is five times faster than the
standard 8086

The CPU contain four functional blocks,

(1) Bus Unit (AU)

(2) Instruction Unit (IU)

(3) Execution Unit (BU)

(4) Address Unit (EU)


Address unit is responsible for calculating the physical address of instructions and data that the CPU
wants to access. Also, the address lines derived by this unit may be used to address different
peripherals. The physical address computed by the address unit is handed over to the bus unit (BU) of
the CPU. Major function of the bus unit is to fetch instruction bytes from the memory. Instructions are
fetched in advance and stored in a queue to enable faster execution of the instructions.
The bus unit also contains a bus control module that controls the prefetcher module. These prefetched
instructions are arranged in a 6-byte instructions queue. The 6-byte prefetch queue forwards the
instructions arranged in it to the instruction unit (IU).
The instruction unit accepts instructions from the prefetch queue and an instruction decoder decodes
them one by one. The decoded instructions are latched onto a decoded instruction queue. The output
of the decoding circuit drives a control circuit in the execution unit, which is responsible for executing
the instructions received from decoded instruction queue.
The decoded instruction queue sends the data part of the instruction over the data bus. The Execution
Unit contains the register bank used for storing the data as scratch pad, or used as special purpose
registers. The ALU, the heart of the EU, carries out all the arithmetic and logical operations and sends
the results over the data bus or back to the register bank.
The 80286 CPU family contains all the basic set of registers, instructions, and addressing modes of
8086. The 80286 processor is upward compatible with the 8086, 8088, and 80186 CPU’s.

Register Organization of 80286

The 80286 CPU contains almost the same set of registers, as in 8086, namely

1. Eight 16-bit general purpose registers


2. Four 16-bit segment registers

3. Status and control registers

4.Instruction Pointer

D2, D4, D6, D7 and D11 are called as status flag bits. The bits D8 (TF) and D9 (IF) are used for
controlling machine operation and thus they are called control flags. The additional fields available in
80286 flag registers are:

1. IOPL - I/O Privilege Field (bits D12 and D13)

2. NT - Nested Task flag (bit D14)

3. PE - Protection Enable (bit D16)

4. MP - Monitor Processor Extension (bit D17)

5. EM - Processor Extension Emulator (bit D18)

6. TS – Task Switch (bit D19)


Protection Enable flag places the 80286 in protected mode, if set. This can only be cleared by
resetting the CPU. If the Monitor Processor Extension flag is set, allows WAIT instruction to generate
a processor extension not present exception.
Processor Extension Emulator flag if set, causes a processor extension absent exception and permits
the emulation of processor extension by the CPU.
Task Switch flag if set, indicates the next instruction using extension will generate exception ,
permitting the CPU to test whether the current processor extension is for the current task Machine
Status Word (MSW) The machine status word consists of four flags – PE, MO, EM and TS of the
four lower order bits D19 to D16 of the upper word of the flag register. The LMSW and SMSW
instructions are available in the instruction set of 80286 to write and read the MSW in real address
mode

Addressing Modes of 80286 Microprocessor:


The 80286 has eight addressing modes for instructions to access operands from memory. The eight
different Addressing Modes of 80286 Microprocessor are as follows:

• Register operand mode


• Immediate operand
• Direct mode
• Register indirect mode
• Based mode
• Indexed mode
• Based indexed mode
• Based indexed mode with displacement

The first two operating modes are related with the register and immediate operands. The remaining six
modes are provided to specify the location of an operand in a memory segment. A memory operand
address consists of two 16-bit components, namely, segment selector and offset. The segment selector
is supplied by a segment register either implicitly chosen by a segment override prefixes. The offset is
determined by summing any combination of the following three address elements.

• The displacement (8- or 16-bit immediate value)


• The base (content of the BX or BP)
• Any carry out from the 16-bit addition is ignored; eight-bit displacements are sign extended to
16-bit values
Register Operand Mode In this mode, the operand is located in one of the 8- or 16-bit general-
purpose registers.
Example:
MOV AX, BX ; Move the value in BX to AX
Immediate Operand Mode In immediate operand mode, the operand is included in the instruction
itself.
Example:
MOV AX, 5 ; Load the immediate value 5 into AX
Direct Mode In direct addressing mode, the operand’s offset is containing in the instruction as an 8-
or 16-bit immediate displacement.
Example:
MOV AX, [1234h] ; Move the value at memory address 1234h into AX
Register Indirect Mode In register indirect addressing mode, the operand’s offset is stored in one of
the general-purpose registers or in SI, DI, BX or BP.
Example:
MOV AX, [BX] ; Move the value at the address contained in BX into AX
Based Mode In this mode, the operand’s offset is computed after adding an 8- or 16-hit displacement
with the contents of a base register (BX or BP).
Example:
MOV AX, [BX + 10] ; Move the value at the address (BX + 10) into AX
Indexed Mode In index addressing mode, the offset is determined by adding a displacement with the
contents of an index register (SI or DI).

Example:
MOV AX, [SI + 20] ; Move the value at the address (SI + 20) into AX

Based Indexed Mode In this mode, the operand’s offset is calculated by the sum of the contents of a
base register and an index register.

Example:
MOV AX, [BX + SI + 5] ; Move the value at the address (BX + SI + 5) into AX

Based Indexed Mode With Displacement In based indexed with displacement addressing mode, the
operands offset is obtained by adding an 8-bit or 16-bit immediate displacement with contents of a
base register and an index register.

Example:
MOV AX, [BX + SI + 5] ; Move the value at the address (BX + SI + 5) into AX

Raspberry Pi
Raspberry Pi is a small single-board computer (SBC). It is a credit card-sized computer that can be
plugged into a monitor. It acts as a minicomputer by connecting the keyboard, mouse, and display.
Raspberry Pi has an ARM processor and 512MB of RAM.
Raspberry Pi mainly consists of the following blocks:

• Processor: Raspberry Pi uses Broadcom BCM2835 system on chip which is an ARM


processor and Video core Graphics Processing Unit (GPU). It is the heart of the Raspberry Pi
which controls the operations of all the connected devices and handles all the required
computations.

• HDMI: High Definition Multimedia Interface is used for transmitting video or digital audio
data to a computer monitor or to digital TV. This HDMI port helps Raspberry Pi to connect its
signals to any digital device such as a monitor digital TV or display through an HDMI cable.

• GPIO ports: General Purpose Input Output ports are available on Raspberry Pi which allows
the user to interface various I/P devices.

• Audio output: An audio connector is available for connecting audio output devices such as
headphones and speakers.

• USB ports: This is a common port available for various peripherals such as a mouse,
keyboard, or any other I/P device. With the help of a USB port, the system can be expanded
by connecting more peripherals.

• SD card: The SD card slot is available on Raspberry Pi. An SD card with an operating system
installed is required for booting the device.

• Ethernet: The ethernet connector allows access to the wired network, it is available only on
the model B of Raspberry Pi.

• Power supply: A micro USB power connector is available onto which a 5V power supply can
be connected.

• Camera module: Camera Serial Interface (CSI) connects the Broadcom processor to the Pi
camera.
• Display: Display Serial Interface (DSI) is used for connecting LCD to Raspberry Pi using 15
15-pin ribbon cables. DSI provides a high-resolution display interface that is specifically used
for sending video data.

Applications and Use Cases

1. Education:

o The primary goal of the Raspberry Pi is to teach programming and computing


fundamentals. It supports various programming languages like Python, Scratch, and
C++.

o Interactive projects, coding clubs, and online resources make it an excellent tool for
educators and students.

2. DIY Projects and Home Automation:

o The Raspberry Pi is popular among hobbyists for building projects such as home
automation systems, media centers (using software like Kodi), and personal servers.

o It can control smart home devices, security cameras, and even act as the brain for
robotics projects.

3. IoT (Internet of Things):

o With its small size, low power consumption, and extensive connectivity options, the
Raspberry Pi is ideal for IoT applications.

o It can collect data from sensors, control actuators, and communicate with other
devices and the cloud.

4. Prototyping and Development:

o Startups and companies use Raspberry Pi for rapid prototyping of new hardware and
software products.

o Its affordability and flexibility make it an excellent choice for initial development
phases before scaling up to custom hardware.

5. Scientific Research:

o Researchers utilize Raspberry Pi for data logging, environmental monitoring, and


running experiments in remote or challenging locations.

o Its ability to interface with various sensors and low power requirements make it
suitable for long-term deployments.

2 WEIGHT

CISC VS RISC

CISC (Complex Instruction Set Computer)

• Complex instructions: Each instruction can perform multiple operations, such as loading
data from memory, performing arithmetic operations, and storing the result back to memory.
• Large instruction set: A vast number of instructions to cover a wide range of operations.

• Variable-length instructions: Instructions can have different lengths.

• Multiple addressing modes: Supports various ways to access data in memory.

• Examples: Early Intel x86 processors, Motorola 68000.

RISC (Reduced Instruction Set Computer)

• Simple instructions: Each instruction performs a single basic operation, such as loading,
storing, arithmetic, or logical operation.

• Small instruction set: A limited number of instructions.

• Fixed-length instructions: All instructions have the same length.

• Limited addressing modes: Fewer addressing modes for simplicity.

• Emphasis on pipelining: Designed to maximize instruction throughput through pipelining.

• Examples: ARM, PowerPC, MIPS

Operating Modes present in 80286 advanced microprocessor

The Intel 80286 microprocessor, introduced in 1982, operates in two distinct modes: Real
Address Mode and Protected Virtual Address Mode. Each mode serves different purposes and
offers unique capabilities, making the 80286 a versatile processor for various applications.

1. Real Address Mode

• Definition: Real Address Mode is the default operating mode of the 80286 upon power-up. It
is designed to maintain compatibility with the earlier 8086 and 8088 processors.
• Address Space: In this mode, the 80286 can address a maximum of 1 MB of physical
memory. The addressing mechanism uses a 20-bit address space, which is segmented into 64K
segments, similar to the 8086 architecture.

• Functionality: The processor operates using segment registers to access memory locations.
Each memory address is calculated using a combination of segment and offset values.
However, Real Mode lacks advanced features such as memory protection and multitasking,
which limits its capabilities for modern applications.

• Instruction Set: The instruction set in Real Address Mode is fully compatible with the 8086,
allowing legacy software to run without modification. This mode is primarily used for simpler
applications that do not require the advanced features of Protected Mode.

2. Protected Virtual Address Mode

• Definition: Protected Virtual Address Mode is an advanced operating mode that enables
features such as multitasking, memory protection, and virtual memory management. It is a
significant enhancement over Real Address Mode.

• Address Space: In this mode, the 80286 can address up to 16 MB of physical memory and
supports up to 1 GB of virtual memory. This extended addressability allows for more complex
applications and larger data sets.

• Memory Management: Protected Mode introduces segmentation, which allows programs to


be divided into segments with defined access rights. This segmentation feature enhances
security and stability by preventing one program from interfering with another. Additionally, it
supports virtual memory, enabling the system to use disk space as an extension of RAM.

• Multitasking: The processor can manage multiple tasks simultaneously without interference,
improving overall system performance and responsiveness. This capability is crucial for
modern operating systems that require efficient resource management.

• Instruction Set: While the instruction set remains compatible with the 8086, the 80286
introduces additional instructions to support memory management and operating system
functions, making it suitable for more sophisticated applications.

Distinguish between 80286 and 80586 microprocessors

1. Architecture and Data Width

• 80286: The 80286 is a 16-bit microprocessor with a 24-bit address bus, allowing it to address
up to 16 MB of physical memory. It operates primarily in Real Mode and Protected Mode,
with memory management capabilities introduced in the latter.

• 80586 (Pentium): The Pentium is a 32-bit microprocessor with a 32-bit data bus and a 32-bit
address bus, enabling it to address up to 4 GB of physical memory. This architecture supports
more complex applications and enhances performance significantly compared to the 80286.

2. Performance and Clock Speed

• 80286: The clock speed of the 80286 ranges from 4 MHz to 25 MHz, with typical
performance measured in MIPS (Million Instructions Per Second) around 2.66 MIPS for the
higher clocked versions. It executes many instructions in 2 clock cycles.
• 80586 (Pentium): The Pentium microprocessor operates at clock speeds starting from 60
MHz and can go beyond 300 MHz in later versions. It employs superscalar architecture,
allowing it to execute multiple instructions per clock cycle, significantly improving overall
performance.

3. Instruction Set and Capabilities

• 80286: The instruction set of the 80286 is an extension of the 8086 instruction set, with added
support for memory management and protection. However, it lacks advanced features such as
out-of-order execution and pipelining.

• 80586 (Pentium): The Pentium introduced a more advanced instruction set that includes
multimedia instructions (MMX) and support for out-of-order execution and pipelining, which
allows for more efficient processing and better performance in multitasking environments.

4. Multitasking and Memory Management

• 80286: While the 80286 introduced Protected Mode for better memory management, it is
limited in its multitasking capabilities compared to later processors. It can handle basic
multitasking but lacks the sophistication found in more modern architectures.

• 80586 (Pentium): The Pentium microprocessor supports advanced multitasking capabilities,


including improved memory management and the ability to run multiple applications
simultaneously without significant performance degradation. It is designed to handle complex
operating systems and applications effectively.

Advantages and Disadvantages of Single Board Computers

Advantages of Single Board Computers (SBCs)

• Cost-effective: SBCs are generally more affordable compared to building a custom computer
system from scratch.

• Compact size: Their small form factor makes them ideal for embedded systems and portable
applications.

• Versatility: They can be used for a wide range of applications, from IoT devices to robotics
and home automation.

• Rapid prototyping: SBCs allow for quick development and testing of embedded systems.

• Community support: Popular SBCs have large and active communities, providing resources,
tutorials, and support.

• Low power consumption: Many SBCs are designed for energy efficiency, making them
suitable for battery-powered devices.

• Integration of components: Most SBCs come with essential components like processors,
memory, and I/O interfaces, simplifying development.

Disadvantages of Single Board Computers (SBCs)

• Limited expandability: Some SBCs have restricted options for adding components or
peripherals.
• Performance limitations: Compared to desktop computers, SBCs may have lower
processing power and memory.

• Heat management: Due to their compact size, heat dissipation can be a challenge for high-
performance SBCs.

• Software compatibility: Not all software applications are optimized for SBCs, which can
limit functionality.

• Debugging challenges: Troubleshooting issues on SBCs can be more complex due to limited
resources.

• Power limitations: Some SBCs have limited power output, which may restrict the types of
peripherals that can be connected.

Features of the Pentium (80586) Microprocessor

Architecture

• Superscalar architecture: This allowed the processor to execute multiple instructions


simultaneously, boosting performance.

• Superpipelining: Enhanced instruction pipelining for increased efficiency.

• Dual integer pipelines: Two separate pipelines for integer operations, further improving
performance.

Cache Memory

• Separate instruction and data caches: Unlike previous generations, the Pentium had distinct
caches for instructions and data, reducing cache misses.

• Increased cache size: Larger caches improved performance by storing more frequently
accessed data.

Floating-Point Unit (FPU)

• On-chip FPU: The FPU was integrated into the processor, enhancing floating-point
calculations.

• Improved FPU performance: The FPU was optimized for faster calculations.

Other Features

• Branch prediction: The processor could predict the outcome of conditional branches,
reducing pipeline stalls.

• 64-bit data bus: Wider data bus for faster data transfer.

• Enhanced instruction set: New instructions were added for multimedia and other
applications.
Basic Concepts of the 80386 Paging System

1. Paging Mechanism

• Fixed-Size Pages: The 80386 uses a paging mechanism that divides virtual memory into
fixed-size pages, typically 4 KB each. This allows for efficient memory management and
swapping of pages between physical memory and disk storage.

• Page Tables: The processor maintains page tables that map virtual addresses to physical
addresses. Each entry in the page table contains information about the page, including
its physical address and access permissions.

2. Virtual Memory

• Extended Address Space: The paging system allows the 80386 to address up to 4 GB of
virtual memory, which is significantly larger than the physical memory it can support. This
enables the execution of larger applications and multitasking environments.

• Swapping: When the physical memory is full, the paging system can swap out less
frequently used pages to disk, freeing up memory for more critical tasks. This mechanism is
essential for running multiple applications simultaneously.

3. Memory Protection

• Access Control: The paging system includes features for memory protection, allowing
the operating system to set permissions for each page. This prevents unauthorized access to
certain memory areas, enhancing system stability and security.

• Segmentation and Paging: The 80386 combines segmentation and paging, allowing for a
more flexible memory management model. Segmentation divides memory into
logical segments, while paging handles the physical allocation of these segments.

4. Backward Compatibility

• Virtual 8086 Mode: The 80386 can emulate the behavior of the 8086 processor through its
Virtual 8086 mode, allowing older applications to run in a protected environment. This mode
uses paging to provide each emulated environment with its own set of resources.

Signal Functions of the 80386

a) BE0-BE3 (Bus Enable Signals)

• Function: The BE0-BE3 signals are byte enable signals used to indicate which bytes of the
data bus are valid during a data transfer. They allow the processor to specify whether the data
being transferred is a byte (8 bits) or a word (16 bits), enabling efficient data handling.

b) W/R (Read/Write Signal)

• Function: The W/R signal indicates the direction of data transfer. When the signal is low, it
signifies a write operation (data is being sent to memory or an I/O device). When high, it
indicates a read operation (data is being received from memory or an I/O device).

c) D/C (Data/Control Signal)


• Function: The D/C signal is used to differentiate between data and control operations on the
bus. When the signal is low, it indicates that the bus is carrying data, while a high signal
indicates that the bus is carrying control information.

d) ADS (Address Status Signal)

• Function: The ADS signal indicates that the address on the address bus is valid. It is used to
inform external devices that the address presented by the processor can be used for memory or
I/O operations.

e) NA (Not Acknowledge Signal)

• Function: The NA signal is used to indicate that the processor has not acknowledged a
request from an external device. This signal is essential for managing bus arbitration and
ensuring that devices are aware of the processor's state.

f) BS16 (Bus Size Signal)

• Function: The BS16 signal indicates the size of the data bus being used for the current
operation. It specifies whether the data bus is operating in 16-bit mode or 32-bit mode,
allowing for compatibility with different data sizes.

Additional Instructions in 80286

i) PUSH Imd

• Operation: Pushes an immediate value (Imd) onto the stack.

• Syntax: PUSH immediate_value

• Example: PUSH 10h ; Pushes the value 10h onto the stack

• Description: The specified immediate value is pushed onto the top of the stack. The stack
pointer (SP) is decremented by 2 bytes to point to the new top of the stack.

ii) PUSH *A

• Operation: Pushes the contents of the accumulator (A) onto the stack.

• Syntax: PUSH AX

• Description: The 16-bit value in the accumulator (AX) is pushed onto the top of the stack.
The stack pointer (SP) is decremented by 2 bytes.

iii) POP *A

• Operation: Pops the top of the stack into the accumulator (A).

• Syntax: POP AX

• Description: The value at the top of the stack is popped into the accumulator (AX). The stack
pointer (SP) is incremented by 2 bytes.

iv) IMUL lmd-oper

• Operation: Performs integer multiplication with a signed immediate value.


• Syntax: IMUL immediate_value, operand

• Example: IMUL 5, BX ; Multiplies BX by 5 and stores the result in DX:AX

• Description: The specified operand is multiplied by the immediate value. The result is a 32-
bit value stored in the DX:AX registers. DX contains the high-order 16 bits, and AX contains
the low-order 16 bits.

v) INS

• Operation: Inputs a byte or word from an input port to a string.

• Syntax: INS destination_string, DX

• Description: Reads a byte or word from the input port specified by the DX register and stores
it in the destination string. The destination string is automatically incremented after each byte
or word is transferred.

Processor Status Word (PSW) in 80286

The Processor Status Word (PSW) is a crucial component of the 80286 microprocessor that holds
the current state of the processor. It contains flags that indicate the status of the processor and
control its operation. The PSW includes:

• Condition Flags: These flags indicate the results of arithmetic and logical operations (e.g.,
Zero Flag (ZF), Sign Flag (SF), Carry Flag (CF), Overflow Flag (OF)). They are used
for decision-making in conditional instructions.

• Control Flags: These flags are used to control the operation of the processor. For example,
the Interrupt Flag (IF) determines whether the processor will respond to hardware interrupts.

• Task State: In Protected Mode, the PSW also includes information about the current
task state, which is essential for managing multitasking and switching between tasks.

Major Features of 80286 and 80386 Microprocessors

80286 Microprocessor

The 80286 represented a significant advancement over its predecessors. Its key features include:

• 16-bit architecture: Handles data in 16-bit chunks.

• Protected mode: Introduced memory management and protection features for improved
system security and efficiency.

• Virtual 86 mode: Allowed older 8086/8088 programs to run in protected mode.

• Segmentation: Divided memory into segments for better organization and protection.

• Increased addressable memory: Expanded addressable memory compared to earlier


processors.

80386 Microprocessor
The 80386 built upon the 80286, offering substantial improvements:

• 32-bit architecture: Handles data in 32-bit chunks, significantly enhancing processing power.

• Paging: Introduced paging as an additional memory management mechanism, providing more


flexibility.

• Protected mode enhancements: Improved protection mechanisms and memory management.

• Larger addressable memory: Could address a much larger physical memory space.

• On-chip cache: Integrated cache memory for faster data access.

• Instruction pipelining: Improved performance through pipelined instruction execution.

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