Scribd
Upload
10 views1 page

Outline

This document outlines a tutorial for Embedded System Design using the ZynqTM SoC, led by instructor Daniel Llamocca at Oakland University. It covers the use of Vivado Design Suite and the Software Development Kit for hardware/software co-design, including custom VHDL IP cores and various interfacing techniques. The tutorial includes a detailed outline of topics such as hardware design flow, AXI interfaces, dynamic partial reconfiguration, and using DMA and interrupts.

Uploaded by

rmderbes
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
10 views1 page

Outline

This document outlines a tutorial for Embedded System Design using the ZynqTM SoC, led by instructor Daniel Llamocca at Oakland University. It covers the use of Vivado Design Suite and the Software Development Kit for hardware/software co-design, including custom VHDL IP cores and various interfacing techniques. The tutorial includes a detailed outline of topics such as hardware design flow, AXI interfaces, dynamic partial reconfiguration, and using DMA and interrupts.

Uploaded by

rmderbes
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 1

ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT, OAKLAND UNIVERSITY

Tutorial: Embedded System Design for ZynqTM SoC RECRLAB@OU

Embedded System Design for ZynqTM SoC


INSTRUCTOR Daniel Llamocca
Reconfigurable Systems
CONTACT INFO email: [email protected]

WEBPAGE www.secs.oakland.edu/~llamocca/EmbSysZynq.html
Static Dynamic
 Louise H. Crockett, Ross A. Elliot, Martin A. Enderwitz, Robert
REFERENCES W. Stewart, “The Zynq Book Tutorials”, v.1.2, Sep. 2014. Embedded Systems

Interfacing
 Free download: http://www.zynqbook.com/
ZYBO ZynqTM-7000 Development Board Applications: DSP,
MATERIALS VivadoTM Design Suite 2016.2 – Webpack Edition automotive,
Xilinx Software Development Kit 2016.2
communications

Digital Logic Design

DESCRIPTION
 Embedded System Design with VivadoTM Design Suite software for ZynqTM System-on Chip. Software implementation with
the Software Development Kit (SDK). Hardware/software co-design: creation of custom-defined VHDL IP cores, interfacing
with the AXI bus, and creating software applications to control the VHDL IP cores.

OUTLINE OF TOPICS
 Hardware Design Flow: Design Entry, Functional Simulation, Mapping, Timing
Simulation, Implementation
Introduction to Vivado  Case example: Counter with enable controlled by a pulse generator
 I/O assignment: XDC file
 VHDL Testbench Generation and Testing
Introduction to  Using both the PL (Programmable Logic) and PS (Processing System).
Hardware/Software  Vivado: Create a block-based project. Use of AXI GPIO peripheral to control LEDs
Design  SDK: Create a software application.
 Case examples: Pixel Processor, Pipelined Divider
AXI4-Lite: Custom
 Vivado: Create IP, AXI4-Lite interface. Create block-based project.
Peripheral
 SDK: Load custom drivers. Create software application and test with UART.
 Case example: Pixel Processor, Pipelined Divider
 Vivado: Create IP, AXI4-Full interface. Create block-based project.
AXI4-Full: Custom  SDK: Load custom drivers. Create software application and test with UART.
Peripheral  Case example: DCT or Matrix multiplier (with a constant matrix)
 Vivado: Create IP, complex AXI4-Full interface. Create block-based project.
 SDK: Load custom drivers. Create software application and test with UART.
 Software drivers
Using the SD Card (in PS)
 Reading/writing binary and text files.
 Vivado Design Flow using TCL scripts.
Dynamic Partial
 Case example: LED Pattern controller
Reconfiguration (PL)
 Testing with JTAG interface.
 Vivado Design Flow using TCL script for PS+PL
Dynamic Partial
 Case examples: Pixel Processor, DCT 2D
Reconfiguration (PL+PS)
 SDK: Write partial bitstreams using the PCAP port.
 Memory to memory transfers, Memory to PL transfers.
Using DMA
 Using interrupts to signal DMA Transfer completion.
 Case example: Pixel Processor with interrupt outputs.
 Vivado: Create IP, AXI4-Full interface with interrupt. Create block-based project and
Using Interrupts
connect interrupt signals to PS.
 SDK: Create software application to enable, assert, and de-assert PL interrupts.
AXI4-Stream: Custom

Peripheral

1 Daniel Llamocca

You might also like