QMAX Sample Questions
QMAX Sample Questions
1. Ques:- A 260 meter long train crosses a 120 meter long wall in 19 seconds. What is the
speed of the train?
A. 27 km/hr
B. 49 km/hr
C. 72 km/hr
D. 92 km/hr
2. Ques:- A train of length 150 m takes 40.5 seconds to cross a tunnel of length of 300 m.
The speed of the train (in km/hr) is
A. 13.33
B. 26.67
C. 38.32
D. 40
3. Ques:- Two trains are moving in the same directions at 65 km/hr and 45 km/hr. The
faster train crosses a man in slower train in 18 seconds. The length of the faster train is
A. 100 m
B. 120 m
C. 145 m
D. 180 m
4. Ques:- A man sees a train passing over a bridge 1 km long. The length of the train is
half that of the bridge. If the train clears the bridge in 2 minutes, the speed of the train
is
A. 30 km/hr
B. 40 km/hr
C. 45 km/hr
D. 55 km/hr
5. Ques:- A train 132 m long passes a telegraph pole in 6 seconds. Find the speed of the
train
A. 70 km/hr
B. 71 km/hr
C. 72 km/hr
D. 79.2 km/hr
6. Ques:- Two trains are coming from opposite directions with speeds of 75 km/hr and
100 km/hr on two parallel tracks. At some moment the distance between them is 100
km. After T hours, distance between them is again 100 km. T is equal to
A. 1 hr
B. $$1{1} / {7}$$
C. $$1{1} / {2}$$
D. 2 hrs
7. Ques:- A train 240 m long passed a pole in 24 seconds. How long will it take to pass a
platform 650 m long?
A. 65 sec
B. 79 sec
C. 89 sec
D. 99 sec
8. Ques:- A train 300 m long crossed a platform 900 m long in 1 minutes 12 seconds.
The speed of the train (in km/hr) is
A. 40
B. 50
C. 60
D. 70
9. Ques:- If a 200 m long train crosses a platform of the same length as that of the train
in 20 seconds, then the speed of the train is
A. 50 km/hr
B. 60 km/hr
C. 70 km/hr
D. 72 km/hr
10. Ques:- A speed of 14 metres per second is the same as
A. 28 km/hr
B. 50.4 km/hr
C. 70 km/hr
D. 74.2 km/hr
11. Ques:- A train of length 150 metres takes 40.5 seconds to cross a tunnel of length 300
metres. What is the speed of the train in km/hr?
A. 13.33
B. 26.67
C. 39.16
D. 40
12. Ques:- A train travelling at a speed of 90 km/hr, crosses a pole in 10 seconds. The
length of the train is
A. 100 m
B. 150 m
C. 250 m
D. 900 m
13. Ques:- The LCM of three different numbers is 120. Which of the following cannot
be their HCF?
A. 8
B. 12
C. 24
D. 35
14. Ques:- A train 100 meters long passes a platform 100 meters long in seconds. The
speed of the train is
A. 36 km/hr
B. 52 km/hr
C. 72 km/hr
D. 92 km/hr
15. Ques:- The H.C.F of two numbers is 12 and their difference is 12. The numbers are
A. 94, 106
B. 84, 96
C. 70. 82
D. 66, 78
16. Ques:- Two trains, one from Howrah to Patna and the other from Patna to Howrah,
start simultaneously. After they meet, the trains reach their destinations after 9 hours
and 16 hours respectively. The ratio of their speeds is
A. 1 : 3
B. 2 : 3
C. 4 : 3
D. 6 : 7
17. Ques:- Find the greatest number which will divide 25, 73 and 97 so as to leave the
same remainder in each case.
A. 12
B. 18
C. 24
D. 32
18. Ques:- Three different containers contain different quantities of mixture milk and
water, whose measurements are 403 Kg, 434 Kg and 465 Kg. What biggest measure
must be there to measure all the different quantities exactly?
A. 1 Kg
B. 7 Kg
C. 14 Kg
D. 31 Kg
19. Ques:- 21 mango trees, 42 apple trees and 56 orange trees have to be planted in rows
such that each row contains the same number of tress of one variety only. Minimum
number of rows in which the trees may be planted is
A. 2
B. 5
C. 12
D. 17
20. Ques:- If the HCF of two numbers is 2 and their LCM is 70, then the numbers are
A. 2, 35
B. 4, 70
C. 6, 70
D. 14, 10
21. Ques:- The HCF and LCM of two numbers are 18 and 3780 respectively. If one of
them is 540, then the second one is
A. 112
B. 118
C. 126
D. 142
22. Ques:- A merchant has 140 litres, 260 litres, 320 litres of three kinds of oil. He wants
to sell the oil by filling the three kinds separately in tins of equal volume. The volume of
such a tin will be
A. 13 litres
B. 16 litres
C. 20 litres
D. 70 litres
23. Ques:- The L.C.M. of 3, 2.7 and 0.09 is
A. 0.27
B. 0.027
C. 27
D. 2.7
24. Ques:- The H.C.F. and L.C.M. of two numbers are 12 and 336 respectively. If one of
the numbers is 84, the other is
A. 24
B. 36
C. 48
D. 72
25. Ques:- A train 270 meters long is moving at a speed of 25 km/hr. It will cross a man
coming from the opposite direction at a speed of 2 km per hour is
A. 24 seconds
B. 28 seconds
C. 32 seconds
D. 36 seconds
26. Ques:- A train running at the speed of 60 km/hr crosses a pole in 9 seconds. What is
the length of the train?
A. 120 metres
B. 150 metres
C. 180 metres
D. 200 metres
27. Ques:- A train takes 9 sec to cross a pole. If the speed of the train is 48 kmph, then
length of the train is
A. 80 m
B. 90 m
C. 120 m
D. 150 m
28. Ques:- Two trains 240 metres and 270 metres in length are running towards each
other on parallel lines, one at the rate of 60 kmph and another at 48 kmph. How much
time will they take to cross each other?
A. 14 sec.
B. 15 sec.
C. 16 sec.
D. 17 sec.
29. Ques:- The time taken by a train 180 m long, travelling at 42 kmph, in pasing a
person walking in the same direction at 6 kmph, will be
A. 16 sec
B. 18 sec
C. 21 sec
D. 24 sec
30. Ques:- January 1, 1992 was Wednesday. What day of the week was January 1,
1993?
A. Monday
B. Tuesday
C. Thursday
D. Friday
It is a code that is called before the execution of the main function. It creates a platform for an
application to run. It is called an assembly language.
It is a variable that is non-negative and can be shared between threads. It solves the critical
selection problem and achieves synchronization in the processes.
ISR means Interrupt Service Routines. It is used when an interruption occurs. These
procedures are stored at a memory location in the software.
When a compiler changes its behavior unexpectedly after optimization, a volatile keyword is
used.
It is reliable
It is inexpensive and small in size
Hardware
Software
Operating system
Processor
Memory
Timers counters
Communication ports
Output
Input
It is the time taken by ISR to respond to an interruption. Less latency means a faster response
to the interrupting event.
When a program instruction tries to access the prohibited memory address, a segmentation
fault occurs. It sometimes leads to crashes in the programs.
Yes. Const keyword is used when a variable’s value should not change. But interrupts can
still change the value.
When a function can be interrupted during execution and can be called again safely, it is a
reentrant function. The function resumes from the same point where it was left.
Countdown to zero loop is better than count up loops. This ensures the optimization of
comparison to zero during loop termination.
It is a part of the hardware that detects malfunctioning or anomalies in the software of the
computer. It prevents the system from dangerous situations by detecting the faults in advance.
++i is faster because it uses single machine instruction, but i+1 requires loading.
Troubleshooting
No, it cannot be used in ISR because printf() is a non-reentrant and thread-safe function.
This is not possible because ISR does not allow anything to pass or return from it.
It happens because
The signal synchronization with the CPU depends on the hardware of the processor. It can
take up to 3 CPU cycles for a signal to reach the processor.
After the execution of an instruction, it takes some extra CPU cycles to refill the pipeline
again with the instructions. This leads to latency.
26. How can you reduce interrupt latency?
27. How can you avoid a character pointer from pointing to a different address?
Since constant protects a pointer from modifications, The pointer should be defined as a
constant character pointer.
When the developers create objects or use the memory to help memory and then forget to free
it before completing the program, a memory leak occurs. This leads to reduced memory
availability and often crashes of the application.
A Memory leak can be avoided by freeing the objects or pointers when no longer in use.
Automotive Embedded System is a computer system designed for electronic devices that
controls the mechanism of data and devices.
Embedded C is a part of the C programming language. It develops applications that are based
on microcontrollers like Cameras, WiFi, etc.
1. Unit testing
2. Integration testing
3. System testing
37. What are the different types of Buses used by Embedded Systems?
Memory Bus
De-multiplexed Bus
It contains 2 wires in the same bus. One has the address, and the other contains the data.
Input/Output Bus
It multiplexes the same input and output signals by using multiplexing techniques.
Sole Functioning
Constraints
Real-Time
The embedded systems react to the system’s environment changes And bring quick results.
Memory
Since the software is embedded in ROM, it has a memory and does not need any other
secondary memory in the computer.
Processor
In most cases, embedded systems use basic embedded system software like C, C++, ADA,
etc. The Specialized systems use operating systems such as Windows CE, LINUX, TreadX,
Nucleus RTOS, OSE, etc.
Text editor
Compiler
Assembler
Debugger
Linker
Emulator
CIRCUIT DESIGN
Q.1What are MOFETs?
MOFETs are voltage controlled devices with high input impedance.
Q.2What is the main advantage of precision rectifiers over conventional rectifiers?
In conventional rectifiers the input voltage should go above the cut-off voltage of the diode
before rectification takes place but all voltages can be rectified in precision.
Q.3Why are EPROM/ROM/PROM called a programmable logic device?
EPROM/ROM/PROM are called a programmable logic device because we can implement
Boolean expressions by storing its truth table in the ROM.
Q.4What is the main difference between PLA and PAL logic?
Flexibility is available before AND as well OR in the case of PLA while it is available only
before AND in the case of PAL
Q.5What is the main advantage in a JK flip-flop over an SR flip-flop?
When both inputs of each flip-flop are '1', in the case of SR, the out put is a forbidden case
but this has been modified to a toggle case in the JK flip-flop
Q.6What is the main factor which makes a MOSFET likely to break-down during
normal handling?
The main factor which makes a MOSFET likely to break-down during normal handling is its
very low gate capacitance and high input resistance.
Q.7What is the main reason why electrons can tunnel through a P-N junction?
The main reason why electrons can tunnel through a P-N junction is that depletion layer is
very thin.
Q.8Why is a clock added to the SR flip-flop to convert it into a clocked SR flip-flop?
The flip-flop operation can be synchronised to a high level of the clock.
Q.9Explain diode?
A diode is a gadget that has two incurable states. Most diodes are chosen for their
unidirectional present quality, as they have two living electrodes between which the gesture
of attention can flow.
Q.10Define sampling.
Sampling is the process of acquiring a sample location from a permanent purpose of time x
(t).
Q.11What is the microwave's working principle?
Microwave is a term that refers to an extremely tiny wave. Microwave incidence spectrums
are commonly assumed to extend from 1GHz to 30GHz. The main reason we need to employ
microwave frequency for communication is that the lower incidence band is overcrowded,
and the need for point-to-point communication continues to grow. Microwave broadcasting
takes place in space wave in v.
Q.12What do you mean by passband?
The passband refers to the range of frequencies or wavelengths that can pass through a filter
without attenuation.
Q.13Define Power Rating.
When V f is the onward biassed voltage and I f is the limiting forward current, the power
rating of a diode is defined as the maximum value of power that may be degenerate without
failure. Pd= V f x I f
Q.14Explain demodulation.
Demodulation is the process of removing the intonation from an analogue signal in order to
recover the unique baseband signal. Because the handset system receives a modulated signal
with specific parameters and must twist it to base-band, demodulation is required.
Q.15What do you mean by the resistor?
A resistor is a two-terminal electrical component that opposes an electric current by causing a
voltage drop between its terminals equal to the current, in accordance with Ohm's law: IR =
V.
Q.16Explain the term inductor.
An inductor is a passive electrical device that works in electrical circuits because of its
inductance properties. An inductor can come in a variety of shapes and sizes.
Q.17What is modulation techniques?
For Analog modulation--AM, FM, PM, SSB and SM Digital modulation--OOK, PPM, FSK,
ASK, CPM, Psk, QAM, MSK, TCM, OFDM
Q.18Explain what is RF?
Radiofrequency refers to oscillation regularity or speed in the range of 3 Hz to 300 GHz. This
frequency range relates to the occurrence of irregular current electrical signals, which are
utilised to generate and detect radio waves. Because most of this variation exceeds the
shaking rate that most mechanical systems can withstand, RF is usually used to refer to
electrical circuit oscillations.
Q.19What are the applications of AM and FM?
AM is used for video indications, for example, TV. Ranges from 535 to 1705 kHz. FM is
utilized for audio signals, for example Radio. Ranges from 88 to 108 MHz
Q.20What exactly do you mean when you say 'base station'?
The base station is a radio receiver that serves as the hub of a local wireless network and can
also act as a gateway between a wired and wireless network.
Q.21Define repeater.
A repeater is an electrical gadget that receives a signal and retransmits it at a higher level or
on the other side of an obstacle so that the signal can wrap around larger distances without
becoming distorted.
Q.22What do you mean by Amplifier?
A functional signal's power, voltage, or presence is increased using an electronic gadget.
Q.23Define Oscillator
An oscillator is a track that converts a shortest current input into a signal form output. Vocal
and relaxation oscillators are the two most common forms of oscillator. The waveforms of
harmonic oscillators are horizontally curved, whereas waveforms of repose oscillators are
jagged.
Q.24What is crosstalk?
Signals in close conductors generate crosstalk, which is a type of interference. The most
common example is overhearing a phone conversation. Crosstalk can also occur in radios,
televisions, networking equipment, and other electronic devices.
Q.25Define Bluetooth.
Bluetooth is designed to be a character area network (CAN) for mobile devices that need to
communicate with each other on a regular basis. It is omnidirectional, as opposed to infrared,
which has a row of sight limitations. Bluetooth uses the 2.4 GHz frequency band and has a
range of 10 metres. It can transfer data at a rate of roughly 720 Kbps.
Q.26Explain the main division of power system.
The main divisions are: Transmission system Generating system Distribution system
Q.27What is the concept of frequency re-use?
Each cell has its own transceiver, and the entire physical region is divided into hexagonal
shape geometrical areas called cells. Each BTS possessed a unique band of incidence or
channel. Each BTS aerial is designed to cover the cell region in which it is installed with the
appropriate incidence without interfering with another sale signal.
Q.28Define semiconductor.
A semiconductor is a hard substance with electrical conductivity that falls somewhere
between that of a conductor and that of an insulator, and it can vary in that range either
permanently or dynamically.
Q.29What are active and passive components?
Active components, such as diodes, transistors, and thyristors, are electrical components that
require an external source to complete their processes. Unreceptive components are ones that
do not require the use of an external source to function. Resistor, capacitor, and inductor are
examples of passive components.
Q.30Define SCR
A silicon controlled rectifier is a unidirectional semiconductor machine with three terminals:
anode, cathode, and gate, unlike a diode. The entrance input can be used to turn on and off
the SCR.
Q.31What is a Capacitor?
A capacitor is a two-terminal electrical component that holds charge as potential energy.
Capacitance is the attribute or ability of a capacitor to store charge, and it is measured in
Farad. The equation q = CV can be used to calculate the stored charge q.
Q.32Define Inductor.
An inductor is an electronic component that inhibits the flow of electrical current through it.
When current passes through it, it stores energy in the form of a magnetic field. V = L (di/dt)
can be used to compute the voltage drop across an inductor.
Q.33Explain what is Practical & Ideal Voltage Source?
A practical voltage source is a voltage source with some internal resistance. There is a
voltage loss as a result of this resistance. With an increase in current, the supply voltage of
the practical voltage source drops. When a voltage source's internal resistance reaches zero, it
is considered to be an ideal voltage source. And as the current increases, the voltage does not
decrease.
Q.34What is Norton theorem?
In a linear circuit, any combination of batteries and resistances is comparable to and may be
represented by an ideal current source and a parallel resistor.
Q.35What is Thevenin theorem?
A signal voltage source and a resistor in series can represent any combination of batteries and
resistance in a linear circuit.
Q.36Define Transistor.
A transistor is a semiconductor device with three terminals. It can be used to switch or
magnify an electrical signal.
Q.37What is the function of the transistor as a switch?
A transistor's three useful operating zones are the saturation region, cutoff region, and active
region. The transistor functions as an amplifier in the active region. The transistor works as a
closed switch in the saturation region. The transistor operates as an open switch in the cutoff
zone. As a result, in order to use a transistor as a switch, it must be operated in the saturation
and cutoff regions.
Q.38What is meant by Clipper and Clamper?
A clipper is a circuit that cuts off voltage when it exceeds or falls below a given threshold.
The positive clipper removes a portion of the signal's positive half, whereas the negative
clipper removes the negative half. A clamper is a circuit that adds voltage to a specified peak
voltage from the signal's positive or negative side. To obtain the set peak voltage, a clamper
moves the entire signal up and down.
Q.39Define SCR.
The silicon controlled rectifier, also known as a thyristor, is a unidirectional semiconductor
device with three terminals: anode, cathode, and gate. The gate input can be used to turn on
and off the SCR.
Q.40What exactly is a diode?
A diode is a semiconductor device that has two terminals: anode and cathode. The forward
bias of a diode allows current to flow in just one direction.
Q.41What is the difference between a Silicon and a Germanium Diode, and why is the
former preferred?
A silicon diode has a voltage drop of 0.7v, while a germanium diode has a voltage drop of
0.3v. Silicon crystals are more heat resistant than germanium crystals. The voltage rating of a
silicon diode is higher than that of a germanium diode. Silicon diodes are preferred over
germanium diodes because silicon is more abundant.
Q.42What is the main difference between BJT and FET?
Bipolar junction transistor is abbreviated as BJT, and Field Effect Transistor is abbreviated as
FET. BJTs are bipolar, meaning they have a flow of both minority and majority charge
carriers, whereas FETs are unipolar, meaning they only have a flow of majority charge
carriers. The input current (base current) is used to operate BJTs, whereas the input voltage is
used to control FETs (Gate voltage). FETs have a substantially higher input impedance than
BJTs. Emitter, base, and collector are the three terminals of a BJT, whereas drain, gate, and
source are the three terminals of a FET.
Q.43Define Transformer.
A transformer is a static electrical device that employs electromagnetic induction to transmit
electrical energy from one circuit to another without using any physical connections. The
input voltage and current are increased or decreased using a transformer.
Q.44Explain Oscillator.
An oscillator is an electrical circuit that converts a DC source into a periodic AC signal.
There is no input to an oscillator. The oscillator's output can be sinusoidal, square, or
triangular wave.
Q.45What is Baseband Signal?
A baseband signal is a signal that has a much lower frequency (up to 10 kHz). Voice (300Hz
to 3.5 kHz), audio (20 Hz to 20 kHz), and video signals are examples of baseband signals
(0Hz to 4.5 MHz). The baseband signal can't be sent through the antenna directly. Copper
cable or fibre optics, for example, are used to transmit them.
Q.46What is the difference between a Bandpass and a Passband Signal?
The term "Passband" or "BandPass" refers to a transmission with much higher frequencies
(more than 100 kHz). There are no frequencies lower than 100 kHz in a bandpass signal. The
bandpass signal can be transmitted directly through the antenna.
Q.47Define Modulation.
Modulation is the process by which one of the carrier signal's distinctive parameters
(amplitude, frequency, or phase) changes linearly with respect to the message signal's
amplitude.
Q.48Why do we need Modulation?
Modulation is the process of converting a baseband signal into a passband signal that can be
used for long-distance communication via an antenna. Since the size of the antenna is
determined by the frequency of the transmitting signal, modulation allows us to employ a
small antenna. We can assign various frequencies to separate signals via modulation,
allowing us to convey several messages over the same media without interfering with each
other.
Q.49Define Demodulation.
The process of retrieving information or a message signal from a received or modulated
signal is known as demodulation.
Q.50What are the types of Modulation?
Analog and digital modulation are the two primary types of modulation.
Q.51What is the difference between Analog and Digital signal
Digital signals have discrete time and discrete amplitude, whereas analogue signals have
continuous time and continuous amplitude.
Q.52Define Sampling.
A procedure of transforming a continuous time signal into a discrete time signal, but not a
digital signal, is known as sampling.
Q.53What is the Nyquist Criteria for Sampling?
If the analogue signal's maximum frequency is fmax, the Nyquist requirements suggest that
the sampling rate for this signal should be 2fmax or higher.
Q.54Explain Aliasing.
Aliasing is a sampling-related signal phenomenon. When a signal is sampled at a rate lower
than the needed rate, it becomes indistinguishable from other signals, and when the signal is
reconstructed, it does not resemble the original signal. Aliasing is the term for this
phenomena.
Q.55What is a Filter?
A filter is an electrical circuit that removes frequency components from a signal that are
specific or undesired.
Q.56What is the Cutoff Frequency?
The cutoff frequency is the frequency response of a filter where the pass band and stop band
meet. Depending on the type of filter, frequency components below or above the cutoff
frequency are rejected or passed.
Q.57Define Notch filter.
The notch filter is a band stop filter that has a very small stop band.
Q.58Explain Logic Gate.
The Boolean function is implemented by a digital logic gate, which is an electronic device. A
logical operation is performed on one or more binary numbers using the boolean function.
PCB Design Interview Questions
Q1. Flow of Complete PCB design.
Ans:
Library creation
Board outline and mechanicals
Importing netlist
Design Rule settings
Component Placement
Rounting
Split plans
Silkscreen and Assembly settings
Gerber Settings
Ans:
We need schematic,bom and netlist(some pcb engineer generates netlist) from Hardware side
and Board mechanicals from client i.e, board outline,mounting holes etc.
and another important thing that we need is PCB stackup it is based on complexity of the
board for example if we are using fpga first we should know number of signal layers need for
fpga signal breakout.
Padstack creation
pin placement
assembly outline
silkscreen outline
Place bound top (we can mention height of the here)
dfa bound top
no probe top
silk and assembly reference designator
These are the basic things we need to create a footprint,follow IPC standards for proper
guidelines.
Ans: Draw board outline by considering client requirements,place mechanical hols and
global fiducials.create route keepin and place keepin areas,
size of the mechanical holes that you have used in your design and clearances that you have
given to these.
what are fiducials and use of these fiducials and types and differences between them.
Fiducial placement and clearances.
What are the clearances you have given from board outline to route and place keepin.
Q5. what are the errors you got while importing netlist?
Ans:
Ans: Design rules are nothing but creating tracewidth, spacing, vias limitations. Generally we
get trace width and spacing details from stackup.
Q7. How do place components?
Ans: Place major components first i.e connectors, BGAs, mejor ICs then place other sections.
First check weather i.e right angle or straight.If it is right angle place at edge of the board and
consider if there any recommendations from client.
Q8. How do you plan routing and what are the parameters you consider while routing?
Ans: Placement routing plays major roles in pcb design, quality of the board depends on
placement and routing, good placement and routing can reduce your board fabrication cost
also.
Place components by considering routing strategy and follow schematic flow once your
placement is done do fanout for all the components, route high speed interfaces and complex
areas first and maintain ground reference plane for all high speed signals and make sure that
every trace has reference plane and try to reduce vias on signals vias can change trace
characteristic impedance.
Ans: Cadence Allegro: We have extensive experience with the Cadence Allegro tool suite;
we currently support versions 15 and 16. We are proud to be one of a handful of Early
Adopter Program Members with Cadence.
Q9. Mentor Graphics Expedition, Power PCB (PADS) and Board Station:
Ans: We currently support WG2004, EXP 2005.1, EXP 2005.3, EXP 2007 versions of
Expedition, versions 2005sp1, 2005sp2 and 2009 of PADS and Board Station versions
EN2002, EN2004, BSTN2005, BSTN2006, and BSXE2006. PADS 2007 is currently under
evaluation for future support, please contact us for more information.
Valor Enterprise 3000: This is a cornerstone process tool for Freedom CAD to assure
manufacturability and minimal delays in the fabrication process. We are a Valor Certified
Design Partner.
Custom Programs: Over the past 10 years we have developed custom programs and scripts
to gain efficiencies, improve quality and augment the current design tools.
Ans: There are many methods. A formula method gives a quick result, though it is not highly
accurate. A 2D Field solver gives more accurate result. The Trace impedance depends upon
the width of the trace, separation from the ground / power plane, and the relative permittivity
of the material.
Ans: Blind vias are use to connect an inner layer to either the top or bottom layer. A buried
via is used for connecting two inner layers. It does not go either to the top or the bottom
layer. A regular via ( different from the blind and the buried via connects the top and the
bottom layer and also passes through the inner layers.
Do not stop here. Go ahead and draw the diagram of the blind and the buried via.
Ans: A decoupling capacitor is used to smoothen the power supply noise. It should be placed
as close to the ICs for which it is intended as possible.
Q13. What is DRC? What Kind of DRC errors you find in PCB Design?
Ans: DRC stands for Design Rule checking. A PCB should not have any electrical failure
before we tape out for the manufacturing. Common DRC errors include, trace to pad
violation, pad to pad violation, component keep out violation. Additionally a PCB Design
may have high speed design rule related constraints. This may include, length matching
constraints, differential signal length matching constraint.
Q14. What are the things you should do you ensure design for compliance for EMI?
Ans: We should use common mode chokes for all cables connectors. The common mode
chokes should be placed as close to the connector as possible. The Power and ground planes
should be as close to each other as possible. The High speed signal should refer to a ground
or power plane and should not cross a split plane. Stitching capacitor should be used in case
split plane is used.
Q15. A large thermal pad is divided into four sections? What is the use of it?
Ans: The open area between the 4 sections lead to escape of the gases during the reflow and
soldering process. It leads to better manufacturability.
Q16. The width of a trace is increased ? Will its characteristic impedance increase of
decrease ?
Ans: The Capacitance per unit length of the trace increases and therefore, the characteristic
impedance of the trace decreases.
Q17. Robert, what are the most significant problems that you are seeing in PCB designs these
days?
Ans: It's dependent on the design - whether it's high speed/low speed, high edge rate/lower
edge rate, a simple PCB or large backplane design. However, some of the glaring problems
are transmission line reflection due to the capacitive load; ground bounce; crosstalk between
violent aggressors (like CMOS) and sensitive victims (like ECL/PECL and analog);
bypassing and power delivery; common mode differential pair problems; and high speed
clock loading.
Q18. How fast are the fastest boards you are seeing? How complex in terms of components
and pins?
Ans: Several students in my classes are designing backplanes, servers and blades that have
clock frequencies up to 11GHz. I consulted for a company that built a backplane with 65
BGAs having over 600 balls each, 34 layers and over 58K solder joints. The fastest digital
board (not microwave) was an aerospace design running at 43 GHz. Regarding components,
there is a BGA graphics processor with a clock speed of 5.6 GHz that has over 3400 balls.
How would you like to reflow solder that one?
Q19. Day 1 of your seminar covers transmission lines. What are the most important points
you'll be making?
Ans: The most significant thing would be defining the cutoff conditions to determine when a
land trace acts like a transmission line versus a lumped circuit. This will determine to a large
degree the termination scheme that will be used to minimize reflection. It is also important to
define skin effect, dielectric loss and proximity effect. The interesting point about proximity
effect is that if the spaces are just a fraction of the land width (like 5 to 1) this will create
more signal loss than skin effect, dielectric and surface roughness combined.
Another subject is signal delay for microstrip and stripline. With microstrip, the delay is not
the same for bare, solder mask covering and conformal covering (encapsulation over the
solder mask). I'll also talk about providing the analysis for characteristic impedance and delay
expressions for microstrips, buried microstrips, striplines and differentials.
Q20. What design techniques are needed to keep signal integrity under control?
Ans: Excellent communication between the EE design engineer, the PCB design engineer,
the test engineer and manufacturing engineer is critical. Also, close coordination with the
bareboard vendor and the EMS supplier is essential. The inputs from all of these will
influence the best design techniques for achieving signal integrity. It is very important to
conduct digital simulation (as with Cadence Allegro SI) and EMI/EMC simulation. The more
up front the potential problem identification, the less debug time, the fewer problems during
compliance testing, and the quicker the time to market.
Q21. What crosstalk problems are you seeing in high-speed designs (Day 2)?
Ans: High density board layout is very challenging. I have seen designs where 2s and 2s [2
mil-in wide land traces and spacing] are being used due to density/packaging restrictions.
Interference between CMOS/TTL high edge rates and ECL/PECL is another problem. Yet
another major concern is sensitive analog circuits in close proximity to the fast edge rate
digital signals. This is where guard traces around the analog traces become effective.
Ans: To control crosstalk there has to be a distance between the aggressor and the victim
versus the distance to the reference ground plane or power plane. Therefore, the tradeoff in
many cases is how do I minimize my stackup layers (which is a cost consideration) versus
controlling the crosstalk, and also the characteristic impedance, which is also a correlation
between trace width and distance to the reference plane (or planes as in striplines).
As each new design is released there is typically a higher clock rate with higher edge rates,
more signals per IC package, and a need for higher density that exacerbates crosstalk. In my
estimation this will be one of the major challenges for the design community, as competition
and cost considerations will highly influence the layer stacking.
Q23. What do designers need to do to ensure adequate power delivery within a specified
power envelope (Day 3)?
Ans: In one word it's inductance. Designers need to identify how much inductance is
inherent in the mounted capacitor loop and the ESL [equivalent series inductance] of the
capacitor. The characteristics of the power and ground planes are also critical. Today cores
are being produced with less than 1 mil-in of dielectric thickness. If these are used, they will
enhance the power delivery, but at what cost?
Designers must know the bypassing capability of their output drivers. The only way to
overcome SSO [simultaneous switching output] is at the die level. So designers need to
provide the proper dq/dt at the needed IC pin at the right time.
Therefore, one must know the maximum level of power delivery noise allowed in the overall
noise budget. With that knowledge the best strategy is to provide the correct IC die
capacitance, inner plane capacitance, discrete capacitance and capacitor types (such as X2Y,
Y cap, reverse electrode) to achieve this goal. Another factor, especially as frequency
increases, is the anti/parallel resonance considerations that may require breaking up the
capacitors into banks with different ESRs [equivalent series resistances] and different loop
inductances.
Q24. What "best practices" do you advocate for differential signaling and clock distribution
(Day 4)?
Ans: Probably the main concern is differential unbalance caused by the two lines not being
the same electrical length. This causes common mode and is the main reason differentials
can fail EMI radiation. Another consideration is to assign the more sensitive pairs as
striplines. Avoid broadside layouts, that is, make them be edge to edge. Broadside layouts in
many cases can render the design inoperable due to returning currents being contained on
different ground planes, or possibly power planes, which can cause the receiver to see a
totally different noise spectrum on its inputs.
Q25. When does EMI become a concern in PCB design, and what do designers need to know
(Day 5)?
Ans: The two big concerns are radiated emissions and ESD [electro-static discharge]. All
radiated emission formulas have both edge rate and frequency as two of the parameters.
Therefore, many of the signal integrity rules also apply to EMI. The main cause of radiation
from circuit boards is the size of the antenna loop -- that is, the pathway the current takes to
the load and the direction/pathway that it takes to return to the VRM module. The more area
this entails, the more radiation.
The designer must know the ESD pulse edge rate, which in turn will define the protection
device (TVSS) or the filter. Another concern today is the ever increasing frequency, higher
clock rates, and power dissipation in the design. Designs are becoming denser with more
power dissipation. Due to the higher clock rates the apertures are decreasing in size to
minimize harmonic radiation, meaning that the wavelengths are becoming shorter. However,
with smaller apertures the design is much less efficient in allowing heat to escape the
enclosure. This is one of the major concerns in EMI mechanical compatibility design.
Q26. What will each day of the seminar cover, and how will Cadence tools be demonstrated?
Ans: Each day at the conclusion of the training session, Cadence engineers will demonstrate
examples of the lecture material. This will provide the student with real world examples of
the methods used to design correctly. The following provides an itinerary of the courses.
CROSSTALK (Day 2): Stack-up optimization and forward/reverse crosstalk. Cadence Demo:
Pre- and post-route crosstalk analysis as well as crosstalk estimation.
POWER DELIVERY (Day 3): Proper use of decoupling capacitors and identifying power
plane resonance. Cadence Demo: Allegro PCB Power Delivery Network (PDN) analysis
DIFFERENTIAL SIGNALING (Day 4): Loosely vs. tightly coupled differential pairs; clock
distribution. Cadence Demo: Tandem and broad-side differential pair routing and analysis.
EMI/EMC (Day 5): Source, path, and receptor as well as how EMI/EMC tests are conducted.
Cadence Demo: EM control rule checking and EMI net analysis.
Q27. What's your most important advice for clients working with high-speed digital boards?
Ans: One could write a book on this, but to briefly state the advice: know the rules of high
speed design, work as a team in the prototype design, simulate the design, and work closely
with the bare board vendor.
Printed circuit board (PCB) design brings your electronic circuits to life in the physical form.
Using layout software, the PCB design process combines component placement and routing
to define electrical connectivity on a manufactured circuit board.
A printed circuit board (PCB) is a thin board made from fiberglass, composite epoxy, or other
laminate materials. PCBs are found in various electrical and electronic components such as
beepers, radios, radars, computer systems, etc. Different types of PCBs are used based on the
applications.
A printed circuit board (PCB) mechanically supports and electrically connects electrical or
electronic components using conductive tracks, pads and other features etched from one or
more sheet layers of copper laminated onto and/or between sheet layers of a non-conductive
substrate.
Printed circuit boards (PCBs) are usually a flat laminated composite made from non-
conductive substrate materials with layers of copper circuitry buried internally or on the
external surfaces. They can be as simple as one or two layers of copper, or in high density
applications they can have fifty layers or more.
The most common element used to make traces is copper. Why is copper such a popular
choice in the PCB industry? The number one benefit of copper is that it is highly conductive.
This means that it can easily transmit signals without losing electricity along the way.
Analyze signal return paths to minimize noise, EMI, and parasitic impedances
Avoid 90° angles on traces which creates discontinuities that disrupt high-speed signals
Add shielding (e.g ground planes) between noisy and sensitive circuitry
Proper trace routingminimizes noise, interference, and timing issues in complex PCBs,
enabling reliable performance from integrated circuits even at fast clock rates. I would also
run signal integrity simulations of proposed PCB stackups using software like HyperLynx to
validate trace routing before manufacturing prototypes.
2. How do you manage heat dissipation and thermal issues in PCB design?
Add thermal vias/pads under hot components to conduct heat into ground planes
Incorporate exposed copper planes on outer board layers to spread and dissipate heat
Simulate airflow across board with CFD software and refine enclosure/cooling approach
3. How would you test a new PCB design before manufacturing a full production run?
To fully validate a new PCB design before high-volume manufacturing, I would build and
test prototypes in stages:
Stage 1:
Perform design rule checks and use CAM files for initial prototyping using PCB milling
Stage 2:
Stage 3:
Run boards for extended soak testing under environmental stress conditions
Prototyping catches design errors early, while pilot runs validate manufacturing and assembly
processes. This staged testing lowers risks prior to large-scale PCB fabrication for new
products. I work closely with techs and engineers during each test phase and enter issues into
bug tracking tools to enable rapid design modifications.
4. How do you ensure manufacturability and DFM (design for manufacturing) in your PCB
layouts?
Adding fiducials for precise alignment during PCB assembly -Using minimum pad sizes for
best soldering results and eliminating thermal relief that reduces pad size
Defining route paths between pins that allow for chemical etching
Specifying panel sizes that maximize board quantity per panel production run
I also communicate frequently with our fabrication partners, sending regular design updates
and discussing any potential manufacturability issues I foresee in layouts. This design-for-
manufacturing (DFM) approach prevents delays and unnecessary costs in Readying designs
for volume production.
5. What are some best practices for spacing PCB components and traces?
Some key PCB component and trace spacing best practices include:
Place 0402 size passives 0.1mm apart, while larger components need 0.2mm spacing
Ensure adequate clearance between traces and edges/holes to account for fabrication
tolerance
Use wider gaps (up to 25x dielectric) for very high voltage traces (>100V)
6. How would you perform signal integrity analysis on a new PCB layout?
Identify critical timing paths and interfaces (e.g SPI, USB) on schematics along with
their characteristic impedances
Select PCB stackup using impedance calculators to match transmission line properties
Route traces for those nets with controlled widths/spacings to achieve impedance targets
Simulate signal waveforms with real world effects like cross-talk to identify
reflections/ringing
Measure eye diagrams and signal quality on working prototypes using oscilloscope and
probing
This workflow validates all signals will have intersymbol interference below permitted
thresholds despite noise from high-speed routing complexities. I pay special attention to
clock distribution networks which are sensitive to reflections. Signal integrity is key for
avoiding errors and timing problems in precision circuit boards.
7. What are some suitable PCB substrate/laminate materials for RF circuits designs?
Good PCB substrate materials for RF designs have consistent dielectric properties, low loss
tangents, and use high resistivity laminates:
PTFE composites like Rogers RO4000 series have stable dielectric constants and low loss
Ceramic filled PTFE boards provide thermal stability for precision RF circuits
High frequency/speed FR4 improved for RF performance
Halogen-free laminates like Isola Astra MT77 meet strict environmental requirements
Glass reinforced hydrocarbons offer high flexural strength for rigid-flex RF constructions
8. How would you verify manufacturability constraints are met during PCB layout at
companies like ours with 6 mil line/space capabilities?
To confirm my PCB layouts meet or exceed the fabrication constraints at our company such
as 6 mil line/space, drill sizes and other tolerances, I would:
Maintain design rules file specified by the manufacturer inside layout software that enforces
their design constraints
Have our CAM team generate gerber files from my board layouts
Submit gerbers directly to manufacturer for design rule check through their portal to validate
no violations
Work with fabrication partners on DFM reviews early during layout and modify boards based
on their feedback
Procure test coupons with representative line/space traces for quality assurance
Visually inspect PCBs under microscope once received to check line widths across layers
This comprehensive strategy ensures manufacturability is built into the design from the start
and any capability issues get identified prior to running my layouts through production. I also
stay current on process improvement roadmaps from partners to maximize exploitation of
latest line resolution and via structure capabilities.
9. What advantages does using through hole vias offer compared to other interconnect
options in multilayer PCBs?
Using plated through hole (PTH) vias instead of other via structures offers several advantages
for multilayer PCB interconnect:
Reliability
Proven robust connections between layers with complete plating coverage inside holes
Does not require filling thus avoids voids which improves thermal transfer
Process Compatibility
Works with nearly all board fabrication processes (subtractive, semi-additive, etc)
Layout Flexibility
Can connect any layer at angles not feasible with staggered/skip vias
Simplifies routing since traces can jog vertically between signal layers
Cost Savings
Reduce lamination costs when thicker dielectrics not required for other via approaches
For these reasons, many high reliability or cost-optimized PCB designs still leverage PTH
vias for optimal connectivity despite continuing advances in blind/buried via fabrication
capabilities.
10. How would you design impedance matched traces to interface with a 25 Gbps NRZ
serializer IC in a complex PCB stackup?
Define matched trace design rules (e.g. 6 mil width / 11 mil spacing to layer 2 refernce)
Ensure traces have >= 50 mil separation from other nets to minimize interference impact
Model transmission lines in HyperLynx and simulate with IBIS models to verify impedance
tolerance across insertion loss peak
Implement matched length tuning using meandered geometry if simulations show significant
impedance deviations
Focus on symmetrical routing of the differential pair to provide consistent propagation delay
Close collaboration with signal integrity engineers at each step validates simulations match
measured results from working prototypes. Impedance control is critical to allow multi-
gigabit serializer ICs to perform reliably.
11. How can you prevent field failures related to electromagnetic interference (EMI) in
complex PCBs?
Place potential noise sources (processors, crystals, inductors etc) distant from
sensitive analog inputs
Design cutouts in planes that form filters blocking emission around critical traces
By dedicating sufficient layout real estate for isolation and control of radiated/conducted
interference, I can prevent external noise disrupting inner layer signals in densely packed
PCBs operating in noisy environments. Proper EMI management is mandatory for devices
like medical equipment with life-critical functions.
12. How do you ensure SPICE circuit simulations correlate accurately to measured data from
physical PCB prototype builds?
To accurately correlate PCB simulations to measured data, I work methodically through the
following areas to build confidence that simulated behavior mimicks real world performance
within acceptable tolerances:
Model Accuracy
Verify component models used match manufacturer spice/IBIS models for each device’s
package/pins/parasitics
Define boards power architecture from schematics and validate rail sequencing/voltage
thresholds
Test Correlation
Ensure proper test conditions set in spice align to physical hardware test setup
Correlate results from simulations ‘best case‘ ‘worst case‘ and ‘nominal voltage‘ conditions
Parametric Sweeping
Run monte carlo simulations sweeping values of critical passives, trace impedances etc
through realistic tolerance ranges
Design Iterations
Through careful, iterative verification of simulation settings and assumptions against real
hardware, I can reliably use simulations to predict performance issues and hunt down root
causes when prototypes exhibit issues not observed in initial desktop analyses.
13. How would you measure timing delays between key signals during prototype bring-up to
validate schematic specifications?
My approach to validate PCB signal timing against schematic requirements would be:
Identify critical paths like clock distribution, chip selects, resets with timing budgets defined
Probe waveforms using >1 GHz bandwidth oscilloscope with active probes to minimize
loading
Compare measured intervals to datasheet hold/setup times and schematic jitter allocations
Adjust components like series terminations to shape waveforms if measurements fall outside
of permitted jitter error bands per protocol specifications
I would capture debug data across operating voltage, current consumption and temperature
extremes to validate robust timing margins sufficient for unrelenting part variability and
environmental stress over lifelong product operation.
14. How does transmission line theory relate to PCB design? Why is managing transmission
line effects important?
Transmission line theory describes how electrical signals propagate along conductors in
PCBs. Understanding these effects is key for trace routing in high speed designs:
Careful impedance control through trace geometry matching and Reference planes manages
transmission line effects
If uncontrolled, transmission line behaviors introduce data errors, electromagnetic
interference and prevent reliable performance as data rates rise into the Gbps range. Through
precise modeling and layout techniques, I can satisfy impedance targets to ensure clean signal
transfer between ICs even with today’s fast edge rates.
15. How could 3D printing be used when developing new PCB boards?
3D printing has a few applications that could help accelerate PCB prototyping:
Create special test clips that easily interface test gear to boards under test
Fabricate initial runs of low-temperature co-fired ceramic substrates via print processes
before final LTCC production
Help visualize board layouts through printing 3D models highlighting component placement
While print quality is generally inadequate for conductive metallic traces on production
boards, innovators continually extend 3D printing into more electronics fabrication use cases.
As resolution, conductive fill materials and printable dielectric polymers improve, the
technology promises toaid PCB designers refine mechanical integration even while boards
themselves must use conventional subtractive/additive fabrication means for production runs.
1. Can you explain the difference between validation and verification in hardware testing?
How to answer: Verification involves checking whether the product is built correctly and
meets the specified design requirements. Validation, on the other hand, focuses on ensuring
that the product meets the customer's actual needs and intended use. In simpler terms,
verification is about "Are we building it right?" while validation is about "Are we building
the right thing?"
Example Answer: "Verification is the process of checking whether the hardware conforms to
its design specifications. It ensures that the product is built correctly according to the defined
requirements. Validation, on the other hand, is about confirming that the hardware meets the
customer's real-world needs and expectations. It ensures that the product is fit for its intended
purpose."
How to answer: Boundary value analysis is a testing technique used to identify defects near
the boundaries of input domains. It involves testing values that are on the edge of valid input
ranges. This is valuable in hardware testing as it helps uncover potential issues that may arise
when the hardware operates at its limits.
Example Answer: "Boundary value analysis is a testing technique where we test values at the
edges or boundaries of input domains. It helps identify issues that may occur when the
hardware operates near its limits, such as maximum or minimum values. By testing these
boundary conditions, we can uncover defects and ensure the hardware functions reliably in all
scenarios."
How to answer: A test plan is a document that outlines the scope, objectives, resources, and
schedule for testing activities. In hardware testing, it serves as a roadmap for the entire testing
process, helping ensure comprehensive coverage and alignment with project goals.
Example Answer: "A test plan in hardware testing is a crucial document that defines the
overall testing strategy. It outlines what needs to be tested, the resources required, the
schedule, and the criteria for success. It helps ensure that testing activities are well-organized,
comprehensive, and focused on meeting project objectives."
How to answer: Test coverage in hardware testing refers to the extent to which the hardware's
functionality has been tested. It's typically measured as a percentage and helps gauge the
thoroughness of testing. Higher test coverage indicates that more aspects of the hardware
have been tested, reducing the risk of undiscovered issues.
Example Answer: "Test coverage in hardware testing is a metric that measures how much of
the hardware's functionality has been tested. It helps ensure that testing is comprehensive and
no critical areas are left unexamined. Test coverage is usually expressed as a percentage, with
higher values indicating more extensive testing."
6. What are some common types of hardware defects you've encountered in your previous
testing experiences?
How to answer: In your response, discuss specific hardware defects you've encountered, such
as manufacturing defects, connectivity issues, power-related problems, or performance
bottlenecks. Provide examples and describe how you identified and addressed these issues.
Example Answer: "In my previous roles, I've encountered various hardware defects,
including soldering issues on PCBs, inconsistent connectivity between components, power
supply fluctuations, and thermal problems leading to performance issues. For instance, in one
project, we identified soldering defects by performing a detailed visual inspection and used
thermal imaging to detect overheating components. We then worked with the manufacturing
team to address these issues."
7. How do you approach testing for hardware compatibility with different operating systems
and software applications?
How to answer: Explain your methodology for testing hardware compatibility, including
setting up various environments, installing different operating systems and software
applications, and conducting thorough tests. Emphasize the importance of documenting
compatibility issues and collaborating with development teams to resolve them.
Example Answer: "To test hardware compatibility, I create a test environment that mirrors
the diversity of end-user configurations. I install multiple operating systems and software
applications that the hardware needs to support. Then, I conduct extensive tests, checking for
driver compatibility, system stability, and performance. Any compatibility issues I encounter
are documented and shared with the development team for resolution."
8. How do you ensure that your testing processes comply with industry standards and
regulations?
The interviewer wants to know about your approach to compliance and standards.
How to answer: Discuss your familiarity with industry standards and regulations relevant to
hardware testing, such as ISO 9001 or specific industry-specific standards. Explain how you
incorporate these standards into your testing processes, including documentation, audits, and
continuous improvement efforts.
Example Answer: "I'm well-versed in industry standards like ISO 9001 and ISO 13485 for
medical devices. I ensure compliance by meticulously documenting test procedures, results,
and traceability. Regular audits and process reviews help identify areas for improvement and
maintain adherence to these standards. Continuous training and staying updated with industry
changes also play a significant role in our compliance efforts."
9. What tools and software do you typically use for hardware testing, and why?
This question aims to assess your familiarity with testing tools and your rationale for using
them.
How to answer: Discuss the testing tools and software you have experience with, such as
oscilloscopes, logic analyzers, simulation software, and automated test frameworks. Explain
why you choose specific tools, highlighting their capabilities in addressing testing
requirements.
Example Answer: "In hardware testing, I frequently use tools like oscilloscopes for
measuring electrical signals and logic analyzers for debugging digital circuits. Simulation
software such as SPICE helps us simulate circuits before physical testing, saving time and
resources. I also leverage automated test frameworks like LabVIEW for repetitive tests,
ensuring accuracy and repeatability."
10. How do you handle testing projects with tight deadlines and limited resources?
Example Answer: "In situations with tight deadlines and limited resources, I focus on critical
tests that align with project goals. I streamline test plans, automate repetitive tasks, and
collaborate closely with team members to share workloads. In one project, we faced a tight
deadline due to unexpected design changes. By reallocating resources and optimizing our
testing strategy, we met the deadline while ensuring product quality."
11. Can you describe your experience with root cause analysis in hardware testing?
This question assesses your problem-solving skills and ability to identify and address issues.
How to answer: Share your approach to root cause analysis, which may include techniques
like the 5 Whys or Fishbone diagrams. Provide an example where you successfully identified
and resolved a complex hardware issue using root cause analysis.
Example Answer: "Root cause analysis is a crucial part of hardware testing. I employ
techniques like the 5 Whys to dig deep into issues. For instance, in a project, we experienced
intermittent failures in a system. By systematically asking 'why' multiple times, we traced the
problem back to a faulty connector pin. Fixing that pin eliminated the issue."
12. How do you stay updated with the latest trends and technologies in hardware testing?
How to answer: Discuss your proactive approach to learning and staying updated, such as
attending industry conferences, webinars, and pursuing relevant certifications. Mention any
professional organizations you're part of.
Example Answer: "I stay updated by attending industry conferences like IEEE's International
Test Conference and regularly participating in webinars on hardware testing. I'm a member of
the IEEE Computer Society, which provides access to valuable resources and networking
opportunities. Additionally, I make it a point to read research papers and follow tech blogs to
keep up with emerging trends."
13. What is the role of documentation in hardware testing, and how do you ensure accuracy
in your documentation?
This question assesses your attention to detail and the importance of documentation in
testing.
How to answer: Explain the significance of documentation in maintaining traceability and
repeatability in testing. Discuss your practices for ensuring accuracy, such as peer reviews,
version control, and clear labeling.
Example Answer: "To test hardware security, I begin with threat modeling to identify
potential attack vectors. I then conduct penetration testing to evaluate the system's resilience
against attacks. Additionally, I review hardware designs and code to ensure security best
practices are followed. In one project, we identified a vulnerability in the bootloader, which
allowed unauthorized access. We patched the vulnerability before the product's release."
15. How do you ensure the reliability and robustness of hardware products under extreme
conditions?
How to answer: Explain your approach to testing hardware under extreme conditions, such as
temperature extremes, high humidity, or vibration. Discuss the use of environmental
chambers and accelerated testing methods to simulate harsh conditions and identify
weaknesses.
Example Answer: "To ensure reliability, we subject hardware to extreme conditions using
environmental chambers. We perform temperature cycling, humidity testing, and vibration
tests to simulate real-world scenarios. These tests help uncover potential weaknesses and
ensure the hardware can withstand harsh conditions. In a recent project, our testing revealed a
soldering issue that only surfaced under extreme temperature fluctuations, which we
promptly addressed."
Example Answer: "When faced with unexpected hardware failures, I start by documenting
the issue thoroughly, including any error messages or symptoms. I then conduct a root cause
analysis to understand the underlying problem. Collaboration is key; I work closely with
engineers and developers to address the issue promptly. In a recent case, we encountered
intermittent failures due to a faulty capacitor. We replaced the component and conducted
extensive testing to ensure the problem was resolved."
17. Can you explain the concept of Design for Testability (DFT) in hardware testing?
How to answer: Describe the concept of Design for Testability (DFT) and its importance in
hardware testing. Provide examples of DFT techniques and how they contribute to easier and
more effective testing.
Example Answer: "Design for Testability (DFT) is an approach that aims to make hardware
products more test-friendly during their design phase. DFT techniques include incorporating
test access points, built-in self-test (BIST) circuitry, and boundary scan chains. These
techniques simplify testing and make it more efficient. For instance, BIST circuitry allows
the hardware to perform self-tests, reducing the need for external test equipment."
18. How do you ensure the confidentiality and security of test data and results?
How to answer: Discuss your approach to protecting test data and results, including
encryption, access control, and data retention policies. Emphasize the importance of
compliance with data protection regulations.
Example Answer: "We take data security seriously in testing. We encrypt sensitive test data,
limit access to authorized personnel through access control measures, and regularly review
and update our data retention policies to comply with data protection regulations. We also
conduct security audits to ensure the confidentiality and integrity of test data."
19. How do you handle conflicts or disagreements with team members during a testing
project?
This question assesses your interpersonal skills and conflict resolution abilities.
How to answer: Explain your approach to resolving conflicts or disagreements in a
professional manner, which may include open communication, active listening, seeking
common ground, and involving a mediator if necessary. Provide an example of a situation
where you successfully resolved a conflict within a team.
Example Answer: "In cases of conflicts or disagreements, I believe in open and respectful
communication. I start by listening to the concerns of all parties involved and seek to
understand their perspectives. We then work together to find common ground and reach a
mutually acceptable solution. In a recent project, there was a disagreement about the priority
of certain tests. By discussing the project's goals and constraints, we were able to prioritize
tests effectively and move forward collaboratively."
20. What are your strategies for ensuring that hardware tests are repeatable and reproducible?
How to answer: Describe your strategies for ensuring that hardware tests can be repeated and
reproduced consistently, such as using automated testing frameworks, documenting test
procedures, and regularly calibrating test equipment.
Example Answer: "To ensure test repeatability and reproducibility, we rely on automated
testing frameworks that execute tests with precision. We also document test procedures
meticulously, including setup instructions and environmental conditions. Regular calibration
of test equipment is crucial to maintain accuracy. These practices collectively ensure that our
tests yield consistent results every time."
21. Can you share your experience with conducting regression testing in hardware projects?
How to answer: Discuss your experience with regression testing in hardware projects,
including the scope of regression tests, the frequency of testing, and how you handle
regression test suites. Provide examples of how regression testing has been beneficial in
identifying and preventing issues.
Example Answer: "In hardware projects, we conduct regression testing to ensure that new
changes or fixes don't introduce new defects or impact existing functionality. We have
dedicated regression test suites that cover critical areas. These tests are run at various
milestones, such as after each code update or before releases. In one project, a regression test
caught a previously unnoticed issue introduced by a software update, preventing a critical
failure in the final product."
22. How do you handle testing in situations where hardware components are sourced from
different manufacturers?
This question assesses your approach to integration testing.
How to answer: Explain your process for testing hardware components from different
manufacturers, including compatibility checks, integration testing, and validation. Share an
example where you successfully managed such a situation.
Example Answer: "When dealing with hardware components from various manufacturers, we
start by conducting compatibility checks to ensure they work together seamlessly. We then
perform integration testing to validate the interoperability of these components. In a recent
project involving multiple suppliers, we encountered compatibility issues with connectors.
Through thorough testing and collaboration with suppliers, we identified and resolved these
issues before production."
23. How do you handle unexpected hardware failures during the production phase?
How to answer: Describe your approach to addressing unexpected hardware failures during
the production phase, including immediate troubleshooting, identifying root causes, and
implementing corrective actions. Share a real-life example of how you managed such a
situation.
Example Answer: "In production, unexpected hardware failures can impact timelines and
costs. When facing such situations, we prioritize immediate troubleshooting to minimize
downtime. Once we identify the root cause, we implement corrective actions, which may
involve component replacements, process adjustments, or software updates. In a recent
production run, we encountered a failure due to a batch of faulty capacitors. We quickly
replaced them and updated our supplier quality checks to prevent future occurrences."
24. How do you see the future of hardware testing evolving with emerging technologies?
How to answer: Share your insights into how emerging technologies, such as artificial
intelligence, Internet of Things (IoT), and 5G, may impact hardware testing. Discuss the need
for adaptability and continuous learning in the evolving landscape of hardware testing.
Example Answer: "The future of hardware testing is exciting and challenging. Emerging
technologies like AI and IoT will introduce new complexities and testing requirements. We'll
need to develop innovative testing methods and adapt to shorter product development cycles.
Continuous learning and staying updated with technological advancements will be crucial to
excel in this evolving field. Additionally, automated testing and virtual simulations will
become more prevalent, enhancing efficiency and accuracy in hardware testing."
MICRO CONTROLLERS:
The timer is used to measure internal clock cycles, whereas the counter
counts external events.
Input/output ports;
Disruption controls;
This and similar inquiries about how a microcontroller interacts with ROM
or any serial communication devices are frequently made about hardware
positions. Refer to connecting peripherals to a microcontroller device. I2C
is mostly used to interface EEPROM with microcontrollers. The I2C master-
slave protocol goes by this name. I2C consists of two signals: a clock
signal and a data signal. The Master has control over SCL, the clock signal.
Utilizing clock signal modification, data is sent. All of the slaves connected
to the master are run by the same clock. The interface with
microcontrollers can be depicted in the figure.
Serial communication is carried out using SCON, SBUF, TI, and RI. The
USART Control and Status Register B (UCSRB) register is used to enable
serial communication, meaning that the microcontroller's Tx and Rx pins
are prepared to send and receive data. The RXEN bit will permit data
reception, whereas the TXEN bit will enable data transmission.
Timer counts the cycles of an internal clock while a counter counts outside
occurrences. The only meaningful conceptual distinction between the
phrase timer and counter is that one. Whether you conceive of it as timing
a pause between CPU cycles or as counting off those cycles, it
accomplishes the same task.
To answer this question, one must be familiar with the internal modules or
building blocks of a microcontroller and how they are used in applications
that are related to microcontrollers. Internally, the fundamentals are
available in the 8051
10. Create a straightforward microcontroller program that blinks
an LED every 10 seconds.
A 1-second delay (1 s=1000 ms) will be applied to the flashing of the LED
linked to pin RC1 of PORTC.
While there are many parallels and distinctions between the two, there
are also some. Monitoring and controlling applications are the principal
uses of microcontrollers. Embedded signal processing and other
computing-related applications require microprocessors. The
microcontroller contains a CPU, timers, and interfaces. Since a
microprocessor is a CPU, it rarely has ports inside of it.
3. External Interrupt 0
4. External Interrupt 1
5. Reset
3. Which Bit Of The Flag Register Is Set When Output Overflows To The Sign
Bit?
When output flows to the sign bit, the second bit of the flag register is set. The
overflow flag is another name for this flag. In this case, the signed number
operation's output is too big to fit 7 bits. The MSB is used for signed numbers to
specify whether the number is positive or negative. It is solely applied to signed
number operations mistake detection.
4. Explain Jnc.?
This instruction jumps if there isn't a carry following an arithmetic operation. If there
is no carry, it is referred to as a leap (conditional jump instruction). In this case, a
choice is made using the carry flag bit in the PSW register. The processor checks to
see if the carry flag is raised or not.
6. Explain what interrupt latency is? How can you reduce it?
The amount of time needed to return from the interrupt service procedure after
addressing a particular interrupt is known as interrupt latency. It is possible to
decrease interrupt latency by developing small ISR functions.
4. With a 12 MHz clock frequency, how many instructions (of 1 machine cycle
and 2 machine cycle) can it execute per second?
In actuality, a cycle consists of 12 crystal pulses. In other words, if an instruction
takes one machine cycle to complete, it will also be completed in 12 crystal pulses.
Since one machine cycle is made up of 12 pulses and the crystal pulses 11,059,000
times each second, we can determine how many instruction cycles the 8051 can
carry out in a second:
11,059,000 / 12 = 921,583
The 8051 is therefore capable of carrying out 921,583 single-cycle instructions per
second. It is commonly believed that the 8051 can execute approximately 1 million
instructions per second because a large majority of its instructions are single-cycle
instructions. Still, in reality, it can only execute about 600,000 instructions per second
on average, depending on the instructions being used.
7. Explain DB.
In the assembler, DB is known as a defined byte and is used as a command. The 8-
bit data can be defined in binary, hexadecimal, or decimal formats. The only directive
that allows for the definition of ASCII strings with more than two characters in this
one. Memory is also allocated in byte-sized blocks using DB. The numbers are
permanently changed into hexadecimal by the assembler.
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9. What is EQU?
The assembler directive EQU defines constants without taking up memory space. It
links the data label to a constant value. The constant value is used in place of the
label each time it appears in the program.
Embedded C Interview Questions
1. What is Embedded C Programming? How is Embedded C different
from C language?
C is mainly used for developing desktop Embedded C is used in embedded systems that have limited
applications. resources like ROM, RAM, etc.
A startup code is that piece of code that is called before the execution of the main function.
This is used for creating a basic platform for the application and it is written in assembly
language.
3. What is ISR?
ISR expands to Interrupt Service Routines. These are the procedures stored at a particular
memory location and are called when certain interrupts occur. Interrupt refers to the signal
sent to the processor that indicates there is a high-priority event that requires immediate
attention. The processor suspends the normal flow of the program, executes the instructions
in ISR to cater for the high priority event. Post execution of the ISR, the normal flow of the
program resumes. The following diagrams represent the flow of ISR.
4. What is Void Pointer in Embedded C and why is it used?
Void pointers are those pointers that point to a variable of any type. It is a generic pointer as
it is not dependent on any of the inbuilt or user-defined data types while referencing. During
dereferencing of the pointer, we require the correct data type to which the data needs to be
dereferenced.
For Example:
char c = 'a';
*ptr = &c; //Same void pointer can be used to point to data of different
type -> reusability
print("%c",(*(char*)ptr));
Void pointers are used mainly because of their nature of re-usability. It is reusable because
any type of data can be stored.
The volatile keyword is mainly used for preventing a compiler from optimizing a variable
that might change its behaviour unexpectedly post the optimization. Consider a scenario
where we have a variable where there is a possibility of its value getting updated by some
event or a signal, then we need to tell the compiler not to optimize it and load that variable
every time it is called. To inform the compiler, we use the keyword volatile at the time of
variable declaration.
6. What are the differences between the const and volatile qualifiers in
embedded C?
const volatile
The keyword “const” is enforced by the The keyword “volatile” tells the compiler to not
compiler and tells it that no changes can be perform any optimization on the variables and not to
made to the value of that object/variable assume anything about the variables against which it
during program execution. is declared.
Example: const int x=20;, here if the Example: volatile int x;, here the compiler is
program attempts to modify the value of x, told to not assume anything regarding the variable x
then there would be a compiler error as and avoid performing optimizations on it. Every time
there is const keyword assigned which makes the compiler encounters the variable, fetch it from the
the variable x non-modifiable. memory it is assigned to.
The Concatenation operator is indicated by the usage of ##. It is used in macros to perform
concatenation of the arguments in the macro. We need to keep note that only the arguments
are concatenated, not the values of those arguments.
main(){
We can think of it like this if arguments x and y are passed, then the macro just returns xy ->
The concatenation of x and y.
Interrupt latency refers to the time taken by ISR to respond to the interrupt. The
lesser the latency faster is the response to the interrupt event.
9. How will you use a variable defined in source file1 inside source file2?
We can achieve this by making use of the “extern” keyboard. It allows the variable to be
accessible from one file to another. This can be handled more cleanly by creating a header
file that just consists of extern variable declarations. This header file is then included in the
source files which uses the extern variables. Consider an example where we have a header
file named variables.h and a source file named sc_file.c.
/* variables.h*/
extern int global_variable_x;
/* sc_file.c*/
#include "variables.h" /* Header variables included */
#include <stdio.h>
void demoFunction(void)
{
printf("Value of Global Variable X: %d\n", global_variable_x++);
}
A segmentation fault occurs most commonly and often leads to crashes in the programs. It
occurs when a program instruction tries to access a memory address that is prohibited from
getting accessed.
11. What are the differences between Inline and Macro Function?
Argument Expressions passed to the Macro Expressions passed to Inline functions get
Evaluation functions might get evaluated evaluated once.
Category Macro Function Inline Function
The const keyword is used when we want to ensure that the variable value should not be
changed. However, the value can still be changed due to external interrupts or events. So, we
can use const with volatile keywords and it won’t cause any problem.
Variables defined with static are initialized once and persists until the end of the program and
are local only to the block it is defined. A static variables declaration requires definition. It
can be defined in a header file. But if we do so, a private copy of the variable of the header
file will be present in each source file the header is included. This is not preferred and hence
it is not recommended to use static variables in a header file.
The Pre-decrement operator (--operand) is used for decrementing the value of the variable
by 1 before assigning the variable value.
The Post-decrement operator (operand--) is used for decrementing the value of a variable by
1 after assigning the variable value.
A function is called reentrant if the function can be interrupted in the middle of the execution
and be safely called again (re-entered) to complete the execution. The interruption can be in
the form of external events or signals or internal signals like call or jump. The reentrant
function resumes at the point where the execution was left off and proceeds to completion.
1. What kind of loop is better - Count up from zero or Count Down to zero?
Loops that involve count down to zero are better than count-up loops. This is because the
compiler can optimize the comparison to zero at the time of loop termination. The processors
need not have to load both the loop variable and the maximum value for comparison due to
the optimization. Hence, count down to 0 loops are always better.
A null pointer is a pointer that does not point to any valid memory location. It is defined to
ensure that the pointer should not be used to modify anything as it is invalid. If no address is
assigned to the pointer, it is set to NULL.
Syntax:
One of the uses of the null pointer is that once the memory allocated to a pointer is freed up,
we will be using NULL to assign to the pointer so that it does not point to any garbage
locations.
++i instruction uses single machine instruction like INR (Increment Register) to perform the
increment.
For the instruction i+1, it requires to load the value of the variable i and then perform the INR
operation on it. Due to the additional load, ++i is faster than the i+1 instruction.
5. What are the reasons for segmentation fault in Embedded C? How do you
avoid these errors?
Initializing Pointer Properly: Assign addresses to the pointers properly. For instance:
o We can also assign the address of the matrix, vectors or using functions like calloc, malloc
etc.
o Only important thing is to assign value to the pointer before accessing it.
int varName;
int *p = &varName;
Minimize using pointers: Most of the functions in Embedded C such as scanf, require that
address should be sent as a parameter to them. In cases like these, as best practices, we
declare a variable and send the address of that variable to that function as shown below:
int x;
scanf("%d",&x);
In the same way, while sending the address of variables to custom-defined functions, we can
use the & parameter instead of using pointer variables to access the address.
int x = 1;
x = customFunction(&x);
Troubleshooting: Make sure that every component of the program like pointers, array
subscripts, & operator, * operator, array accessing, etc as they can be likely candidates for
segmentation error. Debug the statements line by line to identify the line that causes the error
and investigate them.
printf() is a non-reentrant and thread-safe function which is why it is not recommended to call
inside the ISR.
An ISR by nature does not allow anything to pass nor does it return anything. This is because
ISR is a routine called whenever hardware or software events occur and is not in control of
the code.
Whenever a process needs to be executed, it would be swapped into the memory by using a
lazy swapper called a pager.
The pager tries to guess which page needs to get access to the memory based on a predefined
algorithm and swaps that process. This ensures that the whole process is not swapped into the
memory, but only the necessary parts of the process are swapped utilizing pages.
This decreases the time taken to swap and unnecessary reading of memory pages and reduces
the physical memory required.
From the code given, it appears that the function intends to return the square of the values
pointed by the pointer p. But, since we have the pointer point to a volatile integer, the
compiler generates code as below:
Since the pointer can be changed to point to other locations, it might be possible that the
values of the x and y would be different which might not even result in the square of the
numbers. Hence, the correct way for achieving the square of the number is by coding as
below:
10. The following piece of code uses __interrupt keyword to define an ISR.
Comment on the correctness of the code.
ISRs are not supposed to return any value. The given code returns a value of datatype double.
It is not possible to pass parameters to ISRs. Here, we are passing a parameter to the ISR
which is wrong.
It is not advisable to have printf inside the ISR as they are non-reentrant and thereby it
impacts the performance.
In Embedded C, we need to know a fact that when expressions are having signed and
unsigned operand types, then every operand will be promoted to an unsigned type. Herem the
-40 will be promoted to unsigned type thereby making it a very large value when compared to
10. Hence, we will get the statement “Greater than 10” printed on the console.
12. What are the reasons for Interrupt Latency and how to reduce it?
Hardware: Whenever an interrupt occurs, the signal has to be synchronized with the CPU
clock cycles. Depending on the hardware of the processor and the logic of synchronization, it
can take up to 3 CPU cycles before the interrupt signal has reached the processor for
processing.
Pipeline: Most of the modern CPUs have instructions pipelined. Execution happens when the
instruction has reached the last stage of the pipeline. Once the execution of an instruction is
done, it would require some extra CPU cycles to refill the pipeline with instructions. This
contributes to the latency.
Interrupt latency can be reduced by ensuring that the ISR routines are short. When a lower
priority interrupt gets triggered while a higher priority interrupt is getting executed, then the
lower priority interrupt would get delayed resulting in increased latency. In such cases,
having smaller ISR routines for lower priority interrupts would help to reduce the delay.
Also, better scheduling and synchronization algorithms in the processor CPU would help
minimize the ISR latency.
A pointer is said to be a wild pointer if it has not been initialized to NULL or a valid memory
address. Consider the following declaration:
int *ptr;
*ptr = 20;
Here the pointer ptr is not initialized and in the next step, we are trying to assign a valid value
to it. If the ptr has a garbage location address, then that would corrupt the upcoming
instructions too.
If we are trying to de-allocate this pointer and free it as well using the free function, and
again if we are not assigning the pointer as NULL or any valid address, then again chances
are that the pointer would still be pointing to the garbage location and accessing from that
would lead to errors. These pointers are called dangling pointers.
15. What are the differences between the following 2 statements #include "..."
and #include <...>?
Both declarations specify for the files to be included in the current source file. The difference
is in how and where the preprocessor looks for including the files. For #include "...", the
preprocessor just searches for the file in the current directory as where the source file is
present and if not found, it proceeds to search in the standard directories specified by the
compiler. Whereas for the #include <...> declaration, the preprocessor looks for the files
in the compiler designated directories where the standard library files usually reside.
16. When does a memory leak occur? What are the ways of avoiding it?
Memory leak is a phenomenon that occurs when the developers create objects or make use of
memory to help memory and then forget to free the memory before the completion of the
program. This results in reduced system performance due to the reduced memory availability
and if this continues, at one point, the application can crash. These are serious issues for
applications involving servers, daemons, etc that should ideally never terminate.
#include <stdlib.h>
void memLeakDemo()
{
int *p = (int *) malloc(sizeof(int));
return; /* Return from the function without freeing the pointer p*/
}
In this example, we have created pointer p inside the function and we have not freed the
pointer before the completion of the function. This causes pointer p to remain in the memory.
Imagine 100s of pointers like these. The memory will be occupied unnecessarily and hence
resulting in a memory leak.
We can avoid memory leaks by always freeing the objects and pointers when no longer
required. The above example can be modified as:
#include <stdlib.h>;
void memLeakFix()
{
int *p = (int *) malloc(sizeof(int));
}
Embedded C Programming
1. Write an Embedded C program to multiply any number by 9 in the fastest
manner.
This can be achieved by involving bit manipulation techniques - Shift left operator as shown
below:
#include<stdio.h>
void main(){
int num;
printf(“Enter number: ”);
scanf(“%d”,&num);
printf(“%d”, (num<<3)+num);
}
2. How will you swap two variables? Write different approaches for the same.
5. Write a MIN macro program that takes two arguments and returns the
smallest of both arguments.
#define MIN(NUM1,NUM2) ( (NUM1) <= (NUM2) ? (NUM1) : (NUM2) )
Embedded C MCQ
1.
What is the function used for rounding off the value to the nearest value?
ceil()
roundoff()
roundto()
None of the above
3.
Which among the below options are true with regards to the below list of definitions:
int num;
unsigned unum;
long lnum;
long long llnum;
All the above except the first one are incorrect because the int declaration is missing.
Only the last two declarations are correct.
Only the first two declarations are correct
All of the declarations are correct as int is assumed in all of them.
4.
Which among the below options are correct for the following declaration of code?
int (*ptr)[10];
Which among the below options are correct for defining a macro that returns a square of two
arguments?
#define SQUARE(X)(X*X);
#define SQUARE(X)(X*X)
#define SQUARE(x)(X*X)
#define SQUARE(x){X*X}
6.
Which among the below options are correct for const and volatile?
NULL pointer
Void Pointer
Wild Pointer
Invalid code
8.
Which among the below options does the task of processing enum types?
Assembler
Preprocessor
Linker
Compiler
9.
Which among the following will happen if we try to assign a value to the array index whose
subscript exceeds the array size?
Compiler error
The element will be set to 0
The program may crash if important data is overwritten
Array size would grow accordingly
10.
remove(ptr);
free(ptr);
delete(ptr);
dealloc(ptr);