Pokhara University

Faculty of Science and Technology

Course Code: ELX 270 (3 Credit) Full Marks: 100

Course Title: Microprocessor (3-1-2) Pass Mark: 45
Nature of the Course: Theory and Practical Total Lectures: 45 hours
Level: Undergraduate Program: B E (Electrical & Electronics
Year: Second Semester: IV Engineering,)

1. Course Description:
This course introduces microprocessor architecture and microcomputer system, including
memory and input/output interfacing. It includes assembly language programming, bus
architecture, bus cycle types, I/O systems, memory systems, interrupts. It also covers the modern
type of Microprocessor

2. General Objectives:
The main objective of the courses are:
• To provide fundamental understanding of architecture, organization, basic operations,
programming and application of Microprocessor (8085/8086)
• To familiarize interfacing between memory and I/O devices with the Microprocessor.

3. Methods of Instructions:
• Lecture
• Tutorial
• Discussion
• Laboratory Work

4 Content in Detail

Specific Objectives Content

Unit1: Introduction to Microprocessor [4 Hrs.]
• Draw the block diagram of a 1.1 Historical evolution of INTEL series
Microprocessor based system and Microprocessor
explain the function of each 1.2 Bus organization of a microprocessor
component 1.3 Microprocessor and Microcontroller
• Explain the line of communication 1.4 Microcomputer
Bus 1.4.1 Von Neumann and Harvard Architecture
1.5 Concept of fetch, decode and execution

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• Describe the function of various pins Unit 2: 8-bit Microprocessor and programming
of the 8085 microprocessors (Intel 8085) [15 Hrs.]
• Explain the bus timings in fetching an 2.1 Internal Architecture and features
instruction from memory 2.2 Pin Diagram
. 2.3 Instruction Cycle, Machine Cycle and T-State
• Explain the addressing Mode 2.4Timing Diagram
• Explain the function of data transfer 2.4.1 Opcode fetch Cycle
instruction, Arithmetic instruction, 2.4.2 Memory Read
logical and conditional and 2.4.3 Memory Write
unconditional instruction. 2.4.4 I /O Read
• Enable to write ALP. 2.4.5 I/O Write
• Generation of control signal 2.3 Instruction and Data format
2.4Addressing Modes and its types
2.5 Instruction Set
2.6 Classification of Instruction
2.6.1 Data Transfer Instruction
2.6.2 Arithmetic Instruction
2.6.3 Logical Instruction
2.6.4 Branching Instruction and
2.6.5 Stack, I/O and Machine control Instruction
2.7 RTL Instruction Description
2.8 Assembly Language Program

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 Unit 3: Bus Structure, Memory and I/O Interfacing
[14 Hrs.]
• Explain the difference between the 3.1 Bus Structure
peripheral mapped and memory- 3.1.1 Synchronous Bus
mapped technique 3.1.2 Asynchronous Bus
• Interface and I/O device to a 3.2 Memory Device Classification and Hierarchy
microcomputer by using logic gates 3.3 Interfacing I/O and Memory
and MSI Chip, such as decoders, 3.3.1 Address Decoding
latches and buffers. 3.3.2 Unique and Non-Unique Address Decoding
• Explain the Full Address decoding 3.3.3 I/O Mapped I/O and Memory mapped I/O
and partial decoding 3.3.4 I/O Address Decoding (8085)
• List the element of the 8255 3.3.5 Memory Address Decoding (8085)
programmable peripheral interface 3.4 Parallel Interface
(PPI)and explain its various 3.4.1 Modes: Simple I/O, Strobe I/O, Single
operating modes and control word Handshaking and Double Handshaking
• Explain the process of the Direct 3.4.2 Programmable Peripheral Interface (PPI)
Memory Access (DMA) and the 3.4.2.1 Architecture of Intel (8255-PPI)
function of various elements of the 3.5 Serial Interface
8237. 3.5.1 Synchronous and Asynchronous Transmission
3.5.2 Programmable Communication Interface
3.5.2.1 USART (8251)
3.6 DMA and Intel 8237A DMA Controller

• Explain an Interrupt process and the Unit 4: Interrupt Operation [6 Hrs.]

difference between Maskable and 4.1Interrupt and its Classification
Non Maskable Interrupt 4.2 Interrupt Processing Sequence in 8085
• Explain the instruction EI, DI, and 4.3 Interrupt Instruction
RST and their function in the 8085- 4.3.1 Interrupts pins and priorities
interrupt process. 4.3.2 Interrupt Service procedure
• Explain the instruction RIM and SIM 4.3.3 Interrupt Vector Table
and how to use them for 8085 4.3.4 Multiple Interrupt Handling
interrupt 4.3.4.1 Polled and Vectored interrupt
• Explain the features of the PIC 8259 4.3.5 Programmable Interrupt Controller (PIC) Intel
(8259) and its Architecture

Unit 5: 16-bit Microprocessor (Intel 8086) [6 Hrs.]

5.1 Internal Architecture and Features
5.1.1 BIU and EU Operations
• Draw the block diagram of an 8086 5.1.2 Memory Segmentation and offset Address
Microprocessor and explain the 5.1.3 Pin Diagram
function of each component 5.2 Functional Chips
5.2.1 Intel 8284A Clock Generator,

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 • Explain the concept of memory 5.2.2 8282 Address Latch,
segmentation 5.2.3 8286 transceivers (transmitter/receiver),
5.2.4 Intel 8288 Bus Controller IC
• Describe the function of various pins 5.3 Introduction to Multicore processors
of the 8086 microprocessors

• Describe the various Functional chip

5 List of Tutorials
The following tutorial activities of 15 hours per group of maximum 24 students should be
conducted to cover all the required contents of this course:

SN Tutorials
1. Timing Diagram of 8085
2. Calculation of Starting and ending address of memory for 8085
3. Design an interfacing circuit/Address decoding to interface different size of memory for
8085
4. Design with input output interfacing with 8085

6. Practical works (30 hours for a group of maximum 24 students)

SN Practical (Using 8085 kit or simulator)

1. ALP to load the content of memory Location directly to the accumulator, then transfer it
to register B.
2. ALP to add two 8- bit numbers stored at memory locations and store the result in
specified memory locations and also perform subtraction between two 8-bit numbers
stored in memory locations and store the result in specified location. If the result is
positive store 00 and if the result is negative store 01.
3. ALP to multiply two 8-bit numbers stored in given memory locations then store the 16
bit result in specified memory locations using repeated addition and also the bit rotation
technique.
4. ALP to perform division of two 8-bit numbers stored in given memory locations and
store the quotient and reminder in specific memory locations.
5. ALP to sum of series of 8- bit numbers. Store the result in specified memory locations.
Assume that the sum does not exceed 16-bit.
6. ALP to check the hex number stored in given location for odd or even parity. If the
parity is odd, 00 will be store, Otherwise, EE is stored.
7. Ten bytes of data are stored in given memory locations. Write an ALP to transfer block
of data to new specified memory locations.
8. ALP to find the largest number from a series of a numbers and also find 2’s complement
of an 8- bit number store at given memory location.
9. ALP to arrange a series of numbers in descending order.

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10. ALP to compare two 8-bit numbers located at given memory locations. If the number
equal load FF at register D else 00 at same register.

7. Evaluation System and Students’ Responsibilities

Evaluation System
The internal evaluation of a student may consist of assignments, attendance, term-exams, lab
reports and projects etc. The tabular presentation of the internal evaluation is as follows:

Internal Evaluation Weight Marks External Evaluation Marks

Theory 30
Attendance & Class Participation 10%
Assignments 20%
Presentations/Quizzes 10%
Internal Assessment 60%
Practical 20 Semester End
Attendance & Class Participation 10% Examination 50
Lab Report/Project Report 20%
Practical Exam/Project Work 40%
Viva 30%
Total Internal 50
Full Marks: 50 + 50 = 100

Students’ Responsibilities
Each student must secure at least 45% marks separately in internal assessment and practical
evaluation with 80% attendance in the class in order to appear in the Semester End Examination.
Failing to get such score will be given NOT QUALIFIED (NQ) to appear the Semester-End
Examinations. Students are advised to attend all the classes, formal exam, test, etc. and complete
all the assignments within the specified time period. Students are required to complete all the
requirements defined for the completion of the course.

8. Prescribed Books and References

Text Books:
1. Ramesh S. Gaonkar, “Microprocessor Architecture, Programming and Application with
8085”, 5th Edition 2002, Prentice Hall
References:
1. D. V. Hall, “Microprocessor and Interfacing, Programming and Hardware”, 2nd Edition
1999, Tata McGraw Hill
2. John Offenbach, “Microcomputers and Microprocessors, the 8080, 8085 and Z-80
Programming, Interfacing and Troubleshooting” 3rd Edition 1999, Prentice Hall
3. Walter A. Triebel and Avtar Singh, “The 8088 and 8086 Microprocessors, Programming,

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Interfacing, Software, Hardware and Applications”, 4th Edition 2003, Prentice Hall
4. William Stalling, “Computer Organization and Architecture”, 8th Edition 2009, Prentice
Hall