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Unit2 - Combinational Circuits Part 1

This document covers combinational logic circuits, detailing the analysis and design procedures for adders, subtractors, decoders, encoders, multiplexers, and demultiplexers. It explains the implementation of half and full adders and subtractors, as well as the functionality of multiplexers and demultiplexers with examples. The document also includes truth tables and block diagrams for various multiplexers, illustrating their operation based on selection lines.

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8 views2 pages

Unit2 - Combinational Circuits Part 1

This document covers combinational logic circuits, detailing the analysis and design procedures for adders, subtractors, decoders, encoders, multiplexers, and demultiplexers. It explains the implementation of half and full adders and subtractors, as well as the functionality of multiplexers and demultiplexers with examples. The document also includes truth tables and block diagrams for various multiplexers, illustrating their operation based on selection lines.

Uploaded by

rajipriyadharshini163
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as TXT, PDF, TXT or read online on Scribd
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UNIT - II COMBINATIONAL LOGIC CIRCUITS 15

Analysis Procedure – Design Procedure – Adders – Subtractors – Decoders – Encoders


– Priority Encoder - Multiplexer – Demultiplexer – Code Converters.

Implementation of half adder & full adder


Implementation of half subtractor & full subtractor
Implementation of decoder, encoder, multiplexer and demultiplexer.

Half adder

Full adder

Subtractor
The half subtractor is also a building block for subtracting two binary numbers. It
has two inputs and two outputs. This circuit is used to subtract two single bit
binary numbers A and B. The 'diff' and 'borrow' are two output states of the half
subtractor.
The Half Subtractor is used to subtract only two numbers. To overcome this problem,
a full subtractor was designed. The full subtractor is used to subtract three 1-bit
numbers A, B, and C, which are minuend, subtrahend, and borrow, respectively. The
full subtractor has three input states and two output states i.e., diff and borrow.

Half subtractor

Diff= A XOR B (A⊕B)


Borrow= not-A AND B (A'.B)
#

multiplexer#
A multiplexer is a combinational circuit that has 2n input lines and a single
output line. Simply, the multiplexer is a multi-input and single-output
combinational circuit. The binary information is received from the input lines and
directed to the output line. On the basis of the values of the selection lines, one
of these data inputs will be connected to the output.
Unlike encoder and decoder, there are n selection lines and 2n input lines. So,
there is a total of 2N possible combinations of inputs. A multiplexer is also
treated as Mux

2x1 multiplexer

4×1 Multiplexer
In the 4×1 multiplexer, there is a total of four inputs, i.e., A0, A1, A2, and A3,
2 selection lines, i.e., S0 and S1 and single output, i.e., Y. On the basis of the
combination of inputs that are present at the selection lines S0 and S1, one of
these 4 inputs are connected to the output. The block diagram and the truth table
of the 4×1 multiplexer are given below.

#8 to 1 Multiplexer#
In the 8 to 1 multiplexer, there are total eight inputs, i.e., A0, A1, A2, A3, A4,
A5, A6, and A7, 3 selection lines, i.e., S0, S1and S2 and single output, i.e., Y.
On the basis of the combination of inputs that are present at the selection lines
S0, S1, and S2, one of these 8 inputs are connected to the output. The block
diagram and the truth table of the 8×1 multiplexer are given below

F(A,B,C) =∑m(1,3,5,6)
Implement using 4:1 mux

F(A,B,C) =∑m(1,3,5,6)
Implement 8:1 multiplexer

Implement using 8:1 mux


F(p,q,r,s)= ∑m(0,1,3,4,8,9,15)

4:1 mux
F(a,b,c,d) =∑m(0,1,2,4,6,9,12,14)

8:1 mux
F(a,b,c,d) = πM(0,3,5,8,9,10,12,14)

Demultiplexer
A De-multiplexer is a combinational circuit that has only 1 input line and
2N output lines. Simply, the multiplexer is a single-input and multi-output
combinational circuit. The information is received from the single input lines and
directed to the output line. On the basis of the values of the selection lines, the
input will be connected to one of these outputs. De-multiplexer is opposite to the
multiplexer.
Unlike encoder and decoder, there are n selection lines and 2n outputs. So, there
is a total of 2n possible combinations of inputs. De-multiplexer is also treated
as De-mux.

Full subtractor using 1:8 Demultiplexer

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