Year: I

Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

COURSE PLAN

Target 50% (marks)

Level-1 40% (population)
Level-2 50% (population)
Level-3 60% (population)

1.Method of Evaluation

UG
Internal assessment (50%)-Tests-Quizzes, Assignments/Project
Mid Examination (20%), Exam
End examination (30%), Exam

Internal Assessment Weightage in calculation of Internal

Component Assessment (100 marks)
Class Test 1/QUIZ1 20%
Class Test 2/QUIZ2 20%
Assignment 1/Project 30%
Assignment 2/Project 30%

2. Passing Criteria
Scale UG
Out of 10point scale SGPA – “5.0” in each semester
CGPA – “5.0”
Min. Individual Course Grade – “C”
Course Grade Point – “3.0”

*for UG, passing marks are 35/100 in a paper

3.Prerequisite(s): Basic Knowledge of computer systems, Concept of Digital Electronics

4.Course Objectives

1
 Year: I
Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

To equip students with the necessary knowledge and skills to comprehend, analyze, and design digital
computer systems, ensuring they can effectively develop and optimize software applications and systems.

5. Pedagogy
 Proper session plan
 Presentation
 Class Test
 Quizzes
 Assignments/Projects
 Voice over Presentation & Video lectures
 Performance Tests

6. References

Text Books 1. M. M. Mano, "Computer System Architecture", Revised 3rd Edition, Pearson
Education, 2017.

2. Carl Hamacher, Zvonko Vranesic , Safwat Zaky, and Naraig Manjikian,

"Computer Organization and Embedded Systems", 6th Edition, McGraw Hill,
Standard Edition, 2023.

3. David A. Patterson, and John L. Hennessy, "Computer Organization and

Design MIPS Edition: The Hardware/Software Interface", 5th Edition, The
Morgan Kaufmann Series in Computer Architecture and Design, Morgan
Kaufmann, 2020.

Web resources NPTEL

Journals Information about advanced research about any topics of syllabus from
SCI/SCIE/Scopus
Reference books 1. John P. Hayes, "Computer Architecture and Organization", 3rd Edition,
McGraw-Hill Education, 2017.

2. William Stallings, "Computer Organization and Architecture: Designing for

2
 Year: I
Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

Performance", 11th Edition, Pearson, 2022.

GUIDELINES TO STUDY THE SUBJECT

Instructions to Students:

1. Go through the 'Syllabus' uploaded on the My UPES- LMS platform to find out the Reading List.
2. Get your schedule and try to pace your studies as close to the timeline as possible.
3. Get your on-line lecture notes (Content, videos) at Lecture Notes section. These are our lecture
notes. Make sure you use them during this course.
4. Check your LMS student portal regularly.
5. Go through study material.
6. Check mails and announcements on LMS student portal.
7. Keep updated with the posts, assignments and examinations which shall be conducted on the LMS
student portal.
8. Be regular, so that you do not suffer in any way.
9. Cell Phones and other Electronic Communication Devices: Cell phones and other electronic
communication devices are not permitted in classes during the Tests. Such devices MUST be
turned off in the classroom.
10. E-Mail and online learning tool: Each student in the class should have an e-mail id and a pass
word to access the LMS system regularly. Regularly, important information – Date of conducting
class tests, guest lectures, via online learning tool. The best way to arrange meetings with us or ask
specific questions is by email and prior appointment. All the assignments preferably should be
uploaded on an online learning tool. Various research papers/reference material will be
mailed/uploaded on online learning platform from time to time.
11. Attendance: Students are required to have a minimum attendance of 75% in each subject.
Students with less than the said percentage shall NOT be allowed to appear in the end semester
examination.

This much should be enough to get you organized and on your way to having a great semester! If you need
us for anything, send your feedback through e-mail to your concerned faculty. Please use an appropriate
subject line to indicate your message details.

RELATED OUTCOMES

1. The expected outcomes of the Program:

3
 Year: I
Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

Engineering knowledge: Apply the knowledge of mathematics, science, engineering

PO1 fundamentals, and an engineering specialization to the solution of complex engineering
problems.
Problem analysis: Identify, formulate, review research literature, and analyze complex
PO2 engineering problems reaching substantiated conclusions using first principles of
mathematics, natural sciences, and engineering sciences.
Design/development of solutions: Design solutions for complex engineering problems and
design system components or processes that meet the specified needs with appropriate
PO3
consideration for the public health and safety, and the cultural, societal, and environmental
considerations.
Conduct investigations of complex problems: Use research-based knowledge and research
PO4 methods including design of experiments, analysis and interpretation of data, and synthesis
of the information to provide valid conclusions.
Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern
PO5 engineering and IT tools including prediction and modeling to complex engineering activities
with an understanding of the limitations.
Engineer and society: Apply reasoning informed by contextual knowledge to assess societal,
PO6 health, safety, legal and cultural issues and the consequent responsibilities relevant to the
professional engineering practice.
Environment and sustainability: Understand the impact of professional engineering solutions
PO7 in societal and environmental contexts, and demonstrate the knowledge of, and need for
sustainable development.
Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
PO8
norms of engineering practice.

Individual and teamwork: Function effectively as an individual, and as a member or leader in

PO9
diverse teams, and in multidisciplinary settings.
Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as being able to comprehend and
PO10
write effective reports and design documentation, make effective presentations, and give and
receive clear instructions.
Project management and finance: Demonstrate knowledge and understanding of the
PO11 engineering and management principles and apply these to one’s own work, as a member and
leader in a team, to manage projects and in multidisciplinary environments.
Life-long learning: Recognize the need for and have the preparation and ability to engage in
PO12
independent and life-long learning in the broadest context of technological change.

4
 Year: I
Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

2. The expected outcomes of the Specific Program:

Perform system and application programming using computer system concepts, the
PSO1 principles of data structures, algorithm development, problem-solving, and optimization
techniques.

Apply software development and project management methodologies, integrating principles

PSO2 from both front-end and back-end development, and effectively utilize contemporary tools
and technologies.

Exhibit a commitment to ethical practices, societal responsibilities, and continuous learning,

PSO3 contributing to the advancement of technology and addressing challenges in diverse
computing domains.

3. The expected outcomes of the Specific Program:

On completion of this course, the students will be able to

CO1: Analyze the components and organization of digital computers.
CO2: Apply knowledge of instruction codes, instruction formats, and addressing modes to analyze and
design computer instructions in different CPU architectures.
CO3: Examine the design and organization of control units in digital computers to comprehend their role
in executing instructions and managing system operations.
CO4: Analyze the organization and performance implications of memory units and input –output systems
in digital computer systems.
CO5: Assess the benefits and challenges of pipelining computer architecture on system performance and
throughput.

4. Co-Relationship Matrix

Program
PO PO PO PO PO PO PO PO PO PO1 PO1 PO1 PSO PSO PSO
Outcome 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3

5
 Year: I
Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

Course
Outcome
s
CO 1 1 2 - 1 1 1 - - - - 3 2 - -
CO 2 1 1 2 - 1 1 1 - - - - 3 2 - -
CO 3 1 1 2 - 1 1 1 - - - - 3 2 - -
CO 4 1 2 - 1 1 1 - - - - 3 2 - -
- - - - - - -
CO 5 1 1 2 1 1 1 3 2

- - - - - - -
Average 1 0.6 2 1 1 1 3 2

1 – Weakly Mapped (Low) 2 – Moderately Mapped (Medium)

3 – Strongly Mapped (High) “_” means there is no correlation

5. Course outcomes assessment plan:

components

Course Project/
Quiz Class Test Lab Test Any other
Outcomes Assignment

CO 1 R R R R 
CO 2 R R R R 
CO 3 R R R R 

6
 Year: I
Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

CO 4 R R R R 
CO 5 R R R R 

OVERVIEW OF COURSE DELIVERY/BROAD PLAN OF COURSE COVERAGE

Course Activities:

Planned Actual
S.
Description No. of No. of Remarks
No. From To From TO
Ses Ses

1. Digital Computers Unit I 8

Basic Computer
2. Organization and 7
Design- Unit II

Control Organization-
3. 6
Unit-III

Memory Organization-
4. 8
Unit-IV

Input Output
8
5. Organization

6. Pipelining 8

7
 Year: I
Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

SESSION PLAN

UNIT-I

Digital Computers

Session Plan Actual Delivery

To
CO pic
L Ma L s CO
e D ppe e D Co Ac
ct at d ct at ver hie
. e Topics to be Covered . e ed ved
Introduction about digital computer, Why digital computer?
Classification about computing and non-computing systems, CO
1 Overview of different blocks of computer 1
CO
Introduction to CPU (Registers, ALU, Clock, Control unit), 1
2 Memory,
CO
1,C
I/O subsystems, Common Bus System (External and Internal Bus: O2
3 Address Bus, Data Bus and Control Bus);
CO
1,C
Evolution of Computer Systems, Von Neumann Architecture and O2
4 Harvard Architecture
CO
1,C
Big Endian and Little Endian, Signed Arithmetic- Addition, O2
5 Subtraction, Multiplication,
CO
Data representation: Number System, r complement and r-1 1,C
complement arithmetic, Unsigned and Signed number O2
6 representation, Preliminary idea of combinational circuits

8
 Year: I
Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

CO
1,C
Register Transfer Language (RTL) and Micro operations O2
7 (Arithmetic, Logical and Shift micro operations),
CO
1,C
Arithmetic Logic and Shift unit hardware implementation,Register O2
8 transfer, Bus and memory transfer

UNIT-II

Basic Computer Organization and Design

Session Plan Actual Delivery

CO Topic
Mapp s CO
Lec Dat ed Lec Dat Cover Achiev
t. e Topics to be Covered t. e ed ed

1 Instruction codes and format CO2

CO2
2 Stored program organization
Instruction cycles, Instruction Formats, Instruction CO2
3 types
Timing and control, Instruction and Instruction CO2
4 sequencing
CO2
5 Addressing types, Memory Reference
CO2
6 Stack organization
Some common CPU architectures(Intel IA-32 CO2
7 Architecture, ARM)

9
 Year: I
Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

UNIT-III

Control Unit Organization

Session Plan Actual Delivery

C
O
A
CO ch
Mappe Topics ie
Lec Dat d Lec Dat Cover ve
t. e Topics to be Covered t. e ed d
Introduction Control Unit Design, CO3
1 Hardwired Control Unit and Timing Signals
Microprogrammed control unit: CO3
2 control memory, Address sequencing
Designing of microprogrammed control uni CO3
3 Control Transfer, Fetch Cycle
Comparison of hardwired and microprogrammed CO3
control units,
4 RISC and CISC Processors
CO3,C
O1
5 Arithmetic and logic unit design
Designing a hypothetical processor with minimum CO3,C
number of Instruction O2

UNIT-IV

Memory Organization
10
 Year: I
Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

Session Plan Actual Delivery

CO Topi
D Map D cs CO
Le at ped Le at Cov Achi
ct. e Topics to be Covered ct. e ered eved
Memory Hierarchy ,memory Locations & Addresses, CO1,
1 Semiconductor Memory, Static and Dynamic Memory CO4
CO1,
CO4
2 Main Memory, Memory address map,
CO1,
Auxiliary Memory, Associative Memory, hardware CO4
3 organization Cache Memory
Secondary Memories: Optical Magnetic Tape, Magnetic CO1,
Disk and Controllers. CO4
4
Cache Memory: Principle of Locality, Cache mapping CO4
techniques
5
Virtual memory, address space and memory space CO4
6
Memory management hardware, segmented page mapping CO4
7
Memory protection and numerical example CO4
8

UNIT-V

Input Output Organization

Session Plan Actual Delivery

CO Topics CO
Lect Dat Mapped Lect Dat Covere Achieve
. e Topics to be Covered . e d d
11
 Year: I
Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

1 I/O and their brief description CO4

CO4,CO
Bus Interface, Bus arbitration, Data 1
2 Transfer
Asynchronous data transfer and modes CO4
3 of transfer
Types of Interrupts, I/O Interrupts, CO4
4 priority interrupt
Interrupt cycle, software routines CO4
5
Direct Memory Access, controller and CO4
6 transfer
CO4
7 Input output processor
CO4
8 Serial communication and its protocols

UNIT-VI

Pipelining

Session Plan Actual Delivery

CO
Mappe Topics CO
Le d Lec Covere Achiev
ct. Date Topics to be Covered t. Date d ed

1 Pipelining general consideration CO5

CO5
2 Arithmetic pipeline, Instruction pipeline

12
 Year: I
Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

CO5
3 Shared memory and distributed memory
CO5
4 Vector processing
CO5
5 Array processors
Four-Segment Instruction Pipeline CO5
6 Pipelining Conflicts: Resource conflicts
CO5
7 RISC and CISC pipeline
Pipelining in ColdFire Processors, Pipelining CO5
8 in Intel Processors

PERIODIC MONITORING

Actual date of completion and remarks, if any

Components From To From To From To

Duration (Mention from and to dates)
Percentage of Syllabus covered
Planned
Lectures
Taken
Planned
Tutorials/Discussions
Taken
Planned
Taken
Test/quizzes
CO's Addressed
CO's Achieved
Planned
Taken
Assignments
CO's Addressed
CO's Achieved
Signature of Faculty

13
 Year: I
Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

Head of the Department

A.M.R.C

PERIODIC MONITORING

Attainment of the Course (Learning) Outcomes:

Components Attainment level Action plan Remark

(AMC)
CO1:
CO2:
Assignment
CO3:
CO4:
CO1:
CO2:
Quiz/test
CO3:
CO4:
CO1:
CO2:
Mid Semester
CO3:
CO4:
CO1:
CO2:
End Semester
CO3:
CO4:
CO1:
CO2:
Any Other
CO3:
CO4:

Signature of HOD/ Dean Signature of Faculty

14
 Year: I
Semester: II

1. Name of the Faculty: Dr. Sushabhan Choudhury Course Code:

CSEG1032
2. Course : Computer Organization and Architecture L: 3
3. Program : B. Tech (CSE) T: 0
4. Target : Level 2
P: 0
C: 3

Units to be covered
6

Date Date

15
 Year: 2024 - 25

Semester: II

5. Name of the Faculty : Dr.Rajib Banerjee Course

Code: CSEG1032
6. Course : Computer Organization and Architecture L: 3
7. Program : B.Tech- CSE T: 0

Target : Level- 2
C: 3

INDIRECT ASSESSMENT

Sample format for Indirect Assessment of Course outcomes:

NAME:

ENROLLMENT NO:

SAP ID:

COURSE:

PROGRAM:

Please rate the following aspects of course outcomes of --------------------.

Use the scale 1-3*
course Statement 1 2 3
Outcomes

CO1

CO2

CO3

CO4

CO5

CO6

INSTRUCTIONS FOR FACULTY

16
 Year: 2024 - 25

Semester: II

5. Name of the Faculty : Dr.Rajib Banerjee Course

Code: CSEG1032
6. Course : Computer Organization and Architecture L: 3
7. Program : B.Tech- CSE T: 0

Target : Level- 2
C: 3

Instructions for faculty

 Faculty should keep track of the students with low attendance and counsel them regularly.
 Course coordinator will arrange to communicate the short attendance (as per UPES policy) cases
to the students and their parents monthly.
 Topics covered in each class should be recorded in the table of RECORD OF CLASS
TEACHING (Suggested Format).
 Internal assessment marks should be communicated to the students twice in a semester.
 The file will be audited by respective Academic Monitoring and Review Committee (AMRC)
members for theory as well as for lab as per AMRC schedule.
 The faculty is required to maintain these files for a period of at least three years.
 This register should be handed over to the head of department, whenever the faculty member goes
on long leave or leaves the Colleges/University.
 For labs, continuous evaluation format (break-up given in the guidelines for result preparation in
the same file) should be followed.
 Department should monitor the actual execution of the components of continuous lab evaluation
regularly.
 Instructor should maintain record of experiments conducted by the students in the lab weekly.
 Instructor should promote students for self-study and to make concept diary, due weightage in the
internal should be given under faculty assessment for the same.
 Course outcome assessment: To assess the fulfilment of course outcomes two different
approaches have been decided. Degree of fulfillment of course outcomes will be assessed in
different ways through direct assessment and indirect assessment. In Direct Assessment, it is
measured through quizzes, tests, assignment, Mid-term and/or End-term examinations. It is
suggested that each examination is designed in such a way that it can address one or two
outcomes (depending upon the course completion). Indirect assessment is done through the
student survey which needs to be designed by the faculty (sample format is given below) and it
shall be conducted towards the end of course completion. The evaluation of the achievement of
the Course Outcomes shall be done by analyzing the inputs received through Direct and Indirect
Assessments and then corrective actions suggested for further improvement.

CHECKLIST

Check list Course Outcomes Attainment (COA)

17
 Year: 2024 - 25

Semester: II

5. Name of the Faculty : Dr.Rajib Banerjee Course

Code: CSEG1032
6. Course : Computer Organization and Architecture L: 3
7. Program : B.Tech- CSE T: 0

Target : Level- 2
C: 3

Date of
Checke
SI.N Description Submissio Remarks
d
o n
1 Class Tests marks
2 Quiz marks
3 Assignment marks
4 Mid Semester Marks
5 End Semester Marks
6 Check in COA format
Whether respective CO of Class tests,
Quiz’s, Assignments, Mid and End semester
7 maximum marks entered or not
8 Ensure that all data got filled as per requirement
Copy of quiz paper with the model answer and
9 two/three answer sheets
10 Copies of all test papers with two/three answer sheets
Copies of all assignments with two or three model
11 assignments
12 Manual attendance sheet
13 Copy of faculty time table
14 Course Plan
15 Class Tests, Quiz and assignment marks as per COs
Copy of midterm examination paper and model
16 solution
Copy of end term examination paper and model
17 solution
18 List of minor/major project work given to the student
19 Detailed internal assessment sheet
Copy of final grade sheet (which was submitted to
20 SRE) must be attached at the end of semester
21 Copy of quiz /test conducted for lab
22 Rubrics wise marks in Lab ( Day to day evaluation

18
 Year: 2024 - 25

Semester: II

5. Name of the Faculty : Dr.Rajib Banerjee Course

Code: CSEG1032
6. Course : Computer Organization and Architecture L: 3
7. Program : B.Tech- CSE T: 0

Target : Level- 2
C: 3

sheet)
23 Copy of course attainment sheet (both pages)
24 Indirect Attainment Sheet

Signature of HOD/ Dean Signature of Faculty

Date Date

19
 Year: 2024 - 25

Semester: II

5. Name of the Faculty : Dr.Rajib Banerjee Course

Code: CSEG1032
6. Course : Computer Organization and Architecture L: 3
7. Program : B.Tech- CSE T: 0

Target : Level- 2
C: 3

Planning for Remedial Classes

Remedial Classes Held End

Sem
Sl. Name of Rol Sa Mid Date Class Improveme
Mark
N Student l p Sem test on nt
s
o. No. ID Mark Venu the
(Y/N)
s e basis of
Remedi
Time
al
Classes

Signature of HOD/ Dean Signature of Faculty

Date Date

20