Computer Organization and Architecture

UNIT – II
Microprogrammed Control
Prof. Murali Nath R S, Ms. Nagamani G & Ms. Kavitha P
Department of Computer Science & Engineering

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Why Should I Study thistocourse?
Topics be Covered

Examples
Control Memory

 Address Sequencing

 Microprogram Example

 Design of Control Unit

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Why Should I StudyControl
this course?
Memory
The control unit in a digital computer initiates sequences of
Examples
microoperations.
There are finite number of different types of microoperations in a given
system.
The number of sequences of microoperations that are performed
determines the complexity of the digital system.

In Hardwired Control Unit the control signals are generated by hardware

using conventional logic design techniques.
Microprogramming is an elegant and systematic method, is a second
alternative for designing the control unit of a digital computer.
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The control function that specifies a microoperation is a binary
variable or control variable.
- In one binary state, the corresponding microoperation is executed.
- The opposite binary state does not change the state of the registers in
the system.
- The active state may be either the 1 state or the 0 state, depending on
the application.

For Example, in a bus-organized system, the selection of the paths in

multiplexers, decoders, and arithmetic logic units is based on the control
signals (a group of bits) specifying microoperations.

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So, the control unit initiates a series of sequential steps of
microoperations.
But, at any given time, certain microoperations are to be initiated, while
others remain idle.
The control variables at any given time can be represented by a string of l's
and 0's called a control word.
Control words can be programmed to perform various operations on the
components of the system.
A control unit, in which binary control variables are stored in memory is
called a microprogrammed control unit.
Each word in control memory represents a microinstruction.
The microinstruction specifies one or more microoperations for the system.
A sequence of microinstructions constitutes a microprogram.
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Since alterations of the microprogram are not needed, the control
memory can be a read-only memory (ROM).
ROM words are made permanent during the hardware production of the
unit.
The use of a microprogram involves placing all control variables in
words of ROM for use by the control unit through successive read
operations.
The content of the word in ROM at a given address specifies a
microinstruction.
In dynamic microprogramming, a microprogram will be loaded initially
from an auxiliary memory such as a magnetic disk.
Control units that use dynamic microprogramming employ a writable
control memory, but is used mostly for reading.
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A computer that employs a microprogrammed control unit will have two
separate memories:
- Main Memory.
- Control Memory.

Main Memory:
- Available to the user for storing the programs, consisting of machine
instructions and data.
- The contents may alter when the data are manipulated and the program
is changed.

Control Memory:
- Holds a fixed microprogram that cannot be altered by the occasional
user.
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The microprogram consists of microinstructions that specify various
internal control signals for execution of register microoperations.

Each machine instruction initiates a series of microinstructions in control

memory.

These microinstructions generate the microoperations to:

- fetch the instruction from main memory
- evaluate the effective address
- execute the operation specified by the instruction
- return control to the fetch phase in order to repeat the cycle for the
next instruction

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The general configuration of a microprogrammed control unit is
demonstrated in the following block diagram:

- The control memory here is ROM, in which all control information is

permanently stored.
- The control (memory) address register (CAR) specifies the address of the
microinstruction.
- The control data register (CDR) holds the microinstruction read from the
memory.
- The microinstruction contains a control word, that specifies one or more
microoperations for the data processor
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- After the execution, the control must determine the next address through Next
Address Generator (Sequencer).
- The location of the next microinstruction may be the one next in sequence, or may
be located somewhere else in the control memory.
- So, a microinstruction contains bits for initiating microoperations in the data
processor part and bits that also determine the address sequence for the control
memory.
- The next address may also be a function of external input conditions.

Typical functions of a microprogram sequencer are:

 loading an initial address to start the control operations
 incrementing the control address register by one
 loading an address from control memory
 transferring an external address

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The CDR holds the present microinstruction while the next address is
computed and read from memory.
Because of this, the CDR is sometimes called as a pipeline register.

This configuration requires a two-phase clock:

- One clock applied to the address register.
- Second one to the data register.

The system can operate without the CDR by applying a single-phase clock to
the address register.
The control word and next-address information are taken directly from the
control memory.
The ROM operates as a combinational circuit, with the address value as the
input and the corresponding word as the output.
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The content of the specified word in ROM remains in the output wires as long
as its address value remains in the CAR.
No read signal is needed as in a random-access memory.

With the single phase clock, the CAR is the only component in the control system
that receives clock pulses.
The other two components, the sequencer and the control memory are
combinational circuits and do not need a clock.

The main advantage of the microprogrammed control is that once the hardware
configuration is established, there is no need for further hardware or wiring
changes.

To establish a different control sequence for the system, specify a different set of
microinstructions for control memory
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Why Should I Study this course?
Address Sequencing
Microinstructions are stored in control memory in groups, with each group as
aExamples
routine.
Each computer instruction has its own microprogram routine to generate the
corresponding microoperations.

The hardware controlling the address sequencing must be capable of:

- Sequencing the microinstructions within a routine.
- Able to branch from one routine to another.

Let us discuss the steps involved during the execution of a single computer
instruction.

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1. Fetch Routine:
As soon as the computer is on, an initial address, usually the address of the
instruction fetch routine, is loaded into the CAR
The fetch routine is sequenced by incrementing the control address register
through the rest of its microinstructions.
At the end of the fetch routine, the instruction is in the IR of the computer.

2. Effective Address Calculation Routine:

Next, the control memory must go through this routine, to determine the
effective address of the operand.
This routine can be reached through a branch microinstruction, based on the
status of the mode bits of the instruction.
After the completion of this routine, the address of the operand is available in
the memory address register (MAR).
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3. Execution Routine:
Depending on the operation code, the microoperation steps will be
generated.
Each instruction has its own microprogram routine stored in a given location
of control memory.
The transformation from the instruction code bits to an address of the routine
is referred to as a mapping process.

Once the required routine is reached, the microinstructions may be sequenced

by incrementing the CAR.
Sometimes, the sequence of microoperations will depend on values of certain
status bits in processor registers.
Microprograms that employ subroutines will require an external register for
storing the return address.
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4. Return to the Fetch Routine:
After the completion of execution, the control must return to the
fetch routine.
This is accomplished by executing an unconditional branch
microinstruction to the first address of the fetch routine.

The address sequencing capabilities required in a control memory are:

1. Incrementing of the control address register.
2. Unconditional branch or conditional branch, depending on status bit
conditions.
3. A mapping process from the bits of the instruction to an address for
control memory.
4. A facility for subroutine call and return.
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In the above block diagram of a control memory, the selection of the
next microinstruction address can happen in 4 ways:
- The incrementer increments the content of the CAR by one, to select
the next microinstruction in sequence.
- Branching is achieved by specifying the branch address in one of the
fields of the microinstruction.
- Conditional branching is obtained by using part of the
microinstruction to select a specific status bit in order to determine its
condition.
- An external address is transferred into control memory via a mapping
logic circuit.
- The return address for a subroutine from a special register used,
while returning from the subroutine.
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Why Should I Study this course?
Conditional Branching
The branch logic facilitates the decision-making capabilities in the
Examples
control unit.
The status conditions are special bits, providing information such as:
- Carry-out of an adder,
- Sign bit of a number,
- Mode bits of an instruction,
- Input or output status conditions.
Information in these bits can be tested, i.e., for either 0 or 1 and actions
initiated based on it.
The status bits and the field in the microinstruction specifying a branch
address, control the conditional branch decisions.
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The simplest way is to test the specified condition:
- if the condition is met, branch to the indicated address;
- otherwise, the address register is incremented.

Let us implement using a multiplexer by considering eight status bit

conditions in the system.
Three bits in the microinstruction are used to specify any one of eight
status bit conditions and provide the selection variables for the
multiplexer.
- A ‘1’ output in the multiplexer generates a control signal to transfer
the branch address from the microinstruction into the CAR.
- A ‘0’ output in the multiplexer causes the address register to be
incremented.
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An unconditional branch can be implemented by loading the branch
address from control memory into the CAR.

This can be accomplished by fixing the value of one status bit at the input
of the multiplexer, so it is always equal to 1.

A reference to this bit by the status bit select lines from control memory
causes the branch address to be loaded into the CAR unconditionally.

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Why Should I Study this course?
Mapping of Instruction
A special type of branching is used to transfer control to the first word of
aExamples
microprogram routine for an instruction.
The status bits for this type of branch are the bits in the operation code
part of the instruction.

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Here,
- An operation code of four bits is used to specify up to 16 distinct
instructions.
- The control memory has 128 words, requiring an address of seven bits,
from 0000000 to 1111111.
- For each operation code there exists a microprogram routine in control
memory that executes the instruction.
- This provides for each computer instruction a microprogram routine
with a capacity of four microinstructions.
- If the routine needs more than four microinstructions, it can use
addresses 1000000 through 1111111.
- If it uses fewer than four microinstructions, the unused memory
locations would be available for other routines.
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Implementation of Mapping in ROM:
Mapping concept can be extended to a more general mapping rule by
using a ROM to specify the mapping function.
In this configuration:
- The bits of the instruction specify the address of a mapping ROM.
- The contents of the mapping ROM give the bits for the CAR.

Advantages:
- The microprogram routine executing the instruction can be placed in
any desired location in control memory.
- The mapping concept provides flexibility for adding instructions for
control memory as the need arises.

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Implementation of Mapping using PLD:
The mapping function is sometimes implemented by means of an
integrated circuit called programmable logic device(PLD).
A PLD is similar to ROM, except that it uses AND and OR gates with
internal electronic fuses.
The interconnection between inputs, AND gates, OR gates, and outputs
can be programmed as in ROM.
A mapping function, expressed in terms of Boolean expressions can be
implemented conveniently with a PLD.

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Why Should I Study this course?
Subroutines
Subroutines are programs used by other routines to accomplish a
Examples task and can be called from any point.
particular
The identical sections of Microprograms can be saved as Subroutines.

Example: The sequence of microoperations for the effective address

generation of the operand for an instruction is common to all memory
reference instructions.
So, this sequence could be a subroutine and can be called from other
routines for effective address computation.

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Microprograms using subroutines must have a provision for:
- Storing the return address during a subroutine call.
- Restoring the address during a subroutine return.

This can be accomplished by:

- Placing the incremented output from the CAR into SBR.
- Branching to the beginning of the subroutine.
- SBR providing the return address to the main routine.

The best way to implement SBR as a register file, organizing the registers
in a last-in, first-out (LIFO) stack.

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Why Should I Study this course?
Microprogram Example
After the configuration of a computer and establishment of its
Examples
microprogrammed control unit, the designer's task is to generate the
microcode for the control memory.

This code generation is called microprogramming and is similar to

conventional machine language programming.

A simple digital computer is considered to show the process of

microprogramming.

The computer used here is similar but not identical to the basic computer.
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Why Should I Study this course?
Computer Configuration

Examples

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From the above block diagram it is observed that:
It consists of two memory units:
- Main memory for storing instructions and data.
- Control memory for storing the microprogram.

Four registers are associated with the processor unit:

- Program Counter PC.
- Address Register AR.
- Data Register DR.
- Accumulator register AC.
Two registers are associated with the control unit:
- Control Address Register CAR.
- Subroutine Register SBR.
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Multiplexers are used for the transfer of information among the
registers in the processor, instead of a common bus.

- DR can receive information from AC, PC, or memory.

- AR can receive information from PC or DR.
- PC can receive information only from AR.
- The arithmetic, logic, and shift unit performs microoperations with data
from AC and DR and places the result in AC.
- Memory receives its address from AR.
- Input data written to memory come from DR.
- Data read from memory can go only to DR.

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The computer instruction format is:

It consists of three fields:

- 1-bit field for indirect addressing symbolized by I.
- 4-bit operation code (opcode).
- 11-bit address field.

Four of the 16 possible memory-reference instructions:

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- ADD instruction adds the content of the operand found in the
effective address to the content of AC.
- BRANCH instruction causes a branch to the effective address if the
operand in AC is negative.
- STORE instruction transfers the content of AC into the memory word
specified by the effective address.
- EXCHANGE instruction swaps the data between AC and the memory
word specified by the effective address.

To make the microprogramming example simple, only four instructions,

considered here are microprogrammed.
The remaining 12 instructions can also be microprogrammed in a similar
manner.
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Why Should I Study this course?Format
Microinstruction
The microinstruction format for the control memory is:
Examples

The 20 bits of the microinstruction are divided into four functional parts:
- The three fields F1, F2, and F3 specify microoperations for the
computer.
- The CD field selects status bit conditions.
- The BR field specifies the type of branch to be used.
- The AD field contains a branch address.
- The address field is seven bits wide, since the control memory has
128 = 27 words.
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The microoperations are subdivided into three fields of three bits
each.
The three bits in each field are encoded to specify seven distinct
microoperations as:

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Why Should ISymbolic
Study thisMicroinstructions
course?
The microinstructions can be specified by using the symbols.
AExamples
symbolic microprogram can be translated into its binary equivalent
using an assembler, similar to conventional.
Each line of the assembly language microprogram defines a symbolic
microinstruction.
Each symbolic microinstruction is divided into five fields:
- Label.
- Microoperations.
- CD.
- BR.
- AD.
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The fields specify the following information:
1. The label field may be empty or it may specify a symbolic address. A label is
terminated with a colon (:).
2. The microoperations field consists of one, two, or three symbols, separated by
commas.
3. The CD field has one of the letters U, I, S, or Z.
4. The BR field contains one of the four symbols.
5. The AD field specifies a value for the address field of the microinstruction in one
of three possible ways:
a. With a symbolic address, appeared as a label.
b. With the symbol NEXT to designate the next address in sequence.
c. When the BR field contains a RET or MAP symbol, the AD field is left empty
and is converted to seven zeros by the assembler.

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The pseudoinstruction ORG is used to define the origin, or first
address, of a microprogram routine.

For example ORG 64 informs the assembler to place the next

microinstruction in control memory at decimal address 64, which is
equivalent to the binary address 1000000.

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Why Should I Study this
The course?
Fetch Routine
The control memory has 128 words, and each word contains 20 bits.
Examples
So, to microprogram the control memory, it is necessary to determine the
bit values of each of the 128 words.
The first 64 words (addresses 0 to 63) are occupied by the routines for
the 16 instructions, the remaining for any other purpose.
A convenient starting location for the fetch routine is address 64.

The microinstructions needed for the fetch routine are:

AR  PC
DR  M[AR], PC  PC + 1
AR  DR (0-10), CAR(2-5)  DR (l l-14), CAR(0, 1,6)  0
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The fetch routine needs three microinstructions, which are placed in
control memory at addresses 64, 65, and 66.
Using the assembly language conventions, the symbolic microprogram
for the fetch routine as follows:
ORG 64
FETCH: PCTAR U JMP NEXT
READ, INCPC U JMP NEXT
DRTAR U MAP

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Why Should I Study this course?
Symbolic Microprogram
The execution of the third (MAP) microinstruction in the fetch routine
Examples
results in a branch to address 0xxxx00, where xxxx are the four bits of
the operation code.
Example:
For ADD instruction with opcode is 0000, the MAP microinstruction will
transfer the address 0000000 to CAR, the start address for the ADD
routine in control memory.
Similarly, the first address for the BRANCH and STORE routines are 0
0001 00 (decimal 4) and 0 0010 00 (decimal 8), respectively.
The first address for the other 13 routines are at address values 12, 16,
20, …, 60, i.e., four words in control memory for each routine.
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In each routine, the microinstructions are required for:
- Evaluating the effective address.
- Executing the instruction.

As the indirect address mode is associated with all memory-reference

instructions, the microinstructions for the indirect address are stored as a
subroutine INDRCT and is located after the fetch routine.

The INDRCT subroutine has two microinstructions:

INDRCT: READ U JMP NEXT
DRTAR U RET
The partial Symbolic Microprogram with the ADD, BRANCH, STORE,
EXCHANGE, fetch and INDRCT is:
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Why Should I Study thisMicroprogram
Binary course?
The symbolic microprogram is a convenient form for writing
Examples
microprograms as it is easy to read and understand.
But the microprogram is not stored in memory as a symbolic form, but as
binary.
So, the symbolic microprogram must be translated to binary either by
means of an assembler program or by the user.

The equivalent binary form of the above symbolic microprogram is:

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Why Should I Study thisofcourse?
Design Control Unit
The bits of the microinstruction are divided into fields, with each field
Examplesa distinct, separate function.
defining
The various fields encountered in instruction formats provide:
- Control bits to initiate microoperations in the system.
- Special bits to specify the way that the next address is to be
evaluated.
- An address field for branching.

The number of control bits initiating microoperations can be reduced by

grouping mutually exclusive variables into fields.
So, encoding the k bits in each field provide 2k microoperations.
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The disadvantages are:
- Each field requires a decoder to produce the corresponding control
signals.
- So, requires additional hardware external to the control memory.
- Increases the delay time of the control signals as they must propagate
through the decoding circuits.

The nine bits of the microoperation field are divided into three subfields
of three bits each.
The control memory output of each subfield must be decoded to provide
the distinct microoperations.
The outputs of the decoders are connected to the appropriate inputs in the
processor unit.
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Why Should I Study this course?
Microprogram Sequencer
The basic components of a microprogrammed control unit are:
Examples
- Control Memory.
- Circuits selecting the next address.
The address selection part is called a microprogram sequencer.

A microprogram sequencer can be constructed with digital functions to

suit a particular/wide range of applications.

For this, an integrated circuit sequencer must provide an internal

organization that can be adapted to a wide range of applications.

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The purpose of a microprogram sequencer is to provide an address
to the control memory to read and execute a microinstruction.
The next-address logic of the sequencer determines the specific address
source to be loaded into the CAR.
The choice of the address source is guided by the next-address
information bits that the sequencer receives from the present
microinstruction.

Commercial sequencers include within the unit an internal register stack

used for temporary storage of addresses during microprogram looping
and subroutine calls.
Some sequencers provide an output register which can function as the
address register for the control memory.
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 Thank You

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