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ADC Assignment + Notes

The document is a question bank for the Analog and Digital Circuits course at Prof. Ram Meghe College of Engineering & Management for the Electrical Engineering program. It covers various topics across six units, including operational amplifiers, integrated circuits, oscillators, digital logic families, multiplexers, and sequential circuits. Each unit contains multiple questions aimed at assessing the understanding of key concepts and applications in electrical engineering.
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0% found this document useful (0 votes)
4 views

ADC Assignment + Notes

The document is a question bank for the Analog and Digital Circuits course at Prof. Ram Meghe College of Engineering & Management for the Electrical Engineering program. It covers various topics across six units, including operational amplifiers, integrated circuits, oscillators, digital logic families, multiplexers, and sequential circuits. Each unit contains multiple questions aimed at assessing the understanding of key concepts and applications in electrical engineering.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Prof.

Ram Meghe College of Engineering & Management, Badnera, Amravati


Electrical Engineering
Semester: IV Session 2024-25
Analog and Digital Circuits (4EE04)
Question Bank

Unit I

1. Explain Block diagram of Op-Amp and Specify role of each block.


2. Enlist the Parameters of Ideal Op-Amp. Also define i) Input Bias Current ii) Input offset
Current. OR
Explain the following parameters of Operational Amplifier 741
i) Common Mode Rejection Ratio (CMRR)
ii) Input Offset Voltage
iii) Input Resistance
iv) Output Offset Voltage
v) Slew Rate
vi) Large Signal Voltage Gain
vii) Supply Voltage Rejection Ratio (PSRR)
viii) UGB
ix) Thermal drift
3. Define Slew rate. What causes the slew rate? How is the slew rate measured?
4. Draw PIN diagram of IC741. Explain Function of Each Pin.
5. Explain how overload protection can be achieved in supplying Op-amp assembly.
6. Explain open loop frequency response of Op-Amp in details.
7. What is the need for level shifter in operational amplifier? OR
How does the Level Shifter stage affect the performance of an OP-Amp?
8. What are ideal characteristics of Op-Amp? Explain in Details.
9. What is offset voltage? How it is compensated in Op-Amp. Explain any one Method.
10. Explain Dominant pole frequency compensation technique in detail.
11. What is Integrated Circuit? Discuss in detail the classification of IC, advantages,
limitations and applications of IC.
12. Explain with neat diagram the dual input balanced output amplifier
13. Differentiate between Ideal and Practical Characteristics of Op-amp
14. Calculate the CMRR for an op-amp with V2=0.5V and V1 = 0.6V . The output voltage V0=10V
Unit 2

1. Explain the concept of virtual ground. Also derive the equation of gain for operation
amplifier in non inverting configuration and show that its closed loop gain is 1+Rf/R1. Also
explain functions of non inverting amplifier.
2. What is unity gain amplifier? Explain how it can be used to avoid the loading effect.
3. Discuss the operation of the following with their circuit and input output wave forms. a)
Positive clipper b) Negative clipper
4. How Op-Amp can be act as a clipper and Clamper.
5. Explain how operational amplifier can be used as averaging amplifier. Also derive the
equation of output voltage for an inverting averaging amplifier.
6. Draw the circuit differentiator using operational amplifier and derive the equation of
output voltage. Or
Explain operation amplifier as differentiator with output waveforms.
7. Draw the circuit for integrator using operational amplifier and derive its output equation
with waveforms. Or
Explain operational amplifier as integrator with output waveforms.
8. How voltage follower circuit used to avoid the loading effect? Explain the basic features of
voltage followers.
9. Draw an explain Wein bridge oscillator using operational amplifier. Or
With the help of neat circuit diagram design Wein bridge oscillator using operational
amplifier to generate 1 KHz sinusoidal signal.
10. Draw and explain the operation of sinusoidal RC- phase shift oscillator using operational
amplifier. Or
Explain RC-phase shift oscillator. How can we fulfil the Barkhausen's criteria?
11. Explain about non inverting and inverting based comparator. List the important feature of
comparator.
12. Give the comparison between differentiator and integrator operational amplifier
13. Explain the operation of operation amplifier as a difference amplifier. Also derive the
equation for its output voltage. OR
14. Explain how transistor is used as differential amplifier in operational amplifier.
15. In an inverting amplifier, Let Rf = 100 kΩ, R1=10 kΩ and Vin=1V. Calculate the following
1. Input Current I
2. Output Voltage Vo
3. Closed Loop Gain Av
4. Feedback Current If
Unit 3

1. State the function of Each Pin of IC 555.


2. Draw and explain the block diagram of phase locked loop system.
OR
Explain PLL as a frequency multiplier.
3. Explain block Schematic / diagram of IC 723
4. Explain in detail the fixed voltage regulators
5. Explain current boosting of IC723 regulator using external transistor.
6. Design a high voltage regulator using IC723 and output voltage 9V and output current
100mA.
7. Draw and explain the IC 555-based monostable multivibrator to achieve output pulse of
10 ms with 9 v amplitude.
8. Explain working operation of mono stable multivibrator using Ic 555 with neat circuit
diagram. Draw it Input and o/p voltage waveforms.
9. Design an astable multi-vibrator having an output frequency of 10kHz with a duty cycle of
25%
10. What is the advantage of SMPS over linear regulators? Draw the block diagram of SMPS
and explain
11. Design divided by 2 circuit using IC 555 for the input trigger frequency of 1kHz- Draw the
circuit diagram and its input and output waveforms.
12. Explain the operation of series Op- Amp. regulator with neat circuit diagram.
13. What is high voltage and low voltage regulator using IC 723? Design a voltage regulator
which meets these requirements i) Vo=5V Io=200mA Vi=20V Isc=300mA Vsence=0.7
14. Design a Low Voltage Low Current regulator using IC 723 for the specifications
mentioned below
1. Output Voltage Vo= 5V
2. Output Current Io= 100mA
3. Short Circuit Current Isc= 200mA
4. Assume Vsense= 0.5V
15. Draw and explain the block diagram of regulated power supply.
Unit 4

1. Explain working of 2,3,4 input CMOS NAND gate. (MIMP)


2. Explain in brief inverter using NMOS and CMOS.
3. Draw and explain CMOS NAND and NOR gate.
4. Explain with circuit diagram and waveform BJT as inverter.
5. Explain ECL Circuit with diagram? Why ECL is Fastest logic family? Explain.
6. Compare TTL logic family with CMOS logic family in terms of advantages and
disadvantages
7. Explain circuit diagram and waveform of BJT as an inverter.
8. Explain TTL Logic family in details.
9. Explain the operation of CMOS inverter.
10. What are the advantages of CMOS gate over NMOS gate?
11. Explain the use of Totem pole output driver. How is it employed in TTL gate?
12. Explain the operation of RTL NAND and NOR gate with neat diagram.
13. compare difference between TTL Logic family and ECL logic family.
14. What is Propagation delay in Digital ICs? Explain it with neat diagram.
15. Explain the following characteristics of digital ICs:
1. Noise immunity
2. Fan out
3. Speed of operation
4. Power dissipation
16. Explain the Ex-OR and Ex-NOR logic gates with its truth table
17. Draw 3 input TTL NAND gate and verify its truth table and operation for input (111)2 What
will happen if its input terminals are kept floating without any input?
18. Explain with circuit diagram the working of 2 input TTL NOR and OR gate with open
collector output.
Unit 5

1. Implement half adder and full adder by NAND gate only. (S2023) (W2023) (S2022)
2. Explain half adder and full adder with truth table.
3. Explain how full adder can be implemented using half adder. (S2024)
4. What is digital comparator? Explain with suitable example. (S2024)
5. Explain even parity generator and odd parity generator with truth table. (S2024)
6. What is difference between parity generator and parity checker?
7. Explain 8:1 MUX. Implement 32:1 MUX using 8:1 MUX and suitable hardware. (W22) (S22)
8. Implement 16:1 MUX using 4:1 MUX only
9. Implement the following expression using multiplexer. (S2024)
i) R1 (A,B,C,D) =m(0,2,3,6,8,9,12)
ii) R2 (A,B,C,D) =m(1,4,7,10,11,14)
10. Implement the expression using 8:1 MUX.(S2023) i) f(A,B,C,D) =m(1,3,8,10,13,15).
11. What is encoder? Explain the priority encoder in detail.(S2023)
OR
What do you mean by encoder? What are the types of encoders? Explain 4:2 line Encoder
in details.
12. Explain BCD to decimal decoder with the help of truth table.(S2023)
13. Draw and Explain 2 to 4 decoder circuit with the help of its truth table.
14. What is ROM? Explain any three applications if ROM in brief. (W2022) (S2022)
15. Compare and contrast ROM,PROM and EPROM
16. Give the comparison between PLA and PAL.(W2022)
17. Design 5-bit comparator using logic gates.
Unit 6

1. What are sequential circuits? Explain with block diagram.


2. Explain the conversion of JK-FF to D-FF. (S-24)
3. What is flip flop. Convert SR flip flop to JK flip flop. (W-23)
4. Explain the conversion of SR-FF to T-FF.(W-24)
5. Explain working of 4-bit bidirectional shift register using D Flip flop. (S-24)
6. Design 3-bit synchronous counter using JK-FF. (S-24
7. Design 2-bit decade up counter using JK flip flop.
Or
Design a decade counter using suitable flip flop. What is synchronous preset and clear
input. What is their role.
8. Draw the timing diagram of 4-bit asynchronous up counter and explain it. (W-24)
9. Design and implement mod 6 asynchronous counter using T Flip Flop. (S-23)
10. Design and Implement Mod 8: Synchronous counter using JK flip flop.
11. What is Counter? Explain the types of counters. Also explain the design steps of
synchronous counter. (W-24)
12. Explain the operation of Master slave JK Flip Flop with neat diagram. (W-24)
OR
Explain the operation of Master slave JK Flip Flop using NAND gate only.
13. What is race around condition in JK flip flop. What is the remedy for it.
14. Draw and explain negative edge triggered D and T-FF

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