MAHARANA PRATAP GROUP OF INSTITUTIONS

KOTHI MANDHANA, KANPUR

(Approved by AICTE, New Delhi and Affiliated to Dr.AKTU, Lucknow )

Digital Notes
[Department of Electronics & Communication Engineering]
Subject Name : Emerging Domain in Electronics Engg.
Subject Code : BEC101/201
Course : B. Tech
Branch : COMMON BRANCH
Semester : 1st/2nd
Prepared by : Mr. SUSHIL KUSHWAHA

Reference No.: EC/SK/BEC101/201/1/1

1
4.1 DATA REPRESENTATION
The signals are broadly classify into two categories;
1) Analog Signals 2). Digital Signals
1) ANALOG SIGNALS
These are the signals which can have infinite number of different magnitudes or values. They vary
continuously with time. Example: Sine wave, triangular wave etc.
2) DIGITAL SIGNALS
These are the signals which have finite number of predetermined distinct magnitudes. The digital
signals are discrete time signals. Depending on the number of distinct magnitudes, the digital
signals are classified as follows.
NUMBER OF DISTINCT MAGNITUDES TYPES OF DIGITAL SIGNAL
2 Binary
8 Octal
16 Hexadecimal

Fig. 4.1 (a) Analog signal (b) Digital signal

4.2 NUMBER SYSTEMS

A number system defines a set of values used to represent quantity.
1.2.1 BASE OR RADIX
a) The number of values that a digit (one character) can assume is equal to the base of the system. It
is also called as the Radix of the system. It is denoted "r".
Example: For a decimal system, the base is "10" hence every digit can assume 10 values.
(0, 1. 2, ...................... 9).
b) The largest value of a digit is always one less than the base
Example: The largest digit in a decimal system is 9. (One less than the base 10)

2
 NUMBER SYSTEMS

DECIMAL SYSTEM BINARY SYSTEM OCTAL SYSTEM HEXADECIMAL SYSTEM

0 0 0 0
1 1 1 1
2 2 2
3 BASE (RADIX) 3 3
4 r=2 4 4
5 5 5
6 6 6
7 7 7
8 8
9 BASE (RADIX) 9
r= 8 A
BASE (RADIX) B
r=10 C
D
E
F

BASE (RADIX)
r=16

3
4.3 CONVERSION OF BASES
4.3.1 BINARY TO DECIMAL CONVERSION
(10111)2 → ( )10
(10111) 2 = 1x24 + 0x23 + 1x22 + 1x21 + 1x20 = 23 (10111) 2 = (23)10

(110111)2 → ( )10
(110111) 2 = 1x25 + 1x24 + 0x23 + 1x22 + 1x21 + 1x20 = 55 (110111) 2 = (55)10

(1011. 011)2 → ( )10

Integer Conversion
(1011) 2 = 1x23 + 0x22 + 1x21 + 1x20 = 11
(1011) 2 = (11)10
Fraction Conversion
(0.011) 2 = 0x2-1 + 1x2-2 + 1x2-3
(0.011) 2 = (0.375)10 (1011. 011)2 → (11.375)10

(11010. 10011)2 → ( )10

Integer Conversion
(11010) 2 = 1x24 + 1x23 + 0x22 + 1x21 + 0x20 = 26
(11010) 2 = (26)10
Fraction Conversion
(0.10011) 2 = 1x2-1 + 0x2-2 + 0x2-3 + 1x2-4 + 0x2-5 = 0.59375
(0.10011) 2 = (0.59375)10 (11010.10011)2 = (26.59375) 10

(10101.0101)2 → ( )10
Integer Conversion
(10101) 2 = 1x24 + 0x23 + 1x22 + 0x21 + 1x20 = 21
(10101) 2 = (21)10
Fraction Conversion
(0. 0101) 2 = 0x2-1 + 1x2-2 + 0x2-3 + 1x2-4 = 0.3125
(0. 0101) 2 = (0.3125)10 (10101. 0101)2 = (21.3125) 10

4.3.2 OCTAL TO DECIMAL CONVERSION

(1051)8 → ( )10
4
 (1051)8 = 1x83 + 0x82 + 5x81 + 1x80 = 553 (1051)8 = (553)10

(1534)8 → ( )10
(1534)8 = 1x83 + 5x82 + 3x81 + 4x80 = 860 (1534)8 = (860)10

(532.125)8 → ( )10
(532.125)8 = 5x82 + 3x81 + 2x80 + 1x8-1 + 2x8-2+ 5x8-3 = 346.166015625
(532.125)8 → (346.166015625)10

4.3.3 HEXADECIMAL TO DECIMAL CONVERSION

(A13B)16 → ( )10
(A13B)16 = 10x163 + 1x162 + 3x161 + 11x160 = 41275 (A13B)16 = (41275)10

(7CA3)16 → ( )10
(7CA3) 16 = 7x163 + 12x162 + 10x161 + 3x160 = 31907 (7CA3)16 = (31907)10

(7FD6)16 → ( )10
(7FD6) 16 = 7x163 + 15x162 + 13x161 + 6x160 = 32726 (7FD6)16 = (32726)10

(4C8.2)16 → ( )10
(4C8.2) 16 = 4x162 + 12x161 + 8x160 + 2x16-1 = 1224.125 (4C8.2)16 → (1224.125)10

4.3.4 DECIMAL TO BINARY CONVERSION

(105)10 → ( )2 (174)10 → ( )2

2 105 LSB 2 174

2 52 1 2 87 0 LSB

2 26 0 2 43 1
2 13 0 2 21 1
2 6 1 2 10 1
MSB
2 3 0 2 5 0
MSB
2 1 1 2 2 1
0 1 2 1 0
0 1
(105)10 = (1101001)2
(174)10 = (10101110)2

5
(85.63)10 → ( )2

2 85 LSB MSB

2 42 1 0.63 x 2 = 1.26 1

2 21 0
0.26 x 2 = 0.52 0
2 10 1
2 5 0 0.52 x 2 = 1.04 1
MSB LSB
2 2 1
0.04 x 2 = 0.08 0
2 1 0
0 1 0.08 x 2 = 0.16 0

(85)10 = (1010101)2 (0.63)10 = (0.10100)2 (85.63)10 = (1010101. 10100)2

(41.6875)10 → ( )2

2 41 LSB MSB
0.6875x2=1.375 1
2 20 1
2 10 0
0.375x2 = 0.75 0
2 5 0
2 2 1 0.75x2 = 1.5 1
MSB
2 1 0
0.5x2 = 1.0 1
0 1
LSB
(41)10 = (101001)2 (0.6875)10=(0.1011)2
(41.6875)10 = (101001. 1011)2
(1010.101)10 → ( )2

2 1010
LSB MSB
0.101x2 = 0.202 0
2 505 0

2 252 1
0.202x2 = 0.404 0
2 126 0

2 63 0 0.404x2 = 0.808 0

2 31 1
0.808x2 = 1.616 1
2 15 1
MSB
2 7 1 LSB

2 3 1
2 1 1
0 1

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(1010)10 = (1111110010)2 (0.101)10 = (0.0001)2 (1010.101)10 → (1111110010.101)2

4.3.5 DECIMAL TO OCTAL CONVERSION

(570)10 → ( )8 (6260)10 → ( )8

8 570 LSB 8 6260

LSB
8 71 2 8 782 4
8 8 7 8 97 6
MSB
8 1 0 8 12 1 MSB
0 1 8 1 4
0 1

(570)10 = (1072)8 (6260)10 = (14164)8

(3000.45)10 → ( )8

8 3000 LSB MSB

8 375 0 0.45 x 8 = 3.60 3

8 46 7
0.60 x 8 = 4.80 4
MSB
8 5 6
0 5 0.80 x 8 = 6.40 6

0.40 x 8 = 3.20
LSB3

(3000)10 = (5670)8 (0.45)10 = (0.3463)8 (3000.45)10 = (5670.3463)8

(749.25)10 → ( )8

8 749 LSB

8 93 5 0.25 x 8 = 2.00 2

8 11 5
MSB
8 1 3
0 1

(749)10 = (1355)8 (0.25)10 = (0.2)8 (749.25)10 = (1355.2)8

7
(225.225)10 → ( )8

8 225 LSB 0.225x8 = 1.8 1 MSB

8 28 1
8 3 4 0.8x8 = 6.4 6
MSB
8 0 3
0.4x8 = 3.2 3

0.2x8 = 1.6 1

0.6x8 = 4.8 4 LSB

(225)10 = (341)8 (0.225)10 = (0.16314)8 (225.225)10 = (341.16314)8

(6089.25)10 → ( )8

8 6089
LSB

8 761 1
0.25 x 8 = 2.00 2
8 95 1
8 11 7 MSB
8 1 3
0 1

(6089)10 = (13711)8 (0.25)10 = (0.2)8 (6089.25)10 → (13711.2)8

4.3.6 DECIMAL TO HEXADECIMAL CONVERSION

(259)10 → ( )16 (6260)10 → ( )16

16 259 LSB 16 6260

LSB
16 16 3 16 391 4
16 1 0 16 24 7
MSB
8 0 1 16 1 8 MSB
0 1

8
(259)10 = (103)16 (6260)10 = (1874)16

(2003.31)10 → ( )16

16 2003 LSB
MSB
16 125 3 0.31 x 16 = 4.96 4

16 7 13 D F
0.96 x 16 = 15.36 15
0 7 MSB

0.36 x 16 = 5.76 5

0.76 x 16 = 12.16 12 C

(2003)10 = (7D3)16 0.16 x 16 = 02.56 2

LSB

(0.31)10 = (0.4F5C2)16 (2003. 31)10 = (7D3. 4F5C2)16

(479.25)10 → ( )16

16 479 LSB

16 29 15 F 0.25 x 16 = 4.00 4

16 1 13 D
0 1 MSB

(479)10 = (1DF)16 (0.25)10 = (0.4)16 (749.25)10 = (1DF.4)16

(225.225)10 → ( )16

16 225 LSB MSB

16 14 1 0.225 x 16 = 3.6 3

16 0 14 E MSB
0.6 x 16 = 9.6 9 LSB

(225)10 = (E1)16 (0.225)10 = (0.39)16 (225.225)10 → (E1.39)16

9
(3315.3)10 → ( )16

16 3315 LSB
MSB
16 207 3 0.3 x 16 = 4.8 4

16 12 15 F C
0.8 x 16 = 12.8 12
0 12 C MSB
C LSB
0.8 x 16 = 12.8 12
.
.
(3315)10 = (CF3)16 (0.3)10 = (0.4CC)16 (3315.3)10 → (CF3.4CC)16

4.3.7 OCTAL TO BINARY CONVERSION

(436)8 → ( )2
4 3 6

(436)8 = (100 011 110)2

100 011 110

(25.26)8 → ( )2
2 5 . 2 6

(25.26)8 = (010101.010110)2
010 101 010 110

4.3.8 BINARY TO OCTAL CONVERSION

(10011111)2 → ( )8
010 011 111

2 3 7

(10011111)2 = (237)8
(1010101.11101)2 → ( )8
001 010 101 . 111 010

1 2 5 . 7 2

(1010101.11101)2 = (125.72)8

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4.3.9 HEXADECIMAL TO BINARY CONVERSION
(68.4B)16 → ( )2
6 8 . 4 B

0110 1000 . 0100 1011 (68.4B)16 = (1101000.01001011)2

(A3FD.32C)16 → ( )2
A 3 F D . 3 2 C

.
1010 0011 1111 1101 0011 0010 1100 (A3FD.32C)16 = (1010001111111101. 001100101100)2

4.3.10 BINARY TO HEXADECIMAL CONVERSION

(111010110.0100101101)2 → ( )16
0001 1101 0110 . 0100 1011 0100

1 D 6 . 4 B 4 (111010110.0100101101)2 = (1D6.4B4)16

(1110111001.1011101)2 → ( )16

0011 1011 1001 . 1011 1010

3 B 9 . B A (1110111001.1011101)2 = (3B9.BA)16

4.3.11 HEXADECIMAL TO OCTAL CONVERSION

(39C.A3)16 → ( )8
3 9 C . A 3

0011 1001 1100 . 1010 0011 (39C.A3)16 = (1110011100.10100011)2

001 110 011 100 . 101 000 110

1 6 3 4 . 5 0 6 (1110011100.10100011)2 = (1634.506)8

(39C.A3)16 = (1634.506)8
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(68.4B)16 → ( )8
6 8 . 4 B

0110 1000 . 0100 . 1011 (68.4B)16 = (01101000. 01001011)2

001 101 000 . 010 010 110

1 5 0 . 2 2 6 (01101000. 01001011)2 = (150.226)8

(68.4B)16 = (150.226)8

Determine the value of x?

(211)x → (152)8 (193)x → (623)8
(211)x = (152)8 (193)x = (923)8
2 x 𝑥 2 + 1 x 𝑥 1 + 1 x 𝑥 0 = 1 x 82 + 5 x 81 + 2 x 80 1 x 𝑥 2 + 9 x 𝑥 1 + 3 x 𝑥 0 = 6 x 82 + 2 x 81 + 3 x 80
2𝑥 2 + 𝑥 + 1 = 64 + 40 + 2 𝑥 2 + 9𝑥 + 3 = 384 + 16 + 3
2𝑥 2 + 𝑥 + 1 = 106 𝑥 2 + 9𝑥 + 3 = 403
2𝑥 2 + 𝑥 − 105 = 0 𝑥 2 + 9𝑥 − 400 = 0
𝑥 = −7.5, 7 𝑥 = −25, 16
Base cannot be negative or in fraction so; Base cannot be negative so;
𝑥=7 𝑥 = 16
(211)7 → (152)8 (193)16 → (923)8

4.4 ARITHEMATIC
Binary addition
1011 11110 110101 10111010 10100
110 11 100100 101001 101001
10001 100001 1011001 11100011 111101

Binary Subtraction
100 1110 1001111
−01 −101 −101
11 1001 1001010

Octal addition
32 7571 7461
67 4176 3465
121 13767 13146
12
Octal subtraction
62 7571 7461
−35 −4176 −3465

Hexadecimal addition
23 6E 58 93 ABCD A6C.DF A4F.EF 4F3A A4FB
16 34 22 DE EF12 1DE.9A 3FD.AB 23C1 3FDC

Hexadecimal Subtraction
84 7001 FA12.35 4F3A A4FB
−2A −5763 −9BCD.EF −23C1 −3FDC

OTHER BASE
(6488.43)9 + (3837.78)9 (432)5 + (013)5 (432)5 − (013)5
6488.43 432 432
3837.78 013 − 013
11437.32 1000 414

DO FOLLOWING ADDITIONS
a) (1011011)2 + (10001.001)2
b) (7571)8 + (4176)8
c) (4F3A)H + (23C1)H
d) (93)H + (DE)H
e) (ABCD)H+(EF12)H
f) (1704.34)8 + (47706.12)8
g) (1A0F11.06)H + (FFB0D.00A)H
h) (125.04)6 + (1003.02)6
i) (A4F.EF)16 + (3FD.AB)16

DO FOLLOWING SUBTRACTIONS
a) (11000.001)2 – (10111.111)2
b) (1001.11)2 – (1111.01)2
c) (7571)8 –(4176)8
d) (6488.43)9 – (3837.78)9
e) (FA12.35)16 – (9BCD.EF)16
f) (7001)8 – (5763)8

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 Decimal Binary Signed Magnitude 1’s Complement 2’s Complement
1 00001 00001 00001 00001
-1 10001 11110 11111
2 00010 00010 00010 00010
-2 10010 11101 11110
5 00101 00101 00101 00101
-5 10101 11010 11011
12 01100 01100 01100 01100
-12 11100 10011 10100
18 010010 010010 010010 010010
-18 110010 101101 101110
0 00000 00000 00000 00000
-0 10000 11111 00000 (Advantage)

Note :
 In 2’s complement ‘-0’ and ‘+0’ are same (Advantage)
 In sign magnitude and 1’s complement ‘-0’ and ‘+0’ are not same (Disadvantage)

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4.6 BOOLEAN (BINARY) ALGEBRA
1. Boolean algebra is used to analyze and simplify the digital (logic) circuits.
2. Since it uses only the binary numbers i.e. 0 and 1 it is also called as "Binary Algebra.
3. It was invented by George Boole in the year 1854.
4. The rules of Boolean algebra are different from those of the conventional Algebra in the following
manner:
a) Symbols used in Boolean algebra (usually letters) do not represent numerical values.
b) Arithmetic operations (addition, subtraction, division etc.) are not performed in Boolean algebra.
c) Boolean algebra allows only two possible values ("0" to "1") for any variable.
d) Complement of a variable is represented by a over bar. Thus complement of variable B is
represented as 𝐁. Thus if B = 0 then 𝐁 = 1 and if B = 1 then 𝐁 = 0.

BOOLEAN LAWS Sr. No. Name Statement of the law

A•B=B•A
1. Commutative Law
A+B=B+A
(A • B) • C = A • (B • C)
2. Associative Law
(A + B) + C = A + ( B + C)
3. Distributive Law A • (B + C) = AB + AC
A•0 = 0
A•1= A
4. AND Laws
A•A=A
A•𝐀=0
A+0=A
A+1=1
5. OR Laws
A+A = A
A + 𝐀= 1
6. Inversion Law 𝐀=A
A + BC = (A + B) (A + C)
Other Important 𝐀 + AB = 𝐀 + B
7. Laws 𝐀 + A𝐁 = 𝐀 + 𝐁
A + AB = A
A + 𝐀B = A + B

For the simplification of Boolean equations following additional rules are used.
1. A + AB = A
15
2. A + 𝐀 B = A + B
3. (A + B ) ( A + C) = A + BC
PROOF
1. A + AB = A 2. 𝐀 + 𝐀 B = A + B
LHS = A + AB LHS = 𝐀 + 𝐴 B Substitute A = A + AB
= A(1+B) But 1 + B = 1 = (A + AB) +A B
=A . 1 Since A . 1 = A = A + B ( A + A) But A + A = 1
=A = A + B.(1)
= RHS =A + B
∴ A+AB=A Hence proved = RHS
∴ A+AB = A + B Hence proved
3. (A + B)(A + C) = A + BC LHS = (A + B) (A + C )
= A.A + A.C + B.A + B.C But A . A = A and B . A = A . B
= A + AC + AB + BC But A + AB = A
= A + AC + BC
= A ( 1 + C) + BC But 1+ C = 1
= A + BC
∴ (A + B)(A + C) = A + BC Hence proved

4.7 DE MORGAN'S THEOREMS

THEOREM (1)
This theorem states that:

The complement of a product is equal to addition of the complements

𝐀𝐁 = 𝐀 + 𝐁

Verification:
This theorem can be verified by writing a truth table:
A B 𝐀𝐁 𝐀 𝐁 𝐀+𝐁
0 0 1 1 1 1
0 1 1 1 0 1
1 0 1 0 1 1
1 1 0 0 0 0

𝐀𝐁 = 𝐀 + 𝐁
16
THEOREM (2)
This theorem states that:

The complement of a sum is equal to product of the complements

𝐀+𝐁=𝐀.𝐁

Verification:
This theorem can be verified by writing a truth table:

A B 𝐀+𝐁 A B 𝐀. 𝐁
0 0 1 1 1 1
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 0

𝐀+𝐁=𝐀.𝐁

17
4.8 LOGIC GATES
Logic gates are the basic building blocks of any digital system. It is an electronics circuit having one or
more than one inputs and only one output.
4.8.1 TRUTH TABLE
The operation of a logic gate can be best understood with the help of a table called “Truth Table”. The
truth table consists of all the possible combinations of the inputs and the corresponding state of
output of a logic gate.
BOOLEAN EXPRESSION
The relation between the inputs and outputs of a gate can be expressed mathematically by means of
the Boolean Expression.

4.8.2 CLASSIFICATION OF LOGIC GATES

The logic gates are classified into three main categories namely, the basic gates, the universal gates
and the special purpose gates (Derived gates).

LOGIC GATES

BASIC GATES UNIVERSAL GATES SPECIAL PURPOSE GATES

AND GATE NAND GATE EX-OR GATE

OR GATE NOR GATE EX-NOR GATE

NOT GATE

NOT GATE
A Y=𝐀

A Y=𝐀 0 1
TRUTH TABLE
1 0

The NOT gate is an electronic circuit that produces an inverted version of the input at its output. It is
also known as an inverter. This is also shown as A', or A with a bar over the top, as shown at the
outputs.

18
OR GATE

The OR gate is an electronic circuit that gives a high output (1) if one or more of its inputs are high.
A plus (+) is used to show the OR operation.

AND GATE

The AND gate is an electronic circuit that gives a high output (1) only if all its inputs are high.
A dot (.) is used to show the AND operation.

NAND GATE A B 𝐀𝐁
A 0 0 1
Y=𝐀𝐁
B 0 1 1
1 0 1
TRUTH TABLE
1 1 0

This gate is equal to an AND gate followed by a NOT gate. The outputs of all NAND gates are high if
any of the inputs are low. The symbol is an AND gate with a small circle on the output. The small
circle represents inversion.

NOR GATE A B 𝐀+𝐁

A 0 0 1
Y=𝐀 + 𝐁 0 1 0
B 1 0 0
TRUTH TABLE
1 1 0

19
This gate is equal to an OR gate followed by a NOT gate. The outputs of all NOR gates are low if any of
the inputs are high. The symbol is an OR gate with a small circle on the output. The small circle
represents inversion.
A B A𝐁 + 𝐁𝐀
EX-OR GATE
A Y=𝐀𝐁+𝐁𝐀 0 0 0
OR
0 1 1
B Y=𝐀⨁𝐁
1 0 1
TRUTH TABLE
1 1 0

The 'Exclusive-OR' gate is a circuit which will give a high output if either, but not both, of its two
inputs are high. An encircled plus sign (⨁) is used to show the EX-OR operation.

EX-NOR GATE A B A𝐁 + 𝐀𝐁
0 0 1
A Y=A𝐁 + 𝐀𝐁
OR 0 1 0
Y=𝐀⨀𝐁
B 1 0 0 TRUTH TABLE
1 1 1

The 'Exclusive-NOR' gate is a circuit which will give a low output if either, but not both, of its two
inputs are high. The symbol is an EX-OR gate with a small circle on the output. The small circle
represents inversion.

4.8.3 UNIVERSAL GATES

1. The NAND and NOR gates are called as “Universal Gates” because it is possible to implement any
Boolean expression or any of the logic gates with the help of only NAND or only NOR gates.
2. Hence a user can build any combinational circuit with the help of only NAND or only NOR gates.
3. This is a great advantage because a user will have to make a stock of only NAND or only NOR gate
IC’s

20
4.8.4 CONSTRUCTION OF LOGIC GATES BY USING UNIVERSAL GATES
BY USING NAND GATE ONLY
A
Y=𝐀𝐁 NAND GATE
B

NOT GATE USING NAND GATE ONLY

O/P of NOT gate 𝐘 = 𝐀
Output Y = AB
= AA (∵ A = B)

𝐘=𝐀

AND GATE USING NAND GATE ONLY

O/P of AND gate 𝐘 = 𝐀𝐁
Output Y = AB
= AB

𝐘 = 𝐀𝐁

OR GATE USING NAND GATE ONLY

O/P of OR gate 𝐘 = 𝐀 + 𝐁

Output Y = A + B
= A+B
= A. B

𝐘 =𝐀+𝐁

EX-OR GATE USING NAND GATE ONLY

O/P of EX-OR gate 𝐘 = 𝐀⨁𝐁 = 𝐀𝐁+𝐁𝐀

Output Y = ((A + B).(B + A))′

= (A + B)’ + (B + A)′
= AB’ + A’B

𝐘 = 𝐀𝐁+𝐁𝐀

EX-NOR GATE USING NAND GATE ONLY

O/P of EX-NOR gate 𝐘 = 𝐀⨀𝐁 = 𝐀𝐁 + 𝐀𝐁

21
 Output Y = (AB’ + A’B)’
= AB + AB

𝐘 = 𝐀𝐁 + 𝐀𝐁

NOR GATE USING NAND GATE ONLY

O/P of NOR gate 𝐘 = 𝐀 + 𝐁

Output Y = A + B
= A. B

= A. B

𝐘=𝐀+𝐁

BY USING NOR GATE ONLY A

Y=𝐀 + 𝐁
NOR GATE B

NOT GATE USING NOR GATE ONLY

O/P of NOT gate 𝐘 = 𝐀
Output Y = A + B
= A+A

𝐘=𝐀

AND GATE USING NOR GATE ONLY

O/P of AND gate 𝐘 = 𝐀𝐁
Output Y = AB
= AB
= A+B

𝐘 = 𝐀𝐁

OR GATE USING NOR GATE ONLY

O/P of OR gate 𝐘 = 𝐀 + 𝐁

Output Y = A + B
= A+B

22
 𝐘 =𝐀+𝐁

EX-NOR GATE USING NOR GATE ONLY

O/P of EX-NOR gate 𝐘 = 𝐀⨀𝐁 = 𝐀𝐁 + 𝐀𝐁

Output Y = AB + AB
= AB + BA

= AB + BA

= A+B + B+A

= A+B + B+A

𝐘 = 𝐀𝐁 + 𝐀𝐁

EX-OR GATE USING NOR GATE ONLY

O/P of EX-OR gate 𝐘 = 𝐀⨁𝐁 = 𝐀𝐁+𝐁𝐀

Output Y = (AB + AB)′

=
𝐘 = 𝐀𝐁+𝐁𝐀

NAND GATE USING NOR GATE ONLY

O/P of NAND gate 𝐘 = 𝐀𝐁
Output Y = AB
= A+B

= A+B

𝐘 = 𝐀𝐁

23
REALIZE THE EXPRESSION 𝐘 = 𝐀𝐁 + 𝐂𝐃 USING
a) NAND GATE ONLY
b) NOR GATE ONLY
a) NAND GATE ONLY
𝐘 = 𝐀𝐁 + 𝐂𝐃

b) NOR GATE ONLY

𝐘 = 𝐀𝐁 + 𝐂𝐃

24
4.8 K-MAP (KARNAUGH-MAP)
We can simplify the logical expression with the help of Karnaugh-map (K-map).
4.8.1 SOP & POS REPRESENTATIONS FOR LOGIC EXPRESSIONS
Any logical expression can be expressed in the following two standard forms:
1. Sum-of-products (SOP)
2. Products-of-sum (POS)

1. SUM-OF-PRODUCTS (SOP)
Here the logic expression Y=AB+𝐀𝐂+𝐁𝐂 is in the form
of sum of three terms AB, 𝐀C and 𝐁𝐂 with each
individual term is product of two variables. Therefore
such expressions are known as expression in SOP form.

2. PRODUCT OF THE SUMS FORM (POS)

Here the logic expression Y=(A+B).(B+C).(𝐀+C), is
in the form of product of three terms (A+B),(B+C) and
(A+C), with each term is in the form of sum of two
variables. Therefore such expressions are known as expression in POS form.

4.8.2 CANONICAL SOP & POS FORMS

a) The meaning of canonical is conforming to a general rule.
b) This rule states that each term used in a logical equation must contain all the available input
variables.
c) Many times, logical equations written in the SOP or POS form are not canonical. That means each
term may not contain all the input variables.
d) Consider the SOP and POS expressions
CANONICAL SOP FORM

Each product term consists of all

the litetrals in the complemented
or umcomplemented.

CANONICAL POS FORM

Each sum term consists of all the

litetrals in the complemented or
umcomplemented.

25
“We can say that a logic expression is said to be in the canonical SOP or POS form if each product
term (for SOP) and sum term (for POS) consists of all the literals in their complemented or
uncomplemeted form”.

4.8.3 CONCEPTS OF MINTERM & MAXTERM

MINTERM
Each individual term in the canonical SOP form is called as minterm.

MAXTERM
Each individual term in the canonical POS form is called as maxterm.

Each individual term is called minterm

Each individual term is called maxterm

4.8.4 HOW ARE THE MINTERM AND MAXTERM OBTAINED?

MINTERM MAXTERM
𝐘 = 𝐀𝐁𝐂 + 𝐀𝐁𝐂 + 𝐀𝐁𝐂 𝐘 = 𝐀+𝐁+𝐂 . 𝐀+𝐁+𝐂 . 𝐀+𝐁+𝐂
111 011 100 010 000 110

m7 m3 m4 M2 M6
M0

𝐘= 𝐦(𝟑, 𝟒, 𝟕) 𝐘= 𝐌(𝟎, 𝟐, 𝟔)
𝐘= 𝐌(𝟎, 𝟏, 𝟐, 𝟓, 𝟔) 𝐘= 𝐦(𝟏, 𝟑, 𝟒, 𝟓, 𝟕)

Example :
Standard Form: (i) SOP form, Y(A,B,C) = AB’ +AC’ +A’C
(ii) POS form, Y(A,B,C) = (A+C)(B+C’)

Non Standard Form (Not SOP nor POS): Y(A,B,C) = A(B+C’) +BC +AC +B(A’ + C)

Canonical Form (all literals in each term) :

(i) SOP form, Y(A,B,C) = AB’C +ABC’ +A’BC
(ii) POS form, Y(A,B,C) = (A+B+C)(A’+B+C’)(A’+B’+C’)

26
MINIMIZE THE LOGIC EQUATION GIVEN BELOW?
Y = AB + A + B A + B
= AB + AA + AB + AB + BB
= AB + AA + AB + AB + BB But AA = 0, AB + AB = AB, BB = B
= AB + AB + B
= A+A B+B A+A = 1
=B

Y = ABCD + BCD + BCD + BCD

= A + 1 BCD + BC D + D But A + 1 = 1, D+D =1
= BCD + BC
= B CD + C
= B C+C D+C C+C = 1
= B D+C

𝐀 + 𝐁 𝐁 + 𝐂 𝐂 + 𝐀 = 𝐀𝐁 + 𝐁𝐂 + 𝐂𝐀
LHS = A + B B + C C + A
= AB + AC + B + BC C + A BB = B
= B A + 1 + AC + BC C + A A+1 =1
= B + AC + BC C + A
= BC + ACC + BCC + AB + AAC + ABC
= BC + AC + BC + AB + AC + ABC BC + BC = BC , AC + AC = AC
= BC + AC + AB + ABC
= BC + AC + AB 1 + C 1+C =1
= BC + AC + AB
= AB + BC + CA
= LHS
𝐘 = 𝐀𝐁 + 𝐀 + 𝐁 𝐀𝐁
= A + B + A. B AB
= AAB + BAB + A. BAB AA = 0, BB = B
= AB
𝐘 = 𝐀𝐁 + 𝐀 𝐁 + 𝐂 + 𝐁 𝐁 + 𝐂
= AB + AB + AC + BB + BC AB + AB = AB, BB = B
= AB + AC + B + BC

27
 = B 1 + A + C + AC 1+A+C= 1
= B + AC

𝐘 = 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐃 + 𝐁𝐂𝐃 + 𝐀𝐁 + 𝐁𝐂

= BD AC + A + B C + CD + AB
= BD A + A C + A + B C + D C + C + AB A + A = 1, C+C=1
= BD C + A + B C + D + AB
= ABD + BCD + BC + BD + AB
= A B + BD + C B + BD + BD
= A B + B B + D + C B + B B + D + BD B+B = 1
= A B + D + C B + D + BD
= B + D A + C + BD

28
MINIMIZE USING K-MAP REALIZE THE FOLLOWING EXPRESSION USING MINIMUM NUMBERS OF
GATES
1. Y= 𝐦 (𝟏, 𝟐, 𝟗, 𝟏𝟎, 𝟏𝟏, 𝟏𝟒, 𝟏𝟓)

Y=𝐁𝐂𝐃 + 𝐁𝐂𝐃 + 𝐀𝐂

2. Y= 𝐦 (𝟎, 𝟐, 𝟓, 𝟔, 𝟕, 𝟖, 𝟏𝟎, 𝟏𝟑, 𝟏𝟓)

Y=𝐁𝐃 + BD + 𝐀BC

29
Solve the given logic expression by using k-map only
Y= 𝐀𝐁CD + 𝐀BC𝐃 + 𝐀𝐁𝐂+ 𝐀𝐁𝐃 + A𝐂 + 𝐁
= 𝐀𝐁CD + 𝐀BC𝐃 + 𝐀𝐁𝐂(𝐃 + 𝐃)+ 𝐀𝐁𝐃(𝐂 + 𝐂) + A𝐂 𝐁 + 𝑩 (𝐃 + 𝐃) + 𝐁(𝐀 + 𝐀)(𝐂 + 𝐂)(𝐃 + 𝐃)
= 𝐀𝐁CD+ 𝐀BC𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃+ 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + A𝐂 𝐁 + 𝐁 (𝐃 + 𝐃) + 𝐁(𝐀 + 𝐀)(𝐂 + 𝐂)(𝐃 + 𝐃)
= 𝐀𝐁CD+ 𝐀BC𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃+ 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + A𝐂(𝐁𝐃 + 𝐁𝐃 + 𝐁𝐃 + 𝐁𝐃)
+ 𝐁(𝐀 + 𝐀)(𝐂𝐃 + 𝐂𝐃 + 𝐂𝐃 + 𝐂𝐃)
= 𝐀𝐁CD+ 𝐀BC𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃+ 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + A𝐂(𝐁𝐃 + 𝐁𝐃 + 𝐁𝐃 + 𝐁𝐃)
+ 𝐁(𝐀 + 𝐀)(𝐂𝐃 + 𝐂𝐃 + 𝐂𝐃 + 𝐂𝐃)
= 𝐀𝐁CD+ 𝐀BC𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃+ 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + A𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃)
+ 𝐁(𝐀𝐂𝐃 + 𝐀𝐂𝐃 + 𝐀𝐂𝐃 + 𝐀𝐂𝐃 + 𝐀𝐂𝐃 + 𝐀𝐂𝐃 + 𝐀𝐂𝐃 + 𝐀𝐂𝐃)
= 𝐀𝐁CD+ 𝐀BC𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃+ 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + A𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃
+ 𝐁(𝐀𝐂𝐃 + 𝐀𝐂𝐃 + 𝐀𝐂𝐃 + 𝐀𝐂𝐃 + 𝐀𝐂𝐃 + 𝐀𝐂𝐃 + 𝐀𝐂𝐃 + 𝐀𝐂𝐃)
= 𝐀𝐁CD+ 𝐀BC𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃+ 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + A𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃
+ 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃 + 𝐀𝐁𝐂𝐃

Y(A, B, C, D)= 𝐦 (𝟎, 𝟏, 𝟐, 𝟑, 𝟔, 𝟖, 𝟗, 𝟏𝟎, 𝟏𝟏, 𝟏𝟐, 𝟏𝟑)

Y=𝐁 + 𝐀𝐂 + 𝐀𝐂𝐃
REDUNDANT GROUP
If all the 1’s in a group are already involved in some other groups, then that group is called as a
redundant group.
Redundant group has to be eliminated, because it increases the number of gates required.
Y(A, B, C, D)= 𝐦 (𝟏, 𝟓, 𝟔, 𝟕, 𝟏𝟏, 𝟏𝟐, 𝟏𝟑, 𝟏𝟓)

Y=𝐀𝐂D + 𝐀BC + AB𝐂 + ACD + BD Y= 𝐀𝐂D + 𝐀BC + AB𝐂 + ACD

= 𝐀𝐂D + ACD + 𝐀BC + AB𝐂
Redundant Group
30
 = D (𝐀𝐂 + AC) + B(𝐀C + A𝐂)
Y = D (𝐀⨀𝐂) + B (𝐀⨁𝐂)

Y(A, B, C, D)= 𝐦 (𝟏, 𝟒, 𝟖, 𝟏𝟐, 𝟏𝟑, 𝟏𝟓) Y(A, B, C, D)= 𝐦 (𝟎, 𝟏, 𝟐, 𝟑, 𝟓, 𝟕, 𝟖, 𝟗, 𝟏𝟎, 𝟏𝟏, 𝟏𝟒)

Y=𝐀 𝐁 𝐂 𝐃 + 𝐁 𝐂 𝐃 + 𝐀 𝐂 𝐃 + 𝐀𝐁𝐃 Y=𝐀𝐁 + 𝐀𝐃 + 𝐀𝐁𝐂𝐃 + 𝐁𝐂 + 𝐁𝐃

Y(A, B, C, D)= 𝐦 (𝟎, 𝟏, 𝟐, 𝟑, 𝟔, 𝟖, 𝟗, 𝟏𝟎, 𝟏𝟏, 𝟏𝟐, 𝟏𝟑)

Y= 𝐁 + 𝐀𝐂 + 𝐀𝐂𝐃

Y(A, B, C, D)= 𝐦 (𝟏, 𝟑, 𝟓, 𝟗, 𝟏𝟏, 𝟏𝟑)

Y= 𝐁𝐃 + 𝐂𝐃 = 𝐃(𝐁 + 𝐂)

31
Y= 𝐦 (𝟎, 𝟏, 𝟐, 𝟑, 𝟖, 𝟗, 𝟏𝟎, 𝟏𝟏, 𝟏𝟐, 𝟏𝟒) Y= 𝐦 (𝟎, 𝟏, 𝟐, 𝟑, 𝟒, 𝟓, 𝟔, 𝟕)

Y= 𝐁 + 𝐀𝐁𝐃 Y= 𝐀

Y= 𝐦 (𝟏, 𝟓, 𝟕, 𝟗, 𝟏𝟏, 𝟏𝟑, 𝟏𝟓) Y= 𝐦 (𝟒, 𝟓, 𝟔, 𝟕, 𝟖, 𝟗, 𝟏𝟎, 𝟏𝟏, 𝟏𝟐, 𝟏𝟑, 𝟏𝟒, 𝟏𝟓)

Y= 𝐂𝐃 + 𝐁𝐃 + 𝐀𝐃 Y= 𝐀 + 𝐁

Y= 𝐦 (𝟎, 𝟐, 𝟑, 𝟓) Y= 𝐦 (𝟎, 𝟐, 𝟖, 𝟏𝟎)

32
 Y= 𝐀𝐁𝐂 + 𝐀𝐂 Y= 𝐁 + 𝐃

Y= 𝐦 (𝟏, 𝟑, 𝟒, 𝟓, 𝟕, 𝟗, 𝟏𝟏, 𝟏𝟑, 𝟏𝟓)

Y= 𝐀𝐁𝐂 + 𝐃

4.8.5 DON'T CARE CONDITIONS

1. For SOP form, we enter 1's corresponding to the combinations of input variables which
produce a high output. And we enter 0's in the remaining cells of the K-map.
2. For the POS form we enter 0's corresponding to the combinations of inputs which produce
a low output and enter 1's in the remaining cells of the K-map.
3. But it is not always true that the cells not containing 1's (in SOP) will contain 0's, because
some combinations of input variable do not occur.
4. Also for some functions the outputs corresponding to certain combinations of input
variables do not matter.
5. In such situation we have a freedom to assume a 0 or 1 as output for each of these
combinations. These conditions are known as the "Don't care conditions" and in the K-
map it is represented as ‘X’ (cross) or ‘d’ in the corresponding cell.

In don't care condition (x) may be assumed to be 0 or 1 as per the need for simplification.
Y= 𝐦 𝟏, 𝟒, 𝟖, 𝟏𝟐, 𝟏𝟑, 𝟏𝟓 +
𝐝(𝟑, 𝟏𝟒)

33
 Y=𝐀𝐁 + 𝐀𝐂 𝐃 + 𝐁 𝐂 𝐃 + 𝐀 𝐁 𝐃

Y= 𝐦 𝟎, 𝟏, 𝟐, 𝟏𝟏, 𝟏𝟐, 𝟏𝟒, 𝟏𝟓 + 𝐝(𝟑, 𝟓, 𝟔, 𝟏𝟑) Y= 𝐦 𝟏, 𝟐, 𝟓, 𝟕, 𝟗, 𝟏𝟓 + 𝐝(𝟎, 𝟑, 𝟒, 𝟔, )

Y=𝐀𝐁 + 𝐀𝐁 + 𝐀𝐂𝐃 Y=𝐀 + 𝐂𝐃 + 𝐁𝐂𝐃

Y= 𝐦 𝟎, 𝟏, 𝟓, 𝟗, 𝟏𝟑, 𝟏𝟒, 𝟏𝟓 + 𝐝(𝟑, 𝟒, 𝟕, 𝟏𝟎, 𝟏𝟏)

Y=𝐃 + 𝐀𝐂 + 𝐀𝐂
Minimize Y= 𝐦 𝟎, 𝟏, 𝟑, 𝟒, 𝟗, 𝟏𝟏, 𝟏𝟒 + 𝐝(𝟓, 𝟏𝟐, 𝟏𝟓) using k-map and implement it using NAND
gates.
Y= 𝐀𝐁𝐂 + 𝐀𝐂 + 𝐁𝐃

= 𝐀𝐁𝐂 + 𝐀𝐂 + 𝐁𝐃

= 𝐀𝐁𝐂 . 𝐀𝐂 . 𝐁𝐃

34
 Y=𝐀𝐁𝐂 + 𝐀𝐂 +
𝐁𝐃

Y= 𝐦 𝟑, 𝟒, 𝟓, 𝟕, 𝟗, 𝟏𝟑, 𝟏𝟒, 𝟏𝟓 + 𝐝(𝟎, 𝟐, 𝟏𝟐) Y= 𝐦 𝟎, 𝟐, 𝟑, 𝟓, 𝟕, 𝟏𝟐, 𝟏𝟓 + 𝐝(𝟏, 𝟒, 𝟖, 𝟏𝟏)

Y=𝐁𝐂 + 𝐀𝐂𝐃 + 𝐀𝐁𝐂 + 𝐀𝐂𝐃 + 𝐁𝐃 Y=𝐀𝐁 + 𝐂𝐃 + 𝐂𝐃 + 𝐀𝐂

Redundant Group

Minimize Y= 𝐦 𝟎, 𝟏, 𝟑, 𝟓, 𝟕, 𝟗, 𝟏𝟎, 𝟏𝟒, 𝟏𝟓 + 𝐝(𝟐, 𝟒) and implement using NAND gate only.
Y= 𝐀𝐁 + 𝐀𝐃 + 𝐀𝐂𝐃 + 𝐁𝐂𝐃

= 𝐀𝐁 + 𝐀𝐃 + 𝐀𝐂𝐃 + 𝐁𝐂𝐃

= 𝐀𝐁 . 𝐀𝐃 . 𝐀𝐂𝐃 . 𝐁𝐂𝐃

Y=𝐀𝐁 + 𝐀𝐃 + 𝐀𝐂𝐃 + 𝐁𝐂𝐃

35
Minimize Y (w, x, y, z) = 𝐦 𝟎, 𝟏, 𝟐, 𝟗, 𝟏𝟏, 𝟏𝟓 + 𝐝 𝟖, 𝟏𝟎, 𝟏𝟒 using k-map and implement it using
NOR gates only.

Y= 𝐖𝐗 + 𝐖𝐘 + 𝐗 𝐘 + 𝐗 𝐙

= 𝐖𝐗 + 𝐖𝐘 + 𝐗 𝐘 + 𝐗 𝐙

= 𝐖𝐗 + 𝐖𝐘 + 𝐗 𝐘 + 𝐗 𝐙

Y=𝐖𝐗 + 𝐖𝐘 + 𝐗 𝐘 + 𝐗𝐙

K-MAP SIMPLIFICATION IN POS FORM

Y= 𝐌 𝟎, 𝟐, 𝟑, 𝟓, 𝟕 f(A,B,C,D) = 𝐌 𝟎, 𝟏, 𝟑, 𝟔, 𝟕, 𝟖, 𝟗, 𝟏𝟏, 𝟏𝟑, 𝟏𝟒, 𝟏𝟓

Y= 𝐀 + 𝐂 . 𝐀 + 𝐂 . 𝐁 + 𝐂 Y= 𝐀 + 𝐃 . 𝐁 + 𝐂 . 𝐂 + 𝐃 . 𝐁 + 𝐂

F(x, y, z, w) = 𝐌 𝟎, 𝟐, 𝟓, 𝟕, 𝟖, 𝟏𝟎, 𝟏𝟑, 𝟏𝟓 F(A,B,C,D) = 𝐌 𝟎, 𝟏, 𝟐, 𝟓, 𝟖, 𝟗, 𝟏𝟎

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 Y= 𝐘 + 𝐖 . 𝐘 + 𝐖 Y= 𝐁 + 𝐂 . 𝐀 + 𝐂 + 𝐃 . 𝐀 + 𝐁 + 𝐃

5 VARIABLES K-MAP
a) 5 variables have 32 min terms, which mean 5 variables K- map has 32 squares (cells).
b) A 5-variable K-map is made using two 4-variable K-maps. Consider 5 variables A, B, C, D, E. their 5
variable K-map is given below.

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EXAMPLE
F (A,B,C,D,E) = ∑ ( m0, m2, m5, m7, m8, m10, m16, m21, m23, m24, m27, m31 )

Y=𝐀𝐂𝐄 + 𝐂 𝐃𝐄 + 𝐁𝐂𝐄 + 𝐀𝐁𝐃𝐄

6 VARIABLES K-MAP
a) 5 variables have 64 min terms, which mean 6 variables K- map has 64 squares (cells).
b) A 5-variable K-map is made using four 4-variable K-maps. Consider 6 variables A, B, C, D, E, F their
6 variable K-map is given below.

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EXAMPLE
F (A,B,C,D,E,F) =∑ (m0, m2, m8, m9, m10, m12, m13, m16, m18, m24, m25, m26, m29, m31, m32, m34, m35,
m39, m40, m42, m43, m47, m48, m50, m56, m58, m61, m63 )

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Y=𝐃𝐅 + 𝐀𝐂𝐄𝐅 + 𝐀𝐁𝐂𝐄 + 𝐁𝐂𝐃𝐅 + 𝐀𝐁𝐄𝐅

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 DIGITAL ELECTRONICS
ASSIGNMENT
1) Do the following conversions:
a) (125608)10= ( )2
b) (1356.25)10= ( )H
c) (11011.011)2= ( )10
d) (7043.06)8= ( )10
e) (7A0B.01F)16= ( )10
f) (10111.01)2= ( )H
g) (1101110.001)2= ( )H
h) (3215.06)10= ( )6
i) (327.04)8= ( )H
j) (1CD.2A)H=( )10=( )2
k) (749.25)10=( )2=( )8=( )H
l) (101.01)2=( )10
m) (10101.0101)2=( )10
n) (62.7)8=( )H
o) (10.10001)2=( )8
p) (0.342)6=( )10
q) (101010.10)4=( )8
r) (23.AB)H=( )8
s) (111011)2 to gray code
t) (101010.10)4=( )8
u) (3451)10=( )2
v) (1745.246)8=( )H
w) (7894.125)10=( )8
x) (5413.237)8=( )16
y) (BC64)H=( )10
z) (2CCD)16=( )5
aa) (7841)9=( )10
bb) (4021.25)10=( )2
cc) (11011.011)10=( )16
dd)(2AC9)16=( )7
ee) (1010.101)10=( )2=( )4
ff) (C3A.47)H=( )8=( )2
gg) (6089.25)10=( )8
hh)(A6B.F5)16=( )2

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 ii) (375.37)8=( )2

2) Do following additions:
a) (1011011)2 + (10001.001)2
b) (7571)8 + (4176)8
c) (4F3A)H + (23C1)H
d) (93)H + (DE)H
e) (ABCD)H+(EF12)H
f) (1704.34)8 + (47706.12)8
g) (1A0F11.06)H + (FFB0D.00A)H
h) (23.53)10 + (23.53)10
i) (125.04)6 + (1003.02)6
j) (A4F.EF)16 + (3FD.AB)16

3) Do following subtractions:
a) (11000.001)2 – (10111.111)2
b) (1001.11)2 – (1111.01)2
c) (7571)8 –(4176)8
d) (71064.04)8 – (67704.77)8
e) (6488.43)9 – (3837.78)9
f) (FA12.35)16 – (9BCD.EF)16
g) (1AF019.89)H – (F0AF67.08)H
h) (4F3A)H – (23C1)H
i) (7001)8 – (5763)8

4) Write all Boolean postulates and Boolean theorems.

5) State and prove De Morgan’s theorem.
6) What do you mean by canonical forms?
7) Write short note on Minterms and Maxterms.
8) What is the difference between canonical form and standard form?
9) What is BCD? Where is it used? Give the advantages and disadvantages of BCD.
10) What are universal gates and why they are called universal gates prove it?
11) Implement AND, OR, NOT, NOR, EX-OR and EX-NOR using NAND gate only.
12) Implement AND, OR, NOT, NAND, EX-OR and EX-NOR using NOR gate only.
13) Draw the following gates and write the output expression with truth table:
a) AND gate
b) OR gate

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 c) NOT gate
d) Ex-OR gate
e) Ex-NOR gate
f) NAND gate
g) NOR gate

14) Implement using NAND gate only using NOR gate only
a) Y= AB + CD
b) Y=(AB +BC)C
c) Y=(ABC +BC)C
d) Y=(AB + C) D
e) Y=((AB) + (A + B))AB
f) Y=ABC + BCD + ABC
g) Y=A + AB + AB

15) Simplify the following Boolean expression and implement it using gates:
a) ABCD + ABCD
b) Y= ((AB) + A + AB)
c) Y=ABC + ABC + ABC
d) Y= (A + BC)(C + AB)
e) Y =(AB + C)(AB +D)

16) Prove the following functions:

a) A + AB= A
b) A + AB= A + B
c) (A + B)(A + C)= A + BC
d) (A + B +AB)(A + B)( AB)=0
e) A +AB + AB= A + B
f) AB + AB +AB +AB=1
g) AB + ABC +AB= A

17) Represent following into the standard SOP:

a) F(A, B, C, D)=ABC + AB + AC
b) Y=AB + AC + BC

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 c) Y=A + BC + ABC
d) Y=AB + AC +BC
e) F(W, X, Y, Z)= XY + YZ + WX

18) Represent following into the standard POS:

a) F(A, B, C, D)= (A+B).(C+D).(A+D)
b) Y=(A + B)(A + C)(B + C)
c) Y=(A + B)( B + C)
d) F(A, B, C, D)= (A+B+C+D).(A+C+D).( A+D)

19) Solve the following using K-map:

a) Y= ABC + ABC +ABC + ABC
b) Y=ABCD + ABCD + ABC + ABD + AC + B
c) Y=∑m(1,3,5,9,11,13) minimize it and realize it using the basic gates also solve for POS form.
d) Y=∑m(0,2,5,6,7,8,10,13,15) minimize it and realize it using the basic gates also solve for POS
form.
e) F(W, X, Y, Z) = ∑(0,1,2,4,5,6,8,9,12,13,14)
f) F(A,B,C,D) = ∑(0,6,9,10,13) + d (1,3,8)
g) F(A,B,C,D) = ∑(0,1,2,4,5,6,9) + Φ (10,11,12,13,14,15)
h) F(A,B,C,D) = π(0,4,5,6,7,13,14,15)
i) Y= ∑m(1,3,7,11,15) + d (0,2,5)
j) Y=π M(0,2,3,7)
k) Y= π M(0,2,3,5,7)
l) F(A,B,C,D) = π(0,1,2,4,5,6,9) + d (10,11,12,13,14,15)
F= y + xz
d= yz + xy
m) F= ABD + ACD +ABC
d= ABCD +ACD +ABD
n) F(A,B,C,D)=ABC + BCD + ACD + AB + A , also find the POS Canonical form of the given
function.
o) F(A, B, C)= abc + bc + abc + abc
p) X= ABC + ACD + AB
q) F(A, B, C, D)= ∑m(0,1,2,3,5,7,8,9,11,14)
r) F(A, B, C, D)=π M(0,1,2,5,8,9,10)
s) F(A, B, C, D)=∑m(0,1,2,11,12,14,15) + d(3,5,6,13)

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 t) F(x, y, z, w)= π M(0,2,5,7,8,10,13,15)
u) F(A, B, C, D)= ∑m(0,2,3,5,7,12,15) + ∑d(1,4,8,11)
v) F(A, B, C, D)= ∑m(1,2,5,7,9,15) + ∑m d(0,3,4,6)
w) F(A, B, C, D)=π M(0,1,3,6,7,8,9,11,13,14,15)
x) F(a, b, c, d)=∑m(0,1,3,4,7,9,10,14,15)

20) Minimize the given Boolean function using k-Map and Implement the minimized function only
using NAND gates.
a) F(A, B, C, D)=∑m(3,4,5,7,9,13,14,15) + d(0,2,8)
b) F(A, B, C, D)=∑m(1,3,4,6,8,9,11,13,15) + d(0,2,14)
c) F(A, B, C, D)=∑m(0,1,3,4,9,11,14) + d(5,12,15)

21) Obtain a reduced expression for the following multiple output system, and realize the minimized
function using NOR gates only.
a) F1(A, B, C, D)=∑m(0,1,2,5,7,8,9,10,13,15)
b) F2(A, B, C, D)=∑m(0,1,2,8,10,11,14,15)

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