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Assignment -2 Basic Electronics Engineering

This document is an assignment for Basic Electronics Engineering (ES-201) with a submission date of May 5, 2025. It includes a series of questions related to full-wave rectifiers, BJT characteristics, and various circuit analyses, requiring explanations, derivations, and calculations. The questions cover topics such as ripple factor, transistor operating regions, output waveforms, and biasing configurations.

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siyaramprince
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4 views

Assignment -2 Basic Electronics Engineering

This document is an assignment for Basic Electronics Engineering (ES-201) with a submission date of May 5, 2025. It includes a series of questions related to full-wave rectifiers, BJT characteristics, and various circuit analyses, requiring explanations, derivations, and calculations. The questions cover topics such as ripple factor, transistor operating regions, output waveforms, and biasing configurations.

Uploaded by

siyaramprince
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Basic Electronics Engineering (ES-201)

Assignment -2 (Assignment submission date: 5/05/2025)

Q1.Explain the operation of Full wave bridge rectifier with neat and clean diagram. Also
derive expression of the Ripple Factor for this rectifier. Mention the Advantages of bridge
rectifier over centre tapped rectifier.
Q2.Explain Full wave rectifier with capacitor filter in detail with necessary waveforms.
Q3.Draw the common emitter circuit and sketch the input and output characteristics curves.
Also explain different operating regions by indicating them on characteristic curves.
Q4.Derive the relationship between αdc and βdc. Determine αdc and IB for a transistor that
has Ic equal to 2.5 mA and IE equal to 2.55 mA. Calculate βdc for the transistor.
Q5.A BJT has an Early voltage of 80 V. The collector current is IC = 0.60 mA at a collector–
emitter voltage of VCE = 2 V. (a) Determine the collector current at VCE = 5 V. (b) What
is the output resistance?
Q6.In the following circuit (Fig. 1), find the IB, VE and VC. Assume, β = 100 and |VBE| = 0.7
V.

Fig. 1 Fig. 2 Fig. 3

Q7.The circuit shown in Fig. 2 has VE = 1 V. Find VB, VC, IC, IB, α and β. Assume, |VBE| = 0.7
V.

Q8.Identify, whether the p-n-p transistor (shown in Fig. 3) is in active mode or in saturation
mode. Assume, β = 100 and |VBE| = 0.7 V.

Q9.In the circuit shown in Fig. 4, find VC. Assume, β = 75 and |VBE| = 0.7 V.

Fig. 4 Fig. 5

Q10. The common emitter current gain of the transistor in Fig. 5 is β = 75. Determine V0
for: (i) VBB = 0, (ii) VBB = 1 V, and (iii) VBB = 2.
Q11. While constructing a full-wave rectifier, a student mistakenly has swapped the terminals
of D3 as depicted in Fig.6 Explain what happens.

Fig.6

Q12. Assume the input and output grounds in a full-wave rectifier are shorted together. Draw
the output waveform with and without the load capacitor and explain why the circuit does
not operate as a rectifier.

Q13. Plot the current flowing through R1 as a function of Iin for the circuits of Fig.7. Assume a
constant-voltage diode model.

Q14. Determine the output waveform for the network of Fig.8 and calculate the output dc level
and the required PIV of each diode.
Fig.8

Q15. Determine the output waveform for the network of Fig.9.

Fig.9.

Q16. Determine vo for the network of Fig.10.

Fig.10.

Q17. Determine Vo for the network of Fig. 11 for the input indicated.

Fig. 11

Q18. Determine Vo for the network of Fig. 11 for the input indicated.
Fig. 12

Q19. For the emitter-bias network of Fig. 13, determine (A) IB (B) IC.(C) VCE (D) VC (E) VE (F)
VB (G) VBC.

Fig. 13

Q20. Draw the load line for the network of Fig. 14a on the characteristics for the transistor
appearing in Fig. 14b.
b. For a Q-point at the intersection of the load line with a base current of 15 mA, find the
values of ICQ and VCEQ.
c. Determine the dc beta at the Q-point.
d. Using the beta for the network determined in part c, calculate the required value of
RB and suggest a possible standard value.
Fig. 14a

Fig. 14b

Q21. Determine the dc bias voltage VCE and the current IC for the voltage-divider
configuration of Fig. 15.

Fig.15
Q22. Determine the quiescent levels of ICQ and VCEQ for the network of Fig.16.

Fig.16.

Q23. Determine the dc level of IB and VC for the network of Fig. 17

Fig. 17

Q24. For the voltage-divider bias configuration of Fig. 18, determine: a. IBQ. b. ICQ. c.
VCEQ.d. VC.e. VE. f. VB.
Fig. 18

Q25. Given the information appearing in Fig. 19, determine: a. IC. b. VE. c. VCC.d. VCE.e.
VB.f. R1.

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