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OS Unit 3

The document discusses various memory management techniques in operating systems, including main memory, swapping, contiguous memory allocation, paging, and virtual memory. It covers concepts such as address binding, memory protection, dynamic loading and linking, fragmentation, and the implementation of page tables. Additionally, it explains the role of the Memory Management Unit (MMU) and the advantages and disadvantages of different memory allocation strategies.

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0% found this document useful (0 votes)
6 views69 pages

OS Unit 3

The document discusses various memory management techniques in operating systems, including main memory, swapping, contiguous memory allocation, paging, and virtual memory. It covers concepts such as address binding, memory protection, dynamic loading and linking, fragmentation, and the implementation of page tables. Additionally, it explains the role of the Memory Management Unit (MMU) and the advantages and disadvantages of different memory allocation strategies.

Uploaded by

skva
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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AL3452 - OS

UNIT III MEMORY MANAGEMENT 10

Main Memory - Swapping - Contiguous Memory Allocation Paging -


Structure of the Page Table - Segmentation, Segmentation with
paging; Virtual Memory - Demand Paging Copy on Write - Page
Replacement - Allocation of Frames Thrashing.

Prepared by
S.K. VIJAI ANAND
AP / AIDS
MNMJEC
Operating System Concepts – 10th Edition 9.1 Silberschatz, Galvin and Gagne ©2018
Chapter 9: Main Memory

Operating System Concepts – 10th Edition Silberschatz, Galvin and Gagne ©2018
Memory
 Process must be brought (from disk) into memory for it to be run
 Main memory and registers are only storage CPU can access directly
 Memory unit only sees a stream of read / write access.
 Main memory can take many cycles, causing a stall
 Cache sits between main memory and CPU registers

Operating System Concepts – 10th Edition 9.3 Silberschatz, Galvin and Gagne ©2018
1. Basic Hardware
 Need to ensure that a process can access only those addresses in its
address space.
 This protection is provided by using a pair of base and limit registers
define the logical address space of a process.
 The base register holds the smallest legal physical memory address; the limit
register specifies the size of the range.

Operating System Concepts – 10th Edition 9.4 Silberschatz, Galvin and Gagne ©2018
2. Protection
 CPU checks every memory access generated in user mode to be sure it
is between base and limit for that user

 Any attempt by a program executing in user mode to access OS


memory or other users’ memory results in a trap to the operating system
 Instructions to load the base and limit registers are privileged, done by
the OS.

Operating System Concepts – 10th Edition 9.5 Silberschatz, Galvin and Gagne ©2018
3. Address Binding
 Addresses are represented in different stages of a program life differently.
• Source code addresses usually symbolic (eg. Function name fact)
• Compiler binds symbolic addresses to relocatable addresses
 i.e., “14 bytes from beginning of this module”
• Linker or loader will bind relocatable addresses to absolute addresses
 i.e., 74014
 Binding of instructions and data to memory addresses can happen at three
different stages
• Compile time: If memory location known a priori, absolute code can
be generated; must recompile code if starting location changes
• Load time: Must generate relocatable code if memory location is not
known at compile time
• Execution time: Binding delayed until run time if the process can be
moved during its execution from one memory segment to another

Operating System Concepts – 10th Edition 9.6 Silberschatz, Galvin and Gagne ©2018
4. Logical vs. Physical Address
 Logical address – generated by the CPU; also referred to as virtual
address
 Physical address – address seen by the memory unit
 Logical and physical addresses are the same in compile-time and load-time
address-binding schemes; logical (virtual) and physical addresses differ in
execution-time address-binding scheme
 Logical address space is the set of all logical addresses generated by a
program
 Physical address space is the set of all physical addresses generated by
a program

Operating System Concepts – 10th Edition 9.7 Silberschatz, Galvin and Gagne ©2018
Memory-Management Unit (MMU)
 A logical address bound to a physical address is central to proper
memory management.
 Hardware device that at run time maps virtual to physical address i5s
known as MMU.

Operating System Concepts – 10th Edition 9.8 Silberschatz, Galvin and Gagne ©2018
Memory-Management Unit (Cont.)
 Consider simple scheme. which is a generalization of the base-
register scheme.
 The base register now called relocation register
 The value in the relocation register is added to every address
generated by a user process at the time it is sent to memory

Operating System Concepts – 10th Edition 9.9 Silberschatz, Galvin and Gagne ©2018
5. Dynamic Loading
 The entire program does need to be in memory to execute
 Routine is not loaded until it is called
 Better memory-space utilization; unused routine is never loaded
 All routines kept on disk in relocatable load format
 Useful when large amounts of code are needed to handle
infrequently occurring cases
 No special support from the operating system is required

Operating System Concepts – 10th Edition 9.10 Silberschatz, Galvin and Gagne ©2018
6. Dynamic Linking
 Static linking – system libraries and program code combined by the
loader into the binary program image. This increases the size of an
executable image and also wastes main memory.
 Dynamic linking –linking is postponed until execution time
 Dynamic linking is particularly useful for system libraries, also known
as shared libraries or DLLs
 Advantage of DLLs is that these libraries can be shared among multiple
processes, so that only one instance of the DLL is in main memory.

Operating System Concepts – 10th Edition 9.11 Silberschatz, Galvin and Gagne ©2018
Contiguous Allocation
 Contiguous allocation is one early method
 Main memory usually has two partitions:
• Resident operating system, held in low memory
• User processes then held in high memory
 Each process is contained in a single contiguous section of memory

Operating System Concepts – 10th Edition 9.12 Silberschatz, Galvin and Gagne ©2018
1. Memory Protection
 Relocation registers used to protect user processes from each other, and
from changing operating-system code and data
 Limit register contains range of logical addresses – each logical address
must be less than the limit register
 MMU maps logical address dynamically by adding value in the relocation
register. This mapped address is sent to memory

Operating System Concepts – 10th Edition 9.13 Silberschatz, Galvin and Gagne ©2018
2. Memory Allocation
 Allocating memory is to assign processes to partitions in memory,
where each partition (variable/fixed) contains exactly one process.
 Degree of multiprogramming limited by number of partition.
 Variable-partition sizes are preferred for efficiency
 Hole – block of available memory; holes of various size are scattered
throughout memory
 When a process arrives, it is allocated memory from a hole large enough to
accommodate it
 Process exiting frees its partition, adjacent free partitions combined
 Operating system maintains information about:
a) allocated partitions b) free partitions (hole)

Operating System Concepts – 10th Edition 9.14 Silberschatz, Galvin and Gagne ©2018
3. Dynamic Storage-Allocation
How to satisfy a request of size n from a list of free holes? Solutions are

 First-fit: Allocate the first hole that is big enough


 Best-fit: Allocate the smallest hole that is big enough; must search
entire list, unless ordered by size
• Produces the smallest leftover hole
 Worst-fit: Allocate the largest hole; must also search entire list
• Produces the largest leftover hole

First-fit and best-fit better than worst-fit in terms of speed and storage
utilization

Operating System Concepts – 10th Edition 9.15 Silberschatz, Galvin and Gagne ©2018
4. Fragmentation
 External Fragmentation – total memory space exists to satisfy a
request, but it is not contiguous
 Internal Fragmentation – allocated memory may be slightly larger
than requested memory; this size difference is internal to a partition,
and not being used
 Both the first-fit and best-fit strategies for memory allocation suffer
from external fragmentation.
 First fit analysis reveals that given N blocks allocated, 0.5 N blocks
lost to fragmentation.1/3 memory may be unusable. This is known as
50-percent rule
 External fragmentation can be solved by compaction. Shuffle
memory contents to place all free memory together in one large block
 Compaction is possible only if relocation is dynamic, and is done at
execution time.

Operating System Concepts – 10th Edition 9.16 Silberschatz, Galvin and Gagne ©2018
Paging
 Divide physical memory into fixed-sized blocks called frames
• Size is power of 2, between 512 bytes and 16 Mbytes
 Divide logical memory into blocks of same size called pages
 Keep track of all free frames
• To run a program of size N pages, need to find N free frames
 Advantages
• Physical address space of a process can be noncontiguous;
• Avoids external fragmentation
• Avoids problem of varying sized memory chunks
 Disadvantage:
• Internal fragmentation is possible for the last page. Average
fragmentation is ½ frame. Worst case is almost an entire frame
• Small page sizes can reduce internal fragmentation but each page
table entry takes memory

Operating System Concepts – 10th Edition 9.17 Silberschatz, Galvin and Gagne ©2018
1. Address Translation Scheme
 Address generated by CPU is divided into two parts:
• Page number (p) – used as an index into a page table which contains
base address of each page in physical memory
• Page offset (d) – combined with base address to define the physical
memory address that is sent to the memory unit

page number page offset


p d
m -n n

• For given logical address space 2m and page size 2 n the high-order m−n
bits of a logical address designate the page number, and the n low-
order bits designate the page offset

Operating System Concepts – 10th Edition 9.18 Silberschatz, Galvin and Gagne ©2018
2. Paging Hardware
 Set up a page table to translate logical to physical addresses. The page
table contains the base address of each frame in physical memory
 The page number p is used as an index into a per-process page table.
 The corresponding frame f is extracted from page table and combined with
the page offset d to obtain the physical memory address

Operating System Concepts – 10th Edition 9.19 Silberschatz, Galvin and Gagne ©2018
3. Paging Model Example

Operating System Concepts – 10th Edition 9.20 Silberschatz, Galvin and Gagne ©2018
4. Implementation of Page Table
 Page table is kept in main memory
• Page-table base register (PTBR) points to the page table
• Page-table length register (PTLR) indicates size of the page table
 Changing page tables requires changing only this one register, thereby
reducing context-switch time drastically.
 In this scheme every data/instruction access requires two memory accesses.
One for the page table and one for the data / instruction
 The two-memory access problem can be solved by the use of a special fast-
lookup hardware cache called translation look-aside buffers (TLBs) (also
called associative memory).
 Each entry in the TLB consists of two parts: a key (or tag) and a value.
 When the associative memory is presented with an item, the item is
compared with all keys simultaneously. If the item is found, the corresponding
value field is returned. The search is fast.
 When a logical address is generated by the CPU, the MMU first checks if its
page number is present in the TLB.

Operating System Concepts – 10th Edition 9.21 Silberschatz, Galvin and Gagne ©2018
5. Paging Hardware With TLB
 If the page number is found (TLB hit), its frame number is immediately available
and is used to access memory.
 If the page number is not in TLB (TLB miss), address translation proceeds as
usual. The page & frame number is added to TLB for faster access next time.

Operating System Concepts – 10th Edition 9.22 Silberschatz, Galvin and Gagne ©2018
6. Effective Access Time
 Some TLBs store address-space identifiers (ASIDs) in each TLB
entry – uniquely identifies each process to provide address-space
protection for that process
 Hit ratio – percentage of times that a page number is found in the TLB
 Example: An 80% hit ratio with 10 nanoseconds to access memory.
• If we find the desired page in TLB then memory access takes 10 ns
Otherwise it needs two memory access so 20 ns
 Effective Access Time (EAT)
EAT = Hit ratio x Memory access + Miss ratio x 2 (Memory access)
EAT = 0.80 x 10 + 0.20 x 20 = 12 nanoseconds

Operating System Concepts – 10th Edition 9.23 Silberschatz, Galvin and Gagne ©2018
7. Protection
 One additional Valid-invalid bit is attached to each entry in the page table:
• “valid” indicates that the associated page is in the process logical address
space, and is thus a legal page
• “invalid” indicates that the page is not in the process logical address space
 The OS sets this bit for each page to allow or disallow access to the page.

Operating System Concepts – 10th Edition 9.24 Silberschatz, Galvin and Gagne ©2018
8. Shared Pages
 Shared code - One copy of read-only (reentrant) code shared among
processes (i.e., text editors, compilers, window systems)
 Private code and data - Each process keeps a separate copy of the
code and data

Operating System Concepts – 10th Edition 9.25 Silberschatz, Galvin and Gagne ©2018
Structure of the Page Table
 Memory structures for paging can get huge using straight-forward
methods
 Allocating large page table contiguously in main memory not feasible
 Simple solution is to divide the page table into smaller units
1. Hierarchical Paging
2. Hashed Page Tables
3. Inverted Page Tables

Operating System Concepts – 10th Edition 9.26 Silberschatz, Galvin and Gagne ©2018
1. Hierarchical Page Tables
 Break up the logical address space into multiple page tables
 A simple technique is a two-level page table
 The page table is paged again.
 Not suited for 64-bit systems.

Operating System Concepts – 10th Edition 9.27 Silberschatz, Galvin and Gagne ©2018
Two-Level Paging Example
 A logical address (on 32-bit machine with 4K page size) is divided into:
• a page number consisting of 20 bits
• a page offset consisting of 12 bits
 Since the page table is paged, the page number is further divided. Thus, a
logical address is as follows:

 where p1 is an index into the outer page table, and p2 is the displacement
within the page of the inner page table
 Known as forward-mapped page table
 For system with 64-bit system, two-level paging is inappropriate. Hence
three-level paging scheme can be used, but the outer table will be 16 GB,
which is very huge.

Operating System Concepts – 10th Edition 9.28 Silberschatz, Galvin and Gagne ©2018
2. Hashed Page Tables
 Commonly used in address spaces, larger than 32 bits
 This method uses hashed page table with hash value being the virtual page
number.
 The page table contains a chain of elements hashing to the same location
to handle collisions.
 Each element contains (1) the virtual page number (2) the value of the
mapped page frame (3) a pointer to the next element
 The virtual page number in the virtual address is hashed into the hash table.
 The virtual page number is compared with field-1 in the first element in the
linked list. If there is a match, the corresponding page frame (field-2) is used
to form the desired physical address.
 If there is no match, subsequent entries in the linked list are searched
 A variation for 64-bit addresses is to use clustered page tables, in which
each entry in the hash table refers to several pages

Operating System Concepts – 10th Edition 9.29 Silberschatz, Galvin and Gagne ©2018
Hashed Page Table Architecture

Operating System Concepts – 10th Edition 9.30 Silberschatz, Galvin and Gagne ©2018
3. Inverted Page Table
 Rather than each process having a page table and keeping track of all
possible logical pages, this method tracks all physical pages
 An inverted page table has one entry for each real page in memory
 Each entry consists of the virtual address of the page stored in that
real memory location, with information about the process that owns
that page
 Each virtual address in the system consists of a triple:
<process-id, page-number, offset>.
 Each inverted page-table entry is a pair <process-id, page-number>
 Decreases memory needed to store since there is only page table in
the system, but increases time needed to search the table when a
page reference occurs.

Operating System Concepts – 10th Edition 9.31 Silberschatz, Galvin and Gagne ©2018
Inverted Page Table Architecture
 When a memory reference occurs, the inverted page table is then searched
for a match.
 If a match is found—say, at entry i—then the physical address <i, offset> is
generated.
 If no match is found, then an illegal address access has been attempted.

Operating System Concepts – 10th Edition 9.32 Silberschatz, Galvin and Gagne ©2018
Swapping
 A process can be swapped temporarily out of memory to a backing store,
and then brought back into memory for continued execution
 Backing store – fast disk large enough to accommodate copies of all
memory images and must provide direct access to them
 Roll out, roll in – swapping variant used for priority-based scheduling
algorithms; lower-priority process is swapped out so higher-priority process
can be loaded and executed

Operating System Concepts – 10th Edition 9.33 Silberschatz, Galvin and Gagne ©2018
Swapping (Contd)
 If next processes to be put on CPU is not in memory, need to swap out
a process and swap in target process
 Context switch time can then be very high
 Pending I/O – can’t swap out as I/O would occur to wrong process. Or
always transfer I/O to kernel space, then to I/O device, known as
double buffering, adds overhead
 Not typically supported on mobile systems. Reasons are
• Small amount of space
• Limited number of write cycles
• Poor throughput between flash memory and CPU on mobile
platform
 Swapping is also associated with paging

Operating System Concepts – 10th Edition 9.34 Silberschatz, Galvin and Gagne ©2018
Segmentation
 Segmentation is a memory-management scheme that supports
programmer view of memory.
 A logical address space is a collection of segments. Each segment
has a name and a length
 A logical address consists of a two tuple: <segment-number, offset>.

Operating System Concepts – 10th Edition 9.35 Silberschatz, Galvin and Gagne ©2018
Hardware
 Each entry in the segment table has a segment base and a segment limit.
The segment base contains the starting physical address and the segment
limit specifies the length of the segment.
 A logical address consists of two parts: segment number, s, and offset d.
 The segment number s is used as an index to the segment table.
 The offset d must be between 0 and the segment limit, else trapped by OS.
 When an offset is legal, it is added to the segment base to produce the
address in physical memory

Operating System Concepts – 10th Edition 9.36 Silberschatz, Galvin and Gagne ©2018
Segmentation with Paging
 Pure segmentation is not used in many operating systems.
 In Segmented Paging, the main memory is divided into variable size
segments which are further divided into fixed size pages.
 A page table exists for each segment that keeps track of the frames
storing the pages of that segment.
 The Segment Table contains the information about every segment.
 The base address of the segment table is stored in the segment table
base register (STBR)
 Each segment table entry points to a page table entry and every page
table entry is mapped to one of the page within a segment.
 The logical address consists of three parts: 1) Segment Number
2) Page Number 3) Page Offset

Operating System Concepts – 10th Edition 9.37 Silberschatz, Galvin and Gagne ©2018
Hardware
 For the generated segment number, corresponding entry is located in segment
table.
 For the generated page number, corresponding entry is located in the page
table.
 Page table provides the frame number of the frame storing the required page
of the referred segment.
 The frame number combined with the page offset forms the required physical
address.

Operating System Concepts – 10th Edition 9.38 Silberschatz, Galvin and Gagne ©2018
Chapter 10: Virtual Memory

Operating System Concepts – 10th Edition Silberschatz, Galvin and Gagne ©2018
Virtual Memory
 Code needs to be in memory to execute, but entire program rarely used.
Hence entire program not needed at same time
 Virtual memory–separates user view of logical memory from physical
memory. Benefits are:
• Only part of the program needs to be in memory for execution
• Logical address space can therefore be much larger than physical
address space
• Allows address spaces to be shared by several processes
• More programs can run concurrently
• Increased CPU utilization and throughput
• Less I/O needed to load or swap processes
 Virtual address space of a process refers to the logical (or virtual) view of how
a process is stored in memory.
 Virtual memory can be implemented via:
• Demand paging
• Demand segmentation
Operating System Concepts – 10th Edition 10.2 Silberschatz, Galvin and Gagne ©2018
Demand Paging
 With demand-paged virtual memory systems, pages are loaded only
when they are demanded during program execution.
 Pages that are never accessed are thus never loaded into physical
memory.
 A demand-paging system is similar to a paging system with swapping
 To distinguish between pages in / not in memory, valid/invalid bit
scheme in page table is used.
• If bit is set to valid, then the page is legal and in memory
• If bit is set to invalid, then the page is not in memory and may /
may not be legal to the process.
 If a page needed is memory resident, then normal paging as usual.
 If page needed and not memory resident, then access to a page
marked invalid causes a page fault.
 Hardware support needed for demand paging
• Page table with valid / invalid bit
• Secondary memory (swap device with swap space faster I/O)
• Instruction restart
Operating System Concepts – 10th Edition 10.3 Silberschatz, Galvin and Gagne ©2018
Example

Operating System Concepts – 10th Edition 10.4 Silberschatz, Galvin and Gagne ©2018
1. Steps in Handling Page Fault
1. If there is a reference to a page not in memory, then it results in trap to the
operating system (Page fault)
2. Operating system looks at internal table for that process to decide whether
the reference was a valid or an invalid memory access.
• If Invalid reference then terminate the process.
• If reference is valid, then the page needs to be brought into memory.
3. Find a free frame by taking one from free frame list.
4. Read the desired page from secondary storage into newly allocated free
frame.
5. Reset page table entry to indicate page now in memory by setting
validation bit = v
6. Restart the instruction that caused the page fault. The process can now
access the page as though it had always been in memory.
7. In the worst case there may be large latency in I/O. In such cases, current
process state is saved and CPU core will be allocated to new process.
Later when the page is ready, the process state is restored and CPU will
be allocated.

Operating System Concepts – 10th Edition 10.5 Silberschatz, Galvin and Gagne ©2018
Steps in Handling a Page Fault (Cont.)

Operating System Concepts – 10th Edition 10.6 Silberschatz, Galvin and Gagne ©2018
Aspects

 Lazy swapper – never swaps a page into memory unless page will be
needed. Swapper that deals with pages is called pager
 Pure demand paging – start process execution with no pages in
memory. It page faults immediately. After the page is brought into
memory, the process continues to execute, faulting as necessary until
every page that it needs is in memory.
 When a system starts up, all available memory is placed on the free-
frame list. Operating systems maintain a free-frame list, a pool of
free frames for satisfying demand page requests

Operating System Concepts – 10th Edition 10.7 Silberschatz, Galvin and Gagne ©2018
2. Performance
 Page Fault Rate 0  p  1
• if p = 0 no page faults
• if p = 1, every reference is a fault
 Effective Access Time (EAT)
EAT = (1 – p) x memory access + p x (page fault time)
 Example
• Memory access time = 200 nanoseconds
• Average page-fault service time = 8 milliseconds
• EAT = (1 – p) x 200 + p (8 milliseconds)
= (1 – p) x 200 + p x 8,000,000
= 200 + p x 7,999,800
• If one access out of 1,000 causes a page fault, then
EAT = 8.2 microseconds.

Operating System Concepts – 10th Edition 10.8 Silberschatz, Galvin and Gagne ©2018
Copy-on-Write
 Copy-on-Write (COW) allows both parent and child processes to initially share
the same pages in memory
 If either process modifies a shared page, only then the page is copied
 COW allows more efficient process creation as only modified pages are copied
 Example shows the contents of the physical memory before and after process 1
modifies page C

Operating System Concepts – 10th Edition 10.9 Silberschatz, Galvin and Gagne ©2018
Page Replacement
 Increase in degree of multiprogramming, leads to over-allocating
memory.
 In such cases, when a page fault occurs, desired page cannot be
brought into memory, since there are no free frames on the free-frame
list, i.e., all memory is in use.
 Number of page fault decreases with increase in number of frames
available
 Prevent over-allocation of memory by modifying page-fault service
routine to include page replacement
 Use modify (dirty) bit to reduce overhead of page transfers – only
modified pages are written to disk.
 Note: now potentially 2 page transfers for page fault – increases EAT

Operating System Concepts – 10th Edition 10.10 Silberschatz, Galvin and Gagne ©2018
Basic Page Replacement
1. Find the location of the desired page on disk
2. Find a free frame. If there is a free frame, use it
- If there is no free frame, use a page replacement algorithm to
select a victim frame. Write victim frame to disk if dirty
3. Bring desired page into (newly) free frame; update page and frame tables.
4. Continue the process by restarting the instruction that caused the trap

Operating System Concepts – 10th Edition 10.11 Silberschatz, Galvin and Gagne ©2018
1. First-In-First-Out (FIFO) Algorithm
 A FIFO replacement algorithm associates with each page the time when
that page was brought into memory.
 When a page must be replaced, the oldest page is chosen.
 Ages of pages can be tracked by using a FIFO queue
 FIFO page-replacement algorithm is easy to program, but its performance
is not always good
 Adding more frames in FIFO can cause more page faults. This is known
as Belady’s Anomaly
 For the given example, FIFO method results in 15 page faults.

Operating System Concepts – 10th Edition 10.12 Silberschatz, Galvin and Gagne ©2018
2. Optimal Algorithm
 In Optimal, replace the page that will not be used for longest period of time
 Optimal page replacement has the lowest page-fault rate of all algorithms.
 Does not suffer from Belady’s anomaly
 In the given example, optimal algorithm results in 9 page faults only.
 Difficult to implement, because it requires future knowledge of the reference
string.

Operating System Concepts – 10th Edition 10.13 Silberschatz, Galvin and Gagne ©2018
3. Least Recently Used (LRU) Algorithm
 In LRU, the recent past is used as an approximation of the near future, then
replace the page that has not been used for the longest period of time.
 Associate time of last use with each page. Replace page that has not been
used in the most amount of time
 Does not suffer from Belady’s anamoly.
 12 faults for same example–better than FIFO but worse than OPT
 Generally good algorithm and frequently used, but LRU require substantial
hardware assistance.
 To determine time of last use, two implementations are used, namely
counters and stack.

Operating System Concepts – 10th Edition 10.14 Silberschatz, Galvin and Gagne ©2018
LRU Algorithm (Cont.)
 Counter implementation
• Associate with each page table entry, a time-of-use field and add to the
CPU a logical clock or counter
• Every time a page is referenced, copy the clock onto time-of-use field.
• When a page needs to be replaced, replace the page that has the
smallest time value.
 Stack implementation
• Keep a stack of page numbers as doubly linked list with head and tail
pointers.
• Whenever a page is referenced, it is removed from the stack and put
on the top.
• In this method, the least recently used page is always at the bottom
• Each update is more expensive (requires changing 6 pointers) but
there is no search for a replacement

Operating System Concepts – 10th Edition 10.15 Silberschatz, Galvin and Gagne ©2018
4. LRU Approximation Algorithms
 LRU needs special hardware and still slow
 Reference bit
• Systems provide support in the form of reference bit.
• Each page is associated with a reference bit, initially = 0
• Whenever a page is referenced, the hardware sets bit 1
• When a page is to be replaced, replace any page with reference bit = 0
(if one exists), since the order is not known.
 A) Additional-Reference-Bits Algorithm
• To gain additional ordering information, an 8-bit byte for each page in a
table is kept in memory.
• At regular intervals, the operating system shifts the reference bit for each
page by shifting the other bits right by 1 bit and discarding the low-order
bit.
• For example, a page with a history register value of 11000100 has been
used more recently than one with a value of 01110111.
• The page with lowest number is the LRU page, and it can be replaced.

Operating System Concepts – 10th Edition 10.16 Silberschatz, Galvin and Gagne ©2018
LRU Approximation Algorithms (cont.)

 B) Second-chance algorithm
• It is generally a FIFO method with hardware-provided reference bit
• When a page has been selected for replacement, its reference bit
is inspected.
 If reference bit = 0, then replace it
 If reference bit = 1 then set reference bit 0 and and its arrival
time is reset to the current time. Leave the page in memory,
giving the page a second chance.
 Thus, a page that is given a second chance will not be
replaced until all other pages have been replaced or given
second chances.
• One way to implement the second-chance algorithm is to use a
circular queue.

Operating System Concepts – 10th Edition 10.17 Silberschatz, Galvin and Gagne ©2018
Second-chance Algorithm

Operating System Concepts – 10th Edition 10.18 Silberschatz, Galvin and Gagne ©2018
5. Counting Algorithms
 Keep a counter of the number of references that have been made to each
page
 Neither MFU nor LFU replacement is common and the implementation is
very expensive.
 Least Frequently Used (LFU) Algorithm:
• Replaces page with smallest count. Reason for this selection is that an
actively used page should have a large reference count.
• Suppose a page is used heavily during the initial phase of a process
but then is never used again. Since it was used heavily, it has a large
count and remains in memory even though it is no longer needed.
 Most Frequently Used (MFU) Algorithm:
• Based on the argument that the page with the smallest count was
probably just brought in and has yet to be used

Operating System Concepts – 10th Edition 10.19 Silberschatz, Galvin and Gagne ©2018
6. Page-Buffering Algorithms
 One idea is to maintain a list of modified pages
• When paging device is idle, a modified page is selected and is
written to secondary storage and Its modify bit is reset.
• This scheme increases the probability that a page will be clean
when selected for replacement and will not need to be written out.
 Another idea is to keep pool of free frames but to remember which
page was in each frame.
• Since the frame contents are not modified when a frame is written
to secondary storage, the old page can be reused directly from the
free-frame pool if it is needed before that frame is reused. No I/O
is needed

Operating System Concepts – 10th Edition 10.20 Silberschatz, Galvin and Gagne ©2018
Raw I/O
 Some applications have better knowledge – i.e. databases
 Some operating systems give special programs / applications the
ability to use a secondary storage partition as a large sequential array
of logical blocks, without any file-system data structures.
 This array is sometimes called the raw disk, and I/O to this array is
termed raw I/O. Raw I/O bypasses all the file-system services, such
as file I/O demand paging, file locking, prefetching, space allocation,
file names, and directories.

Operating System Concepts – 10th Edition 10.21 Silberschatz, Galvin and Gagne ©2018
Allocation of Frames
 How to allocate frames to user processes, after allocating to OS.
 Each process needs minimum number of frames. Since as the number of
frames allocated to each process decreases, the page-fault rate increases,
slowing process execution.
 The minimum number of frames is defined by the computer architecture.
 The maximum number of frames is defined by the amount of available
physical memory.
 Two major allocation schemes
• Fixed allocation
 Dynamic according to level of multiprogramming
 A high-priority process is treated the same as a low-priority process
• Priority allocation
 the ratio of frames depends on the priorities of processes or on a
combination of size and priority.

Operating System Concepts – 10th Edition 10.22 Silberschatz, Galvin and Gagne ©2018
1. Fixed Allocation
 Equal allocation – The easiest way to split m frames among n processes
is to give all process an equal share, i.e., m/n frames rounded off. The left
over frames are kept as free frame buffer pool
 For example, if there are 100 frames (after allocating frames for the OS)
and 5 processes, give each process 20 frames
 Proportional allocation – Available memory is allocated to each process
according to its size
• The formula for proportional allocation and an example is given below
Formula Example
si  size of process pi m  64
S   si s1  10
m  total number of frames s2  127
10
si
ai  allocation for pi   m a1   62  4
S 137
127
a2   62  57
137
Operating System Concepts – 10th Edition 10.23 Silberschatz, Galvin and Gagne ©2018
2. Global vs. Local Allocation
 Global replacement – allows a process to select a replacement frame from
the set of all frames, even if the frame is allocated to some other process.
• A high priority process can select frames from low-priority processes for
replacement. Hence it can increase number of frames allocated to it.
• The set of pages in memory for a process depends not only on the
paging behavior of that process, but also on the paging behavior of other
processes. Hence process execution time can vary greatly
• Greater throughput so more commonly used.
 Local replacement – each process selects replacement from only its own
set of allocated frames. The number of frames allocated to a process does
not change
• The set of pages in memory for a process is affected by the paging
behavior of only that process. More consistent per-process performance
• Possible underutilization of memory

Operating System Concepts – 10th Edition 10.24 Silberschatz, Galvin and Gagne ©2018
3. Reclaiming Pages
 A strategy to implement global page-replacement policy. The purpose is
to keep the amount of free memory above a minimum threshold.
 When free memory drops below a threshold, a kernel routine known as
reapers is triggered that begins reclaiming pages from all processes in
the system. When the amount of free memory reaches the maximum
threshold, the reaper routine is suspended
 The reaper routine can adopt any page-replacement algorithm, but
mostly it uses a form of LRU approximation.
 This strategy attempts to ensure there is always sufficient free memory to
satisfy new requests.

Operating System Concepts – 10th Edition 10.25 Silberschatz, Galvin and Gagne ©2018
4. Non-Uniform Memory Access
 On non-uniform memory access (NUMA) systems with multiple CPUs, a
given CPU can access some sections of main memory faster than it can
access others.
 Performance differences are caused by how CPUs and memory are
interconnected in the system.
 NUMA systems are slower than systems in which all accesses to main
memory are treated equally, but achieve greater levels of throughput and
parallelism.

Operating System Concepts – 10th Edition 10.26 Silberschatz, Galvin and Gagne ©2018
Non-Uniform Memory Access (Cont.)

 Optimal performance comes from allocating memory “close to” the


CPU on which the process/thread is scheduled.
 When a process incurs a page fault, a NUMA-aware virtual memory
system will allocate that process a frame as close as possible to the
CPU on which the process is running.
 This results in improved cache hits and decreased memory access
times.
 The scenario gets complicated when threads are added.Solved by
Solaris by creating lgroups (locality groups)
 Structure to track CPU / Memory low latency groups

Operating System Concepts – 10th Edition 10.27 Silberschatz, Galvin and Gagne ©2018
Thrashing
 If a process does not have enough frames needed to support pages in the
working set, will quickly page fault. Now a page must be replaced. Since all
its pages are in the active use, the replaced page will be needed again.
Hence it quickly faults again and again, replacing pages that it must bring
back in immediately. This high paging activity is called thrashing.
 Hence process spends more time paging than executing, leading to low
CPU utilization. The CPU scheduler attempts to improve it by adding
process to the system. The new process takes frames from existing
processes, causing more page faults. Thereby as degree of
multiprogramming increases, thrashing occurs and system throughput
plunges,

Operating System Concepts – 10th Edition 10.28 Silberschatz, Galvin and Gagne ©2018
1. Locality model
 Can limit the effects of thrashing by using local or priority page replacement
 To prevent thrashing, a process must be provided with as many frames as it
needs. To determine count, one approach is to look at how many frames a
process is actually using. This approach is known as Locality model.

 The locality model states that, as a process executes, it moves from locality
to locality. A locality is a set of pages that are actively used together.
 A running program is composed of several different localities, which may
overlap. For example, when a function is called, it defines a new locality.
 Suppose enough frames are allocated to a process to accommodate its
current locality, then, it will not fault again until it changes localities.

Operating System Concepts – 10th Edition 10.29 Silberschatz, Galvin and Gagne ©2018
2. Working-Set Model
 The working-set model is based on locality. The parameter  defines a working-
set window The most recent set of Δ page references is the working set.
 If a page is in active use, it will be in the working set. If it is no longer used, it
will be dropped from the working set, Δ time units after its last reference.
 The accuracy of the working set depends on the selection of Δ. if  too small, it
will not encompass entire locality. if  too large, it will include several localities
 Let WSSi be the working-set size of Process Pi. then
D =  WSSi where D is the total demand for frames
 if D > m then thrashing will occur, where m is total number of available frames
 The OS monitors the working set of each process and allocates enough frames.
If there are enough extra frames, another process can be initiated. If D>m, then
OS selects a process to suspend.
 Thus thrashing is prevented while keeping the degree of multiprogramming as
high as possible.

Operating System Concepts – 10th Edition 10.30 Silberschatz, Galvin and Gagne ©2018
3. Page-Fault Frequency
 The PFF method is more direct approach than WSS.
 Establish acceptable upper and lower bounds on page-fault frequency
(PFF) rate and use local replacement policy to control page fault rate.
 If actual page-fault rate exceeds upper limit, allocate the process another
frame. If the page-fault rate falls below lower limit, remove a frame from the
process. Thus page-fault rate is controlled and thrashing is prevented.
 If the page-fault rate increases and no free frames are available, then select
some process and swap it out to backing store. The freed frames are then
distributed to processes with high page-fault rates.

Operating System Concepts – 10th Edition 10.31 Silberschatz, Galvin and Gagne ©2018

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