Explain the functional units of digital system and their inter connections.

• The digital computer or simply computer in its simplest form is a fast electronic calculating
machine that accepts digitized information from the user, processes it according to a sequence
of instructions stored in the internal storage, and provides the processed information to the
user.

• The computer consists of five functionally independent units : Input

. Input

• Memory

• Arithmetic and logic

• Output and

• Control units.

The input unit accepts the digital information from user with the help of input devices such as
keyboard,mouse, microphone etc.
The information received from the input unit is either stored in the memory for later use or
immediately used by the arithmetic and logic unit to perform the desired operations.
• The program stored in the memory decides the processing steps and the processed output is
sent to the user with the help of output devices or it is stored in the memory for later reference.

• All the above mentioned activities are co-ordinated and controlled by the control unit.

• The arithmetic and logic unit in conjunction with control unit is commonly called Central
Processing Unit (CPU).

Input Unit

• A computer accepts a digitally coded information through input unit using input devices.

• The most commonly used input devices are keyboard and mouse.

• The keyboard is used for entering text and numeric information.

• Mouse is used to position the screen cursor and thereby enter the information by selecting
option.

• Apart from keyboard and mouse there are many other input devices are available, which
include joysticks, trackball, spaceball, digitizers and scanners.
Memory Unit

• The memory unit is used to store programs and data.

• Usually, two types of memory devices are used to form a memory unit: primary storage
memory device and secondary storage memory device.

• The primary memory, commonly called main memory is a fast memory used for the storage of
programs and active data (the data currently in process).

• The main memory is a semiconductor memory.

• It consists of a large number of semiconductor storage cells, each capable of storing one bit of
information.

• These cells are read or written by the central processing unit in a group of fixed size called
word.

• The main memory is organized such that the contents of one word, containing n bits, can be
stored or retrieved in one write or read operation, respectively.

• To access data from a particular word from main memory each word in the main memory has
a distinct address. This allows to access any word from the main memory by specifying
corresponding address.

• The number of bits in each word is referred to as the word length of the computer. Typically,
the word length varies from 8 to 64 bits.

• The number of such words in the main memory decides the size of memory or capacity of the
memory.
• The size of computer main memory varies from few million words to tens of million words.

• An important characteristics of a memory is an access time (the time required to access one
word). The access time for main memory should be as small as possible. Typically, it is of the
order of 10 to 100 nanoseconds. The access time depends on the type of memory. In randomly
accessed memories (RAMs), fixed time is required to access any word in the memory. In
sequential access memories this time is not fixed.

• The main memory consists of only randomly accessed memories. These memories are fast but
they are small in capacities and expensive. Therefore, the computer uses the secondary storage
memories such as magnetic tapes, magnetic disks for the storage of large amount of data.

Stored program concept

• Today's computer are built on two key principles

1.Instructions are represented as numbers.

2. Programs can be stored in memory to be read or written just like numbers. These principles
lead to the stored-program concept.

• According to stored-program concept, memory can contain the program (source code), the
corresponding compiled machine code, editor program and even the compiler that generated
the machine code.

Arithmetic and Logic Unit

• The arithmetic and logic unit (ALU) is responsible for performing arithmetic operations such as
add, subtract, division and multiplication and logical operations such as ANDing, ORing,
Inverting etc.

• To perform these operations, operands from the main memory are brought into the high
speed storage elements called registers of the processor.

• Each register can store one word of data and they are used to store frequently used operands.

• After performing operation, the result is either stored in the register or memory location.

Output Unit

• The output unit sends the processed results to the user using output devices such as video
monitor, printer, plotter, etc.

• The video monitors display the output on the CRT screen whereas printers and plotters give
the hard-copy output.
• Printers are classified according to their printing methodology: Impact printers and non-
impact printers.

Control Unit

• The control unit co-ordinates and controls the activities amongst the functional units.

• Control unit fetches the instructions stored in the main memory, identify the operations and
the devices involved in it and accordingly generate control signals to execute the desired
operations.

• It uses control signals or timing signals to determine when a given action is to take place.

• It controls input and output operations, data transfers between the processor, memory and
input/output devices using timing signals.

• The control and the arithmetic and logic units of a computer are usually many times faster
than other devices connected to a computer system. This enables them to control a number of
external input/output devices.

Draw a block diagram of a computer’s CPU showing all the basic building blocks such as
program counter, accumulator,address and data registers, instruction register, control unit
etc.,and describe how such an arrangement can work as a computer, ifconnected properly to
memory, input/output etc.

1. Central Processing Unit (CPU):

  The brain of the computer.

 Performs calculations and executes instructions.

2. Control Unit:

 Manages the operation of the CPU.

 Controls the flow of data and instructions within the CPU.

3. Arithmetic Logic Unit (ALU):

 Performs arithmetic (like addition, subtraction) and logical operations (like AND, OR).

4. Registers:

 Small, fast storage locations inside the CPU.

 Hold data temporarily during processing.

5. Program Counter (PC):

 Keeps track of the memory address of the next instruction to be executed.

6. Instruction Register (IR):

 Holds the current instruction being executed.

7. Accumulator (ACC):

 Stores the results of calculations temporarily.

8. Memory Address Register (MAR) and Memory Data Register (MDR):

 MAR holds the address in memory being read from or written to.

 MDR holds the data being transferred to or from memory.

9. Clock:

 Synchronizes the operations of the CPU.

Arrangement of CPU, memory, input/output to

work as a computer :
1. Input Unit:

 Devices like keyboard, mouse, etc., feed data and instructions into the computer.

2. Memory:

 RAM holds data and instructions currently being used by the CPU.

 CPU interacts with memory through the address bus and data bus.

3. Processing:

 CPU fetches instructions from memory into the IR using the PC.

 Instruction in the IR is decoded and executed by the control unit.

 ALU performs calculations and manipulates data stored in registers like ACC.

4. Output Unit:

 Devices like monitor, printer, etc., receive processed data and display or print it.

5. Control:

 Control unit coordinates the flow of data and instructions between CPU,
memory, and I/O devices.

 It ensures instructions are executed in the correct sequence.

 6. Feedback Loop:

 Results from processing may lead to new data being input, stored, or displayed,
forming a continuous loop of operation.

What is Register Transfer Language?

Register Transfer Language (RTL) is a low-level language that is used to describe the functioning
of a digital circuit and, more specifically, the transfer of information between registers. It
provides how data moves from one register to the other and how data is processed within the
digital system. Through RTL, there is a capability of creating abstraction levels where high-level
design descriptions can be created and easily linked to low-level hardware implementation in
designing, simulating, as well as synthesizing digital circuits.

Key Concepts of Register Transfer Language(RTL)

 The meaningful descriptions are provided by RTL for the flow of data between the
registers of the hardware.

 It is applied to the representation of synchronous circuits: circuits that are controlled by

clock signals.

 Transfer of data and logical operations are described for the register level.

 As mentioned earlier, RTL designs are documented most often in hardware description
languages, including Verilog or VHDL.

 It is an abstraction layer between high-order Application Specific Integrated Circuits

(ASICs) and physical devices.

Usage of RTL in Digital Design

 Proclaims the nature of hardware at the register-transfer level.

 Formerly utilized to model data flow while using registers.

 Assists in generation to gate level of designs.

 It allows simulation and validation of the relevant behaviors of the hardware under
design.

 Serves as the foundation for developing circuits within the digital domain with the use
of HDLs.

Micro-operations
The operation executed on the data store in registers are called micro-operations. They are
detailed low-level instructions used in some designs to implement complex machine
instructions.

Register Transfer

The information transformed from one register to another register is represented in symbolic
form by replacement operator is called Register Transfer.

Replacement Operator

In the statement, R2 <- R1, <- acts as a replacement operator. This statement defines the
transfer of content of register R1 into register R2.

There are various methods of RTL

1. General way of representing a register is by the name of the register enclosed in a

rectangular box as shown in (a).

2. Register is numbered in a sequence of 0 to (n-1) as shown in (b).

3. The numbering of bits in a register can be marked on the top of the box as shown in (c).

4. A 16-bit register PC is divided into 2 parts- Bits (0 to 7) are assigned with lower byte of
16-bit address and bits (8 to 15) are assigned with higher bytes of 16-bit address as
shown in (d).
Basic symbols of RTL

Symbol Description Example

Letters and MAR, R1,

Denotes a Register
Numbers R2

R1(8-bit)
() Denotes a part of register
R1(0-7)

<- Denotes a transfer of information R2 <- R1

R1 <- R2
, Specify two micro-operations of Register Transfer
R2 <- R1

P : R2 <- R1
: Denotes conditional operations
if P=1

Naming Operator Denotes another name for an already existing Ra := R1

Symbol Description Example

(:=) register/alias

Register Transfer Operations

The operation performed on the data stored in the registers are referred to as register transfer
operations.

There are different types of register transfer operations:

1. Simple Transfer – R2 <- R1

The content of R1 are copied into R2 without affecting the content of R1. It is an unconditional
type of transfer operation.

2. Conditional Transfer

It indicates that if P=1, then the content of R1 is transferred to R2. It is a unidirectional

operation.

3. Simultaneous Operations –
If 2 or more operations are to occur simultaneously then they are separated with comma (,).
Bus Transfer in Computer Architecture

A bus transfer is the most effective method to send data by using a common bus system. It is
constructed using common bus registers in multiple registers. The mechanism of the bus
includes a collection of lines. These lines are registers of one bit each, which share only one
information at a time. The data transfer is contained by the control signals.

The two methods that can be used in Bus transfer are as follows −

 Using multiplexer

 Using three states bus buffers

Using Multiplexer

A common bus can be generated using a multiplexer. It facilitates in choosing the source register
to place the binary data on the bus. The bus register has input and output gating controlled by
control signals. The diagram demonstrates the input and output gating of registers.
 Ri is the register and Rin and Rout are the input and output gating signals of Ri.

 Z is the register and Zin and Zout are the input and output gating signal of register Z.

 Y is the register and Yin and Yout are the input and output signals of Y.
The figure shows input and output gating. The switches are controlled by control signals. Rin
and Rout are the input and output gating of the register Ri. When the signal is ON, Ri is set to 1
and when the signal is OFF, Ri is set to 0.

When the input gating Rin is set to 1, the data is loaded into the register bus Ri accessible on the
common bus. When Rout is set to 1, the contents of the register Ri are placed on the data bus.
It is referred to as input enabled and output enabled signals. The functions that take place
inside the processor are in sync with the clock pulse.

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Three-State Buffers

Three-state buffers can generate a common bus. The buffer is an area of the memory, which is
added in between the other devices to block several interactions and to connect the support. It
is established on the three states, 1, 0, and the open circuit. These three states defines are as
follows −

 The logic 0 and 1 are the two signals similar to the ones in the conventional gate.

 The high impedance state defines that it does not contain the logic significance and the
output is separated.

 These three-state gates can implement any conventional logic AND or NAND, OR, or
NOR.

The diagram demonstrates the logic symbols and the associated truth table.
As shown in the figure −

 When the output is allowed and the control input is similar to 1. The logic gate performs
as a buffer with the output similar to the input.

 When the input is provided is 0, the gate goes too high impedance state Z and the
output is disabled.

 The impedance in three-state buffers linked all the outputs with a cable to produce a
common bus line and does not threaten the loading effect.

 The truth table shows that when some input is given and the gate is disabled, it shows in
high impedance.

 When the gate is enabled with some input given, then the output results are not in
disabled mode.

 When the gate is enabled with input as 1, the output is similar to 1.

Describe the architecture of bus.

1. TWO Parts: Address Bus and Data Bus:

 Think of the computer bus like a busy highway. It has two lanes:
one for sending addresses (like street names) and one for
sending actual data (like cars).

2. Purpose of Each Part:

  The address bus is like the lane that tells where the data needs
to go. It carries information about memory locations or
addresses.

 The data bus is like the lane where actual cars (data) travel. It’s
for moving the information itself.

3. Physical Links and Control:

 The bus is like the road system of a city, providing the physical
paths for communication between different parts of the
computer. It also manages the traffic flow, ensuring that data
and addresses get to where they need to be.

4. High-Speed Data Transfer:

 The main job of the bus is to quickly move data between the
central processing unit (CPU) and memory. It’s like a super-fast
expressway between the brain of the computer (CPU) and its
memory.

5. Connecting I/O Devices:

 Most devices you plug into a computer, like keyboards, mice, or

printers, aren’t as fast as the CPU or memory. So, they connect to
the bus through special entry points called Input/Output (I/O)
ports. These ports act like on-ramps to the bus, letting slower
devices communicate with the rest of the computer.
Discuss the bus arbitration.OR Write a short note on bus arbitration.

Bus arbitration is a crucial mechanism in computer systems where multiple devices, such as
masters and slaves, are connected to a shared communication bus. This mechanism determines
which device gets to access the bus at any given time, especially when multiple devices are
trying to access it simultaneously.

There are three common methods used for bus arbitration:

1. Daisy Chaining:

 This method is simple and cost-effective.

 All masters share the same line for requesting access to the bus.

 The bus grant signal moves sequentially through each master until it reaches the
one currently requesting access.

2. Parallel Arbitration:

 Parallel arbitration involves a priority encoder and decoder.

 Each bus arbiter has both a bus request output line and input line.
  The priority encoder determines which device has the highest priority to access
the bus, and the decoder translates this into granting access accordingly.

3. Independent Priority:

 In this method, each master has its own pair of bus request and bus grant lines.

 Each pair is assigned a priority level.

 When multiple devices request access simultaneously, the one with the highest
priority, as determined by its assigned priority level, is granted access to the bus.

Discuss the advantages and disadvantages of pollingand daisy chaining bus arbitration
schemes.OR Explain daisy changing method. Write its advantages and disadvantages.

Advantages:

1. It’s simple and doesn’t require many extra lines or signals.

2. It’s cost-effective because you only need one line for requests, regardless of how many
friends (or “masters”) there are.

Disadvantages:

1. If there are a lot of friends in line, it can take a while for the request to reach the right
one, making the process slow.

2. The order of who gets priority is fixed by where each friend stands in the line, which
might not be ideal.

3. If one friend (master) has a problem, it can disrupt the whole system.
Polling Bus Arbitration:

Now, let’s say instead of a line, your friends use a different method. They each have a button to
press to request computer time. Then there’s a controller who checks each button one by one in
a specific order, giving access to the friend whose button was pressed first.

Advantages:

1. If one friend has a problem or doesn’t want to use the computer anymore, it doesn’t
affect the others.

2. You can change the order of who gets priority by reprogramming the controller, giving
more flexibility.

Disadvantages:

1. It requires more buttons and signals, which can make the system more complex.

2. The process of checking each button (or “polling”) can take up a lot of time and
resources, like CPU power, especially if there are many friends wanting to use the
computer.

Explain the Booth’s algorithm in depth with the help off low chart.
Give an example for multiplication using Booth’s algorithm. OR
Discuss the Booth’s algorithm for 2’s complement number. Also
illustrate it with the some example.OR Explain Booth’s multiplication
algorithm in detail.

The algorithm for 2’s complement multiplication is as follows :

Step 1 : Load multiplicand in B, multiplier in Q. For negative numbers, 2’s complement format to
be used.
Step 2 : Initialize the down counter CR by the number of bits involved.
Step 3 : Clean locations A (n-bits) and Qn + 1 (1-bit).
Step 4 : Check LS bit of Qn and Qn + 1 jointly. If the pattern is 00 or 11 then go to Step 5. If 10, then
A = A – B. If 01, then A = A + B.
Step 5 : Perform arithmetic right-shift with A, Qn and Qn + 1. LS of A goes to MS of Qn and LS of Q
goes to Qn + 1. Old content of Qn +1 is discarded.
Step 6 : Decrement CR by one. If CR is not zero then go to Step 4.
Step 7 : Final result (or the product) is available in A (higher part) and Q n(lower part).
Example : Both negative (– 5 × – 4)
Explain IEEE standard for floating point numbers.OR How floating point numbers are
represented in computer, also give IEEE 754 standard 32-bit floating point number format.