0% found this document useful (0 votes)
4 views34 pages

Week 2

The document outlines the content for Week 2 of the EE 451 course on Power System Analysis and Design, covering topics such as impedance and reactance diagrams, examples, and the bus admittance matrix. It provides detailed examples of drawing impedance and reactance diagrams for various power system components, as well as the process of converting impedances to per unit values. Additionally, it discusses the formulation of node-voltage equations using the bus admittance matrix method.

Uploaded by

maqibwazir101
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
4 views34 pages

Week 2

The document outlines the content for Week 2 of the EE 451 course on Power System Analysis and Design, covering topics such as impedance and reactance diagrams, examples, and the bus admittance matrix. It provides detailed examples of drawing impedance and reactance diagrams for various power system components, as well as the process of converting impedances to per unit values. Additionally, it discusses the formulation of node-voltage equations using the bus admittance matrix method.

Uploaded by

maqibwazir101
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 34

EE 451: Power System Analysis and Design

Week 2

Noor Ul Ain

Department of Electrical Engineering


University of Engineering and Technology, Lahore

January 24, 2025

(EED, UET Lahore) Week 2 January 24, 2025 1 / 34


Today’s Contents

Topics to be Covered

• Impedance and Reactance Diagrams


• Examples
• Bus Admittance Matrix

Reference:
• Per unit analysis: Chapter 3, Article (3.13, 3.14), Hadi Saadat
• Impedance and Reactance Diagram: Chapter 1, Article (1.13, 1.14),
Stevenson
• Bus Admittance Matrix: Chapter 6, Article (6.1, 6.2), Hadi Saadat

(EED, UET Lahore) Week 2 January 24, 2025 2 / 34


Impedance and Reactance Diagram

Impedance and Reactance Diagrams

• The figure below shows a single line diagram or oneline diagram


of a power system. It indicates, by the use of a single line and
standard symbols, how the transmission lines and associated
apparatus of an electric system are connected

(EED, UET Lahore) Week 2 January 24, 2025 3 / 34


Impedance and Reactance Diagram

Impedance and Reactance Diagrams


• To evaluate the performance of the power system under loaded
condition or upon occurence of fault, one-line diagram is used to
draw the single-phase or per-phase equivalent circuit of the system
• The per phase impedance diagram of the system of SLD on previous
slide is shown below
• The current-limiting impedances of generators are not shown as no
current flows in the ground under balanced conditions

(EED, UET Lahore) Week 2 January 24, 2025 4 / 34


Impedance and Reactance Diagram

Impedance and Reactance Diagrams


• Resistance is often omitted as inductive reactance of system is much
larger than the resistance
• The shunt current of a transformer is usually insignificant compared
to full load current and is usually omitted
• Loads not involving rotating machinery have little effect on total line
current during fault so these are also omitted
• Correspondingly, the impedance diagram can be reduced to
per-phase reactance diagram

(EED, UET Lahore) Week 2 January 24, 2025 5 / 34


Impedance and Reactance Diagram

Example - 1

Draw the impedance diagram of the following network with all reactances
marked in per-unit.
• A-B: 10000 kVA, 13.8/138kV, leakage reactance = 10%
• B-C: 10000 kVA, 138/69kV, leakage reactance = 8%
Select parameters of circuit B (10000 kVA, 138 kV) as base parameters
of system, find the per-unit impedance of 300 Ω resistive load in circuit
C referred to circuits C, B and A.

(EED, UET Lahore) Week 2 January 24, 2025 6 / 34


Impedance and Reactance Diagram

Solution

• Rule - 1: SB should remain same


• Rule - 2: VB changes according to the turns ratio of the transformer

• SB = 10000
• VB for circuit B is 138 kV
• VB for circuit A is 138 kV × 1
10 = 13.8 kV
• VB for circuit C is 138 kV × 1
2 = 69 kV

(EED, UET Lahore) Week 2 January 24, 2025 7 / 34


Impedance and Reactance Diagram

ZL = 300Ω
(kVB )2 × 1000 (69)2 × 1000
ZB = = = 476 Ω
kV AB 10, 000
ZL 300
Zpu = = = 0.63pu
ZB 476
Load impedance referred to circuit B
 2
2
ZL ( referred to circuit B ) = × 300 = 1200 Ω
1
(138)2 × 1000
ZB ( referred to circuit B ) = = 1900 Ω
10, 000
ZL 1200
Zpu ( referred to circuit B ) = = = 0.63 pu
ZB 1900

(EED, UET Lahore) Week 2 January 24, 2025 8 / 34


Impedance and Reactance Diagram

Load impedance referred to circuit A


 2  2
2 1
ZL ( referred to circuit A ) = × 300 = 12 Ω
1 10
(13.8)2 × 1000
ZB ( referred to circuit A ) = = 19 Ω
10, 000
ZL 12
Zpu ( referred to circuit B ) = = = 0.63 pu
ZB 19

0.1j pu 0.08j pu

0.63 pu

(EED, UET Lahore) Week 2 January 24, 2025 9 / 34


Impedance and Reactance Diagram

Example - 2
Draw the reactance diagram of the following network with all reactances
marked in per unit.
• Generator: 300 MVA, 20 kV, X = 0.2 pu
• Transformer T1 : 350 MVA, 20/230 kV, X = 0.1 pu
• Transmission Line: 64 km, X = 0.5 Ω/km
• Transformer T2 : 3, 1-phase transformers each
100 MVA, 127/13.2 kV, X = 0.1pu
• Motor M1 : 200 MVA, 13.2 kV, X = 0.2 pu
• Motor M2 : 100 MVA, 13.2 kV, X = 0.2 pu

Select parameters of generator circuit (300 MVA, 20 kV) as base


parameters of system.
(EED, UET Lahore) Week 2 January 24, 2025 10 / 34
Impedance and Reactance Diagram

Solution
SB = 300 MVA
VB of circuit 1: VB1 = 20 kV
VB of circuit 2: VB2 = 230 kV
VB of circuit 3: VB2 = 13.8 kV

300 20 2
   
Xg1 = j0.2 × × = j0.2 pu
300 20
  2
300 20

XT1 = j0.1 × × = j0.0857 pu
350 20
300 230 2
   
XT1 = j0.1 × × = j0.0857 pu
350 230
MV AB
XT L = Xa ×
(RVB )2
300
= 0.5 × 64 × = j0.18 pu
(230)2
(EED, UET Lahore) Week 2 January 24, 2025 11 / 34
Impedance and Reactance Diagram

300 13.2 2
   
XT2 = j0.1 × × = j0.09 pu
300 13.8
√ !2
300 127 3
 
XT2 = j0.1 × × = j0.09 pu
300 230
300 13.2 2
   
Xm1 = j0.2 × × = j0.27 pu
200 13.8
300 13.2 2
   
Xm2 = j0.2 × × = j0.54 pu
100 13.8

(EED, UET Lahore) Week 2 January 24, 2025 12 / 34


Impedance and Reactance Diagram

Reactance Diagram

0.0857j 0.18j 0.09j

0.2j
0.27j 0.54j

Eg Em1 Em2

(EED, UET Lahore) Week 2 January 24, 2025 13 / 34


Impedance and Reactance Diagram

Example - 3

Assume a three-phase, unity power factor load of 100 MVA with VLL of
69 kV is connected to a source through the below network. Convert the
two impedances to per unit,and then determine the per unit generator
voltage (magnitude and angle). Use a per unit three-phase 100 MVA
base, a line-to-line 138 kV voltage base on the left side of the
transformer and a line-to-line 69 kV voltage base on the right side

5.06 + j23.7 4j Ω
138:69

• VG pu =1.047 ∠11.45◦ pu
(EED, UET Lahore) Week 2 January 24, 2025 14 / 34
Nodal Analysis

Bus Admittance Matrix


In order to obtain the node-voltage equations, consider the simple power
system shown in Figure where impedances are expressed in per unit on a
common MVA base and for simplicity resistances are neglected.

(EED, UET Lahore) Week 2 January 24, 2025 15 / 34


Nodal Analysis

Consider the voltage source VS with a source (series) impedance of ZS


as shown in figure (a). Using Norton’s theorem this circuit can be
replaced by a current source Is with a parallel admittance of YS as shown
in figure (b). The relations between the original system and the Norton
equivalent are

VS 1
IS = and YS =
ZS ZS

(EED, UET Lahore) Week 2 January 24, 2025 16 / 34


Nodal Analysis

Since the nodal solution is based upon Kirchhoff’s current law,


impedances are converted to admittance, i.e.,
1 1
yij = =
zij rij + jxij

(EED, UET Lahore) Week 2 January 24, 2025 17 / 34


Nodal Analysis

Applying KCL to the independent nodes 1 through 4 results in

I1 = y10 V1 + y12 (V1 − V2 ) + y13 (V1 − V3 )


I2 = y20 V2 + y12 (V2 − V1 ) + y23 (V2 − V3 )
0 = y23 (V3 − V2 ) + y13 (V3 − V1 ) + y34 (V3 − V4 )
0 = y34 (V4 − V3 )
(EED, UET Lahore) Week 2 January 24, 2025 18 / 34
Nodal Analysis

Rearranging these equations yields


I1 = (y10 + y12 + y13 ) V1 − y12 V2 − y13 V3
I2 = −y12 V1 + (y20 + y12 + y23 ) V2 − y23 V3
0 = −y13 V1 − y23 V2 + (y13 + y23 + y34 ) V3 − y34 V4
0 = −y34 V3 + y34 V4
We introduce the following admittances
Y11 = y10 + y12 + y13 Y22 = y20 + y12 + y23
Y33 = y13 + y23 + y34 Y44 = y34
Y12 = Y21 = −y12 Y13 = Y31 = −y13
Y23 = Y32 = −y23 Y34 = Y43 = −y34

• Y11 , Y22 , Y33 , Y44 are the self admittance of node or bus and are sum
of all admittance connected to that bus
• Y12 , Y13 , Y23 and Y34 are mutual admittances and are negative of
admittance connected between selected buses i and j.
(EED, UET Lahore) Week 2 January 24, 2025 19 / 34
Nodal Analysis

Using the definitions the following equations

I1 = (y10 + y12 + y13 ) V1 − y12 V2 − y13 V3


I2 = −y12 V1 + (y20 + y12 + y23 ) V2 − y23 V3
0 = −y13 V1 − y23 V2 + (y13 + y23 + y34 ) V3 − y34 V4
0 = −y34 V3 + y34 V4

are modified to
I1 = Y11 V1 + Y12 V2 + Y13 V3 + Y14 V4
I2 = Y21 V1 + Y22 V2 + Y23 V3 + Y24 V4
I3 = Y31 V1 + Y32 V2 + Y33 V3 + Y34 V4
I4 = Y41 V1 + Y42 V2 + Y43 V3 + Y44 V4

In the above network, since there is no connection between bus 1 and


4, Y14 = Y41 = 0; similarly Y24 = Y42 = 0.

(EED, UET Lahore) Week 2 January 24, 2025 20 / 34


Nodal Analysis

I1 = Y11 V1 + Y12 V2 + Y13 V3 + Y14 V4


I2 = Y21 V1 + Y22 V2 + Y23 V3 + Y24 V4
I3 = Y31 V1 + Y32 V2 + Y33 V3 + Y34 V4
I4 = Y41 V1 + Y42 V2 + Y43 V3 + Y44 V4

In matrices form
    
I1 Y11 Y12 Y13 Y14 V1
 I2   Y21 Y22 Y23 Y24  V2 
=
    
I3 Y31 Y32 Y33 Y34 V3
  
    
I4 Y41 Y42 Y43 Y44 V4

This matrix of admittances is called Ybus

(EED, UET Lahore) Week 2 January 24, 2025 21 / 34


Nodal Analysis

 
−j8.50 j2.50 j5.00 0
 j2.50 −j8.75 j5.00 0 
Ybus = 
 
j5.00 j5.00 −j22.50 j12.50

 
0 0 j12.50 −j12.50

(EED, UET Lahore) Week 2 January 24, 2025 22 / 34


Ybus

Admittance Matrix - Ybus

Extending the above relation to an n bus system, the node-voltage


equation in matrix form is
    
I1 Y11 Y12 · · · Y1i · · · Y1n V1

 I2  
  Y21 Y22 · · · Y2i · · · Y2n 
 V2 

 ..   .. .. .. ..  .. 
 .   . . . .  . 
=
    
Ii Yi1 Yi2 · · · Yii ··· Yin  Vi
  
    
.. .. .. .. ..   ..
    
   
 .   . . . .  . 
In Yn1 Yn2 · · · Yni · · · Ynn Vn
or

Ibus = Ybus Vbus


When the bus currents are known, it can be solved for the n bus voltages.

(EED, UET Lahore) Week 2 January 24, 2025 23 / 34


Ybus

Admittance Matrix - Ybus

−1
Vbus = Ybus Ibus

• Ibus is the vector of the injected bus currents (i.e., external current
sources).
• The current is positive when flowing towards the bus, and it is
negative if flowing away from the bus.
• Vbus is the vector of bus voltages measured from the reference node
(i.e., node voltages).
• Ybus is known as the bus admittance matrix.
• The inverse of the bus admittance matrix is known as the bus
impedance matrix Zbus .

(EED, UET Lahore) Week 2 January 24, 2025 24 / 34


Ybus

Admittance Matrix - Ybus

• The diagonal element of each node is the sum of admittances


connected to it. It is known as the self-admittance or driving
point admittance, i.e.,
n
X
Yii = yij j ̸= i
j=0

• The off-diagonal element is equal to the negative of the admittance


between the nodes. It is known as the mutual admittance or
transfer admittance, i.e.,

Yij = Yji = −yij

(EED, UET Lahore) Week 2 January 24, 2025 25 / 34


Ybus

Admittance Matrix - Ybus

• Inspection of the bus admittance matrix reveals that the matrix is


symmetric along the leading diagonal, and we need to store the
upper triangular nodal admittance matrix only.
• In a typical power system network, each bus is connected to only a
few nearby buses. Consequently, many off-diagonal elements are
zero. Such a matrix is called sparse, and efficient numerical
techniques can be applied to compute its inverse.
• However, Zbus , which is required for short-circuit analysis, can be
obtained directly by the method of building algorithm without the
need for matrix inversion (will be discussed in coming lectures)

(EED, UET Lahore) Week 2 January 24, 2025 26 / 34


Ybus

Example - 3
Find Ybus

(EED, UET Lahore) Week 2 January 24, 2025 27 / 34


Ybus

Solution

Conversion from reactance to admittance diagram

(EED, UET Lahore) Week 2 January 24, 2025 28 / 34


Ybus

    
−j14.5 j8.0 j4.0 j2.5 V1 0
 j8.0 −j17.0 j4.0 j5.0  V2   0 
=
    
j4.0 j4.0 −j8.8 0.0 V3 1.00∠ − 90◦
  
    
j2.5 j5.0 0.0 −j8.3 V4 0.68∠ − 135◦
(EED, UET Lahore) Week 2 January 24, 2025 29 / 34
Ybus

Example - 4
Find Ybus

(EED, UET Lahore) Week 2 January 24, 2025 30 / 34


Ybus

Example - 5
Find Ybus

(EED, UET Lahore) Week 2 January 24, 2025 31 / 34


Ybus

Matlab Function for Ybus

Suppose the network data is given in the following form, develop a


Matlab function to determine the Ybus .

(EED, UET Lahore) Week 2 January 24, 2025 32 / 34


Ybus

(EED, UET Lahore) Week 2 January 24, 2025 33 / 34


Ybus

Thank You

(EED, UET Lahore) Week 2 January 24, 2025 34 / 34

You might also like