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6-Introduction to microprocessors programming_085041

Microprocessors execute programs in binary form, with programmers using assembly or high-level languages to write code, which is then processed by editors, assemblers, linkers, and debuggers. CISC and RISC are two types of processor architectures, where CISC focuses on complex instructions to reduce code length and RISC emphasizes simplicity and efficiency for speed. The instruction cycle of a microprocessor consists of fetching, decoding, and executing instructions, with each instruction comprising an opcode and an operand.

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4 views7 pages

6-Introduction to microprocessors programming_085041

Microprocessors execute programs in binary form, with programmers using assembly or high-level languages to write code, which is then processed by editors, assemblers, linkers, and debuggers. CISC and RISC are two types of processor architectures, where CISC focuses on complex instructions to reduce code length and RISC emphasizes simplicity and efficiency for speed. The instruction cycle of a microprocessor consists of fetching, decoding, and executing instructions, with each instruction comprising an opcode and an operand.

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1.

7 Programming Microprocessors
Microprocessors execute programs stored in the memory in the form of a sequence
of binary digits. Programmers do not write the program in binary form but write it
either in the form of a text file containing an assembly-language source code or
using a high-level language. Programs such as editor, assembler, linker and
debugger enable the user to write the program in assembly language, convert it into
binary code and debug the binary code. Editor is a program that allows the user to
enter, modify and store a group of instructions or text under a file name. The
assembly language source code is translated into an object code by a program called
assembler. Linker converts the output of the assembler into a format that can be
executed by the microprocessor. The debugger is a program that allows the user to
test and debug the object file. Programming in assembly language produces a code
that is fast and takes up little memory. However, it is difficult to write large
programs using assembly language. Another disadvantage of
assemblylanguageprogrammingisthatitisspecifictoaparticularmicroprocessor.High-
levellanguage programming overcomes these problems. Some of the popular high-
level languages used include C, C++, Pascal and so on. Compiler programs are
primarily used to translate the source code from a high-level language to a lower-
level language (e.g. assembly language or machine language). Figures 1.10(a) and
(b) show the various steps involved in executing assembly language programs and
programs written in high-level languages respectively.
Figure 1.10 (a) Various steps involved in executing assembly language programs
and (b) various steps involved in executing programs written in high-level
languages.

1.8 RISC Versus CISC Processors


CISC is an acronym for Complex Instruction Set Computer. The primary goal of
CISC architecture is to complete a task in as few lines of assembly as possible. This
is achieved by building processor hardware that is capable of understanding and
executing a series of complex operations. In this case, each instruction can execute
several low-level instructions. One of the primary advantages of this system is that
the compiler has to do very little work to translate a high-level language statement
into assembly. Because the length of the code is relatively short, very little RAM is
required to store instructions. In a nutshell, the emphasis is to build complex
instructions directly into the hardware. Examples of CISC processors are the CDC
6600, System/360, VAX, PDP-11, the Motorola 68000 family, and Intel and AMD
x86 CPUs. RISC is an acronym for Reduced Instruction Set Computer. This type
of microprocessor emphasizes simplicity and efficiency. RISC designs start with a
necessary and sufficient instruction set. The objective of any RISC architecture is
to maximize speed by reducing clock cycles per instruction. Almost all
computations can be done from a few simple operations. The goal of RISC
architecture is to maximize the effective speed of a design by performing infrequent
operations in software and frequent functions in hardware, thus obtaining a net
performance gain. Tounderstandthisphenomenon,consideranyassembly-
levellanguageprogram.Ithasbeenobserved that it uses the MOV instruction much
more frequently than the MUL instruction. Therefore, if the architectural design
implements MOV in hardware and MUL in software, there will be a considerable
gain in speed, which is the basic feature of RISC technology. Examples of RISC
processors include Sun’s SPARC, IBM and Motorola’s PowerPCs, and ARM-based
processors. The salient features of a RISC processor are as follows:
1. The microprocessor is designed using hard-wired control. For example, one bit
can be dedicated for one instruction. Generally, variable-length instruction formats
require microcode design. All RISC instructions have fixed formats, so no
microcode is required.
2. The RISC microprocessor executes most of the instructions in a single clock
cycle. This is due to the fact that they are implemented in hardware.
3. The instruction set typically includes only register-to-register load and store.
4. The instructions have a simple format with few addressing modes.
5. The RISC microprocessor has several general-purpose registers and large cache
memories, which support the very fast access of data.
6. The RISC microprocessor processes several instructions simultaneously and so
includes pipelining.
7. The software can take advantage of more concurrency.

1.9 Operations of a microprocessor


The instruction cycle
It the time required to complete the execution of an instruction. It can be divided
into three phases; the fetch, the decode and the execute cycles.
1. The fetch cycle:
 The content of the program counter is outputted onto the address bus;
 After a short delay(access time) the content of the selected memory
location is outputted onto the data bus;
 The content of the data bus is transferred into the instruction register.

2. Decoding of the instruction and fetching of the operand: The control


unit decodes (identifies) the instruction.
 The control unit transforms the instruction into a sequence of
microinstructions;
 If the instruction requires an operand from memory, the control unit
ensures that it is loaded from memory onto the data bus;
 The operand is then transferred into an internal register of the
microprocessor.
3. Execution cycle:
 The ALU carries out the operation and the results are temporary stored
in the accumulator;
 The appropriate bits of the flag register are set;
 The control unit increments the content of the program counter so that
it points to the next instruction in the program.

II.2.1 Timing diagram of an instruction cycle


The figure below is just a representation of the instruction cycle of a certain
processor.
The execution cycle for this processor includes the decode and execute cycle. The
time required to execute an instruction depends on the type of instruction. An
instruction cycle can take one or more clock cycles.
II.3 Structure of an Instruction
The computer is capable of carrying out arithmetic and logical operations. Each
of these operations goes with an instruction. An instruction is made up of two
parts; the operation to be performed (Opcode) and the data associated to the
opcode (Operand). The operand can be the address of where the data is found or
it may be the data itself. The operand can one, two or three bytes in size.
Instruction: OPCODE OPERAND

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