DLD Laboratory Manual 4
DLD Laboratory Manual 4
Encoder
Decoder
Multiplexer
Demultiplexer
Electrical Diagram
Fig.2.1.1
Components List
74LS147
Calculation data
INPUT OUTPUT
1 2 3 4 5 6 7 8 9 D C B A
1 1 1 1 1 1 1 1 1 1 1 1 1
X X X X X X X X 0 0 1 1 0
X X X X X X X 0 1 0 1 1 1
X X X X X X 0 1 1 1 0 0 0
X X X X X 0 1 1 1 1 0 0 1
X X X X 0 1 1 1 1 1 0 1 0
X X X 0 1 1 1 1 1 1 0 1 1
X X 0 1 1 1 1 1 1 1 1 0 0
X 0 1 1 1 1 1 1 1 1 1 0 1
0 1 1 1 1 1 1 1 1 1 1 1 0
Tab.2.1
Topographical diagram
Fig.2.1.2
Obtained Results
INPUT OUTPUT
1 2 3 4 5 6 7 8 9D C B A
1 1 1 1 1 1 1 1 1
X X X X X X X X 0
X X X X X X X 0 1
X X X X X X 0 1 1
X X X X X 0 1 1 1
X X X X 0 1 1 1 1
X X X 0 1 1 1 1 1
X X 0 1 1 1 1 1 1
X 0 1 1 1 1 1 1 1
0 1 1 1 1 1 1 1 1
Tab.2.2
EXPERIMENTATION
Insert the Module DL 3155M18 in the console and to set the main switch to ON;
BCD DECIMAL-BINARY CODE CONVERTER CIRCUIT
Connect the circuit like in Fig.2.1.2;
Set the switch 1 of the DECIMAL-SWITCH "ON" (logic state "1");
Observe the logic state present on the LOGIC PROBES (0 = L1, 1 = H1) and write it in Tab.2.2;
Repeat the previous operations for all the combinations of the input logic states written in
Tab.2.2 and to write, in the same table the corresponding output logic values;
Verify that Tab.2.1 corresponds to the truth table of the BCD decimal-binary code converter
circuit;
Remove all the connections;
EXERCISE 2: BCD - 7 segments binary code converter
circuit
The purpose is to carry out a circuit that is able perform the decoding of a binary configuration of 4
bits into the corresponding 7 SEGMENTS configuration.
Electrical Diagram
Fig.2.2.1
Components List
74LS48
Calculation data
OUTPUT
DECIMAL INPUT 7-
FIGURES SEGMENTS
D C B A ab cd e f g
0 0 0 0 0 1 1 1 1 110
1 0 0 0 1 0 1 1 0 000
2 0 0 1 0 1 1 0 1 101
3 0 0 1 1 1 1 1 1 001
4 0 1 0 0 0 1 1 0 011
5 0 1 0 1 1 0 1 1 011
6 0 1 1 0 0 0 1 1 111
7 0 1 1 1 1 1 1 0 000
8 1 0 0 0 1 1 1 1 111
9 1 0 0 1 1 1 1 0 011
Tab.2.3
Topographical diagrams
Fig.2.2.2a
Fig.2.2.2b
EXPERIMENTATION
Insert the Module DL 3155M18 in the console and to set the main switch to ON;
BCD - 7 SEGMENTS BINARY CODE CONVERTER CIRCUIT
Connect the circuit like in Fig.2.2.2a;
Set the switches A, B, C and D to "L" (logic state "0");
Observe the decimal digit present on the DISPLAY and to verify that it corresponds to the value
shown in Tab.2.3;
Repeat the previous operations for all the combinations of the input logic states written in Tab.2.3
and to verify that they correspond to the decimal digits shown on the display;
Connect the circuit like in Fig.2.2.2b;
Set the switch 1 of the DECIMAL-SWITCH to "ON" (logic state "0");
Observe the decimal digit present on the DISPLAY and to verify that it corresponds to the
decimal number shown by the DECIMAL-SWITCH;
Repeat the previous operations for all the positions of the DECIMAL SWITCH and to verify that
they correspond to the decimal digits shown on the display;
Remove all the connections.
Unit N.3: Multiplexer and demultiplexer
Purposes: Verify that the operation of a multiplexer and of a demultiplexer
Electrical Diagram
Fig.3.1.1
Components List
74LS153
Calculation data
INPUT
OUTPUT
QUALIFICATION SELECTION DATA
G B A C3 C2 C1 C0 Y
1 X X X X X X 0
0 0 0 X X X 0 0
0 0 0 X X X 1 1
0 0 1 X X 0 X 0
0 0 1 X X 1 X 1
0 1 0 X 0 X X 0
0 1 0 X 1 X X 1
0 1 1 0 X X X 0
0 1 1 1 X X X 1
Tab.3.1
Topographical diagram
Fig.3.1.2
Obtained Results
INPUT
OUTPUT
QUALIFICATION SELECTION DATA
G B A C3 C2 C1 C0 Y
1 X X X X X X
0 0 0 X X X 0
0 0 0 X X X 1
0 0 1 X X 0 X
0 0 1 X X 1 X
0 1 0 X 0 X X
0 1 0 X 1 X X
0 1 1 0 X X X
0 1 1 1 X X X
Tab.3.2
EXPERIMENTATION
Insert the Module DL 3155M18 in the console and to set the main switch to ON;
4 TO 1 LINE MULTIPLEXER OR DATA SELECTOR SWITCH
Connect the circuit like in Fig.3.1.2;
Connect the output of the PULSE GENERATOR to the data input C0 of the multiplexer;
Set the switch of the PULSE GENERATOR to ON;
Fix the logic state 0 for the enabling input of the multiplexer;
Display, by using the LOGIC PROBE, the signal present on the output Y of the multiplexer, when
the logic states on the selection inputs are both to 0 and to write it in Tab.3.2;
Repeat the procedure of point 9 for all the combinations of the selection logic states and for every
data input shown in Tab.3.2 and to write, in the same table, the corresponding logic states present
on the multiplexer output;
Verify that the output logic values are in conformity with the ones shown in the truth table;
Remove all the connections;
EXERCISE 2: 1 to 4 line demultiplexer
The purpose is to analyze the logic operation of a 1 line to 4 line demultiplexer.
Electrical Diagram
Fig.3.2.1
Components List
74LS138
Calculation data
INPUT
OUTPUT
QUALIFICATION SELEC TION DATA
G2 B A G1 Y3 Y2 Y1 Y0
1 X X X 1 1 1 1
X X X 0 1 1 1 1
0 0 0 1 1 1 1 0
0 0 1 1 1 1 0 1
0 1 0 1 1 0 1 1
0 1 1 1 0 1 1 1
Tab.3.3
Topographical diagram
Fig.3.2.2
Obtained Results
INPUT
OUTPUT
QUALIFICATION SELECTION DATA
G2 B A G1 Y3 Y2 Y1 Y0
1 X X X
X X X 0
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
Tab.3..4
EXPERIMENTATION
Insert the Module DL 3155M18 in the console and to set the main switch to ON;
1 TO 4 LINE DEMULTIPLEXER
Connect the circuit like in Fig.3.2.2;
Connect the logic state 1 to the data input G1 of the demultiplexer;
Fix the logic state 0 for the enabling input of the demultiplexer;
Display, by using the LOGIC PROBE, the signals present on the outputs Y0, Y1, Y2 and Y3 of
the demultiplexer, when the logic states on the selection inputs are both to 0 and to write it in
Tab.3.4;
Repeat the procedure of point 5 for all the combinations of the selection logic states and with the
data input equal to zero and to write, in Tab.3.4, the corresponding logic states present on the
demultiplexer output;
Verify that the output logic values are in conformity with the ones shown in the truth table;
Remove all the connections