0% found this document useful (0 votes)
4 views2 pages

Tuto 2mux Coder

The document outlines exercises for a course on combinational logic circuits, focusing on designing control circuits, truth tables, and using multiplexers and decoders. It includes tasks for creating circuits based on specific Boolean functions, as well as detecting conditions such as simultaneous button presses by players. Additionally, it covers the implementation of circuits to identify palindromic binary numbers using various logic components.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
4 views2 pages

Tuto 2mux Coder

The document outlines exercises for a course on combinational logic circuits, focusing on designing control circuits, truth tables, and using multiplexers and decoders. It includes tasks for creating circuits based on specific Boolean functions, as well as detecting conditions such as simultaneous button presses by players. Additionally, it covers the implementation of circuits to identify palindromic binary numbers using various logic components.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 2

University of Algiers 1 Department of computer science Machine Structure II

TD2: Combinational logic (Data Transmission circuits)

Exercise 1:
Design a control circuit for an amplifier in a conference room with two outputs S1 and S2. The
choice of an output (S1 or S2) depends on the connection of three speakers.
If only one speaker is used, it is connected to output S2.
When connecting two speakers, they are connected to output S1.
Connecting three speakers is prohibited.
Questions :
1. Give the truth table and give the algebraic equations of S1 and S2;
2. Simplify S1 and S2 using the Karnaugh tables;
3. Realize S1 and S2 using a minimum of 4 → 1 multiplexer and a minimum of logic gates.

Exercise 2:
The circuit shown does not represent:
1. S(A,B) = ∑(1,2) 2. S(A,B) = ∏(0,3) 3. A Xor B 4. 𝐴̅𝐵̅ + 𝐴𝐵

Exercise 3:
1. With the help of a multiplexer with 2 selection lines, realize the following function:
𝐹 = 𝐴̅𝐵̅ 𝐶̅ + 𝐴𝐵𝐶̅ + 𝐴̅𝐵𝐶
2. Realize the given function with a de-multiplexer that has 3 selecting lines
Exercise 4:
Realize the following function using an 8x1 multiplexer
1. 𝐹(𝐴, 𝐵, 𝐶) = 𝐴𝐵̅ + 𝐴̅𝐵 𝐶̅ + 𝐵̅ 𝐶̅ + 𝐴𝐵̅ 𝐶
2. 𝐹(𝐴, 𝐵, 𝐶, 𝐷) = 𝐴𝐵𝐷 ̅ + 𝐴𝐵̅ 𝐶 + 𝐴𝐵̅ 𝐶𝐷
Exercise 5:
1. Give the logic expression related to the following diagram
2. Simplify the obtained expression using table of karnaugh

Exercise 6:
As part of a game show, a team is made up of four (04) players A, B,
C, D. Each player has a button which produces a true signal when he
presses it. You must create a circuit that detects if at least two (02)
players press the button at the same time
1) Give the truth table
2) Perform the circuit function using a single 8 x 1 MUX
3) Perform the circuit function using a minimum of 4 x 1 MUXs without logic gates

2023-2024
University of Algiers 1 Department of computer science Machine Structure II

4) Carry out the function of the circuit using a 4 x16 decoder and a NOR gate

Exercise 7: (Catch-up 2018) Consider the following circuit


1) Draw up the truth table of F
2) Realize F using a 4x1 MUX and a minimum of logic gates.

Exercise 8:
Consider the following Boolean function: F(A, B, C, D) =
∑m(0,2,3,7,8,9,10,11,12,13,14,15)

1) Create F using a 16x1 MUX


2) Create F using two 8x1 MUXes and one 2x1 MUX
3) Realize F using a single 8x1 MUX and possible logic gates
4) Realize F using a minimum of 4x1 MUX without logic gates
5) Realize F using a single 3x8 decoder and possible logic gates
6) Realize F using a 4x1 MUX and a 2x4 Decoder and possible logic gates

Exercise 9:
A word is called a palindrome if it is equal to its inverse (it can be read from right to left and from
left to right, for example: radar).
Create a circuit that returns 1 if a 4-bit binary number is a palindrome and returns 0 otherwise,
Using:

1) Minimum Mux 4 x1 without logic gates


2) A 16x1 MUX
3) An 8x1 Mux
4) A 4 x 16 Decoder
5) A 3 x 8 Decoder
6) Minimum of 2 x4 decoders and an OR gate

2023-2024

You might also like